JP2869456B2 - Information erasing method in Bloch line memory - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for erasing information in a Bloch line memory, and more specifically, a vertical Bloch line pair (VBL pair).
The present invention relates to a method for erasing an information signal (VBL pair) without employing means for generating a bubble and collapsing the bubble in a Bloch line memory which uses the same as a recording signal.

[Conventional technology]

With the development of high-density storage elements, Bloch line memories have attracted attention because of their enormous storage capacity and non-volatility.

In the Bloch line memory, the information storage unit is configured by a domain wall around a stripe domain in which a bubble domain is elongated, and a pair of vertical Bloch lines (VBL pair) is written on the domain wall. This is because it is stored as information in the form. This Bloch line memory (BLM) is roughly classified as shown in FIG.
It consists of three elements: a bubble transfer unit (major line) 1, a signal writing / reading unit 2, and a signal storage unit (minor loop) 3. Here, when the signal writing / reading unit 2 is examined in detail, as shown in FIG. 3, a VBL control conductor 4, a signal writing conductor 5, a signal reading conductor 6, and the like are provided. If so, one of the two conductors 5, 6 is often used later.

FIG. 3 shows the operation principle of the conventional signal erasing. Here, for convenience of explanation, the stripe domain S ₁
And the S ₃ are present VBL pair 8, the stripe domain S ₂ in a state that does not exist VBL pairs.

In the initial state, one dummy VBL 7 is present in the head portion of each stripe domain (FIG. 3A). Therefore, when transferring a signal (VBL pair), the VBL pair passes through the head unit, and a state in which three VBLs are arranged in the head unit occurs. By weakening the bias magnetic field H _B while maintaining this state, the head portion is stretched to a position across the conductor 6 (FIG. 3 (b)). Further, a current is supplied to the conductor 6 to generate a current magnetic field in the same direction as the bias magnetic field, whereby the stripe head portion is chopped (FIG. 3 (c)). As a result, the VBL pair to be erased moves to the valve 9 newly generated by the chopping, and at the same time, one dummy VBL is generated in the stripe head portion. Then, the stripe head section in this state returns to the initial state shown in FIG. 3A by increasing the bias magnetic field to the original strength, where the VBL pair (signal)
Has been erased. 3 (a) and 3 (b)
In (c), VBL is represented by an arrow.

On the other hand, the generated bubble 9 is subsequently collapsed.

However, in the erasure of the signal (VBL pair) according to the conventional method, a new bubble is generated along with the erasure, and this bubble needs to be collapsed by some means. There is a drawback that the time required becomes longer and the player wins.

[Problems to be solved by the invention]

An object of the present invention is to provide a method for erasing information in a Bloch line memory, which eliminates the above-mentioned disadvantages and shortens the time required for erasing information = signal (VBL pair) to increase the reading speed.

[Means for solving the problem]

According to the present invention, there is provided a method for erasing a vertical Bloch line pair (hereinafter, referred to as a VBL pair), which is an information signal, from a stripe domain of a Bloch line memory by a parallel conductor capable of changing a magnetic field by changing a current direction. The direction of the current in the parallel conductor is changed so that the VBL pair is separated and moved so that the stripe domain is guided on the parallel conductor, and the magnetization direction of the Bloch domain wall sandwiched between the two VBLs forming the VBL pair is reversed. A method for erasing a VBL pair from a stripe domain of a Bloch line memory is provided, wherein a VBL pair is erased by passing a current causing a magnetic field in the direction to the conductor.

Incidentally, the present inventors have been studying a method of erasing an information signal in a Bloch line memory for a long time.However, by giving an operation to the direction of a magnetic field, a process such as bubble generation and collapse of the bubble is performed. We found a way to erase VBL pairs without adoption. The present invention has been made by this.

Hereinafter, the method of erasing a VBL pair according to the present invention will be described in more detail with reference to the drawings (FIG. 2).

Also in FIG. 2, the initial state is exactly the same as FIG. 3 (a) (FIG. 2 (a)). In FIG. 2 (a), are arranged so as to be perpendicular to the parallel and stripe domain mutually erasing conductor C _1, C ₂ and _{C 3 S 1, S 2,} S 3, conductor C ₁ , C ₂ , and C ₃ are independently subjected to current control.
In FIG. 2, the VBL control conductor, the signal writing conductor, and the signal reading conductor are not shown, but some of them can be used together with the erasing conductor.

Above, as mentioned, in the second view (a), the stripe domain S ₁ and S ₃ that VBL pairs 8 closest position to the head portion of the stripe domain is present, and so VB
And stripe domain S ₂ to L does not exist in the pair is shown. Now, from this initial state (FIG. 2 (a)), VBL
When the bias magnetic field is weakened while the position of the pair 8 is fixed, the heads of the stripe domains S ₁ , S ₂ and S ₃ are shown in FIG.
Stretched as shown.

Subsequently, from this state, a current flows in the direction indicated by the thick arrow (that is, a current is applied so that an in-plane magnetic field is generated below the erasing conductor), and at the same time, a signal transfer is performed, so that the VBL pair 8 becomes They are separated and moved to the positions shown in FIG. 3 (c). Then, by reversing the current direction of conductor C _1, it moves the VBL to the position shown in FIG. 2 (d).

Finally, when the current in the conductor C ₂ is turned off or the current is reversed in the opposite direction, a magnetic field in a direction opposite to the magnetization direction of the Bloch wall portion sandwiched between the two VBLs forming the VBL pair is applied. The magnetization direction is reversed, and VBL is erased (FIG. 2 (e)).

Regarding the structure of the Bloch line memory (device) itself used in the method of the present invention, erasing conductors C ₁ , C ₂ and C ₃ are newly provided as compared with those conventionally known (provided that these are new). As described above, each conductor in the related art can replace this.) In addition, since no chopping operation is employed, bubbles are not generated, and it is not necessary to provide a collapse means for the bubbles. Other than that, they are virtually the same.

〔The invention's effect〕

According to the method of the present invention, elimination of a VBL pair (information signal) does not include steps of chopping and collapse of bubbles generated by the chopping.
VBL pairs can be erased.

[Brief description of the drawings]

FIG. 1 is a diagram schematically showing a main part of a Bloch line memory device. FIG. 2 is a diagram for explaining the method of the present invention. FIG. 3 is a diagram for explaining a conventional VBL pair erasing method. S ₁ , S ₂ , S ₃ ... stripe domains C ₁ , C ₂ , C ₃ ... erase conductor 8 ... VBL pair

Claims (1)

(57) [Claims] 1. A vertical Bloch line pair (hereinafter referred to as VB) which is an information signal from a stripe domain of a Bloch line memory.
In this method, the stripe domain is guided on the parallel conductor, and the VBL pair is separated and moved so that the VBL pair is separated and moved. The direction of the current is made different, and the VBL pair is erased by flowing a current that causes a magnetic field in the conductor opposite to the magnetization direction of the Bloch domain wall portion sandwiched between the two VBLs forming the VBL pair. How to erase VBL pairs from Bloch line memory stripe domain.