JP2856182B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device having a charge discharging portion formed adjacent to a horizontal charge transfer portion.

[0001]

2. Description of the Related Art In recent years, the number of pixels in a solid-state image pickup device which has been used as an input device of a camera-integrated VTR has been increased, and instead of exposing a film, optical information is converted into an electric signal and converted into a storage medium. To be used as an input device of an electronic still camera for making a hard copy or watching on a monitor screen.

In such a solid-state imaging device, unnecessary signals are present in a photoelectric conversion unit and vertical and horizontal charge transfer units. When used as an input device for a camera-integrated VTR, such unnecessary signal charges settle down to a level that does not cause a problem after several screens of display. When used, there is a time delay after the trigger by the shutter button is applied until the shutter is actually opened and closed, and there is a possibility that a shutter chance is lost.

For this reason, a solid-state imaging device used as an input device of an electronic still camera is a camera-integrated VTR.
It is necessary to remove all unnecessary signal charges existing in the photoelectric conversion unit and the vertical and horizontal charge transfer units at the same time as the trigger by the shutter button is applied.

As a means for removing such unnecessary charges, removal of unnecessary charges existing in the photoelectric conversion portion is generally performed by forming a lightly doped P- type semiconductor region immediately below the N-type semiconductor region constituting the photoelectric conversion portion. Then, by applying a reverse bias voltage to the N-type semiconductor substrate, blooming control for removing surplus charges to the N-type semiconductor substrate and depletion of the N-type semiconductor region itself to remove all signal charges to the N-type semiconductor substrate This is addressed by forming a vertical overflow drain structure (see Television Society Journal, Vol. 37, No. 10).
(1983) pp 782-787).

In addition, unnecessary charges existing in the horizontal charge transfer section can be dealt with by removing the unnecessary charges to the reset drain provided at the end of the horizontal charge transfer section by a normal operation because the horizontal charge transfer section can operate at high speed. Have been.

On the other hand, in order to remove unnecessary charges existing in the vertical charge transfer section, transfer of at least one to several screens is required.

As a method of removing unnecessary charges existing in such a vertical charge transfer section, a drain for removing unnecessary charges is disposed at an end of the vertical charge transfer section on the side opposite to the horizontal charge transfer section, and a still camera is used. A first method in which the unnecessary charge is removed by setting the buried channel of the vertical charge transfer portion and the substrate to reverse bias even when not in use (Japanese Unexamined Patent Publication No.
No. 8-31671), a drain for removing unnecessary charges is arranged at an end of a vertical charge transfer section on the opposite side of the horizontal charge transfer section, and a second charge for removing unnecessary charges in the vertical charge transfer section by reverse transfer. And a third method (JP-A-58-31672) for removing unnecessary charges by arranging a drain at a connection portion between a horizontal charge transfer section and a vertical charge transfer section and controlling a reset gate. Proposed.

However, in the first method, the vertical charge transfer electrode is always in a depleted state, that is, a high resistance state.
There is a disadvantage that the removal time of unnecessary charges in the vertical charge transfer section is very long, and that a reverse bias power supply must always be applied. Further, in the second method, since unnecessary charges in the vertical charge transfer section are removed by transferring in the reverse direction, a defect occurs due to local signal loss due to a difference from a normal signal charge transfer direction. (Japanese Unexamined Patent Publication No. 2-33275), there is a disadvantage that the driving method of the solid-state imaging device is complicated to compensate for this disadvantage. In the third method, it is necessary to form the control gate and the unnecessary charge discharging drain in a small area by miniaturization, which is disadvantageous in that it is difficult to manufacture, and requires a pulse for controlling the control gate. Has the disadvantage that it becomes complicated.

For this reason, recently, an unnecessary charge discharging region is generally formed adjacent to the horizontal charge transfer section, and unnecessary charges of a plurality of vertical charge transfer sections are simultaneously transferred in the forward direction, so that unnecessary charge is transferred. A method for removing the same has been proposed (JP-A-2-205359, JP-A-62-154881).

FIG. 14 is a schematic diagram showing the configuration of a conventional solid-state image pickup device having a charge discharging section adjacent to a horizontal charge transfer section. The photoelectric conversion section 1101, the vertical charge transfer section 1102, the horizontal charge transfer section 1103, and the output are shown. N ⁺⁺ type semiconductor region 11 provided at one end of circuit portion 1104, unnecessary charge discharging portion 1105, and unnecessary charge discharging portion 1105 and connected to power supply voltage
06.

FIG. 15 is a plan view of a region having an unnecessary charge discharging portion 1105 adjacent to the conventional horizontal charge transfer portion 1103 of FIG. 14, and includes a vertical charge transfer channel 1201, a horizontal charge transfer channel 1202, and a potential barrier region. 120
3, a first horizontal charge transfer electrode 1205, a second horizontal charge transfer section 1206, and a final vertical charge transfer electrode 1207.

FIG. 16 is a cross-sectional view taken along the line II ′ of the conventional solid-state imaging device shown in FIGS. A conventional solid-state imaging device has an N ⁻ type semiconductor substrate 1301 having an impurity concentration of about 2.0 × 10 ¹⁴ cm ^−3.
And a P-type well layer 1302 having an impurity concentration of about 1.0 × 10 ¹⁶ cm ^−3, and an impurity concentration constituting a buried channel of a vertical charge transfer section, a horizontal charge transfer section, and a potential barrier section is 1.
An N-type semiconductor region 1303 of about 0 × 10 ¹⁷ cm ⁻³ and an impurity concentration of an unnecessary charge discharging portion of 1.0 × 10 ¹⁸ cm ^−3.
The extent of N ⁺ -type semiconductor region 1305, a P ⁺ -type semiconductor regions 1307 impurity concentration of about 1.0 × 10 ¹⁸ cm ^-3 constituting the element isolation portion, a made of polycrystalline silicon 1308 of the first layer 1 Horizontal charge transfer electrode 1205 and the final vertical charge transfer electrode 1 made of polycrystalline silicon 1309 of the second layer.
207. Here, the vertical charge transfer section, the vertical / horizontal connection section, and the N-type semiconductor region 13 immediately below the potential barrier section
03 is formed to have a narrower width than the N-type semiconductor region 1303 immediately below the horizontal charge transfer portion so as to obtain a narrow channel effect. Further, the N ⁺ -type semiconductor region 1305 constituting the unnecessary charge discharging portion is formed by an N ⁺⁺ -type semiconductor region 1106 provided at one end of the unnecessary charge discharging portion and having an impurity concentration of about 1.0 × 10 ²⁰ cm ^−3. Power supply voltage V _{D of} about 15 V
Is applied to the N ⁺ type semiconductor region 130 of the unnecessary charge discharging portion.
5 is in a non-depleted state. On the other hand, the channel of the horizontal charge transfer section is depleted due to the impurity concentration and the application of the power supply voltage. That is, in the unnecessary charge discharging portion, the holes supplied from the N ⁺⁺ type semiconductor region 1106 exist in the entire unnecessary charge discharging portion. The charge disappears. Further, the potential barrier ΨB of the potential barrier portion is formed so as to be deeper than the potential potential ΨV _H formed in the vertical / horizontal connection portion so as not to return to the vertical charge transfer portion 1102.

FIG. 17 shows a conventional solid-state imaging device II-II '.
It is a figure which shows the cross section of a surface, and a potential potential. The solid-state imaging device includes a ^N-over type semiconductor substrate 1301, P-well layer 1
302, an N-type semiconductor region 130 forming a buried channel of a vertical charge transfer portion, a horizontal charge transfer portion, and a charge barrier portion
3, an N ⁻ type semiconductor region 1304 having an impurity concentration of about 7.0 × 10 ¹⁶ cm ^−3, which forms a buried channel of a potential barrier region of the horizontal charge transfer section, and a floating diffusion layer section and a reset drain section. N ⁺⁺ type semiconductor regions 1306 and 1311
A first horizontal charge transfer electrode 1205 made of a P ⁺ type semiconductor region 1307 forming a device isolation portion and a first layer of polycrystalline silicon 1308;
9 and a second horizontal charge transfer electrode 1206. Here, a power supply voltage V _D of usually about 15 V is applied to the N ⁺⁺ type semiconductor region 1306 constituting the reset drain of the signal charge.

FIG. 18 shows a conventional solid-state imaging device III-II.
FIG. 2 is a drawing showing a cross-sectional view of an I ′ plane and a potential potential. The semiconductor device includes a ^N-over type semiconductor substrate 1301, a P-type well layer 1302, required an N ⁺ -type semiconductor region 1305 that constitutes the charge discharging section, unnecessary charge discharging unit N ⁺⁺ type semiconductor which is provided at one end of the A region 1306, a P ⁺ semiconductor region 1307 forming an element isolation portion, and a first layer of polycrystalline silicon 1
308 and a second horizontal charge transfer electrode 1206 made of polycrystalline silicon 1309 of the second layer. Here, the N ⁺ -type semiconductor region 1305 that constitutes the unnecessary charge discharging section, the power supply voltage V _D of usually about 15V through the N ^{+ +} -type semiconductor region 1306 is provided at one end of the unnecessary charge discharging unit is applied Have been. The power supply voltage V _D which is applied to the N ⁺ -type semiconductor region 1306 in FIG. 18, the same power supply and the power supply voltage V _D which is applied to the N ⁺⁺ type semiconductor region 1306 in FIG. 17.

The operation of the conventional semiconductor device having such a structure will be described with reference to FIG.

In the unnecessary charge discharging period, as described above, the removal of the unnecessary charges depending on the photoelectric conversion unit 1101 is performed as follows.
A lightly doped P ^- type semiconductor region is formed immediately below the N-type semiconductor region that constitutes the photoelectric conversion unit, and a reverse bias voltage is applied to the N-type semiconductor substrate 1301, thereby depleting the N-type semiconductor region itself and causing signal charge. Are all N-type semiconductor substrates 130
Remove to 1.

Along with the above operation, the vertical charge transfer section 1102
Are transferred to the horizontal charge transfer unit 1103 all at once by, for example, four-layer clock pulses. The horizontal charge transfer electrodes 1205 and 1206 have the configuration shown in FIG.
The high level voltage V _H to .phi.H ₁ shown is, the low level voltage V _L are applied to .phi.H _2, the horizontal charge transfer portion 110
3 does not return to the vertical charge transfer portion 1102, and the potential potential {B} of the potential barrier portion does not return.
Beyond the N ⁺ semiconductor region 13 of the unnecessary charge discharging portion 1105
It is absorbed and removed at 05.

Unnecessary charges remaining in the horizontal charge transfer unit 1103 are reset by a two-phase clock pulse as shown in FIG. 19 at the end of the horizontal charge transfer unit 1103 at the normal high-speed operation of the horizontal charge transfer unit. It is absorbed and removed in the N ⁺⁺ type semiconductor region 1306 of the drain.

Subsequently, when a transition is made to the signal charge transfer period,
The signal charge accumulated in the photoelectric conversion unit 1101 by the amount of light incident at a predetermined time is converted into the corresponding vertical charge transfer unit 1102
After being read out to the horizontal charge transfer unit 1103, each horizontal line transferred in the vertical charge transfer unit 1102 in the vertical direction is sent to the horizontal charge transfer unit 1103, and is transferred in the horizontal charge transfer unit 1103 in the horizontal direction and vertically transferred. The signal is output via the circuit unit 1104.

As described above, even if a signal charge higher than the transfer capability of the horizontal charge transfer unit is transferred from the vertical charge transfer unit, the excess charge does not flow back to the vertical charge transfer unit.
It can be discharged to the unnecessary charge removing region. Therefore, it is possible to prevent an adverse effect such as a whiteout phenomenon on the monitor screen.

[0021]

However, in a solid-state imaging device having an unnecessary charge discharging section adjacent to the horizontal charge transfer section as described above, a horizontal charge transfer section removes unnecessary charges to remove unnecessary charges. A horizontal charge transfer channel 1202, a potential barrier region 1203, and an unnecessary charge discharging region 1204 must be formed below the charge transfer electrode 1205. At this time, the conventional solid-state imaging device has a disadvantage that the number of manufacturing steps is increased because it is necessary to form the N-type semiconductor region 1303 and the N ⁺ -type semiconductor region 1305 having different impurity concentrations below the horizontal charge transfer electrode. Was.

Further, since the N ⁺ -type semiconductor region 1305 serving as an unnecessary charge transfer portion having a relatively high impurity concentration is formed below the horizontal charge transfer portion, it is necessary to form a gate insulating film below the horizontal charge transfer electrode in a later step. , N ⁺ -type semiconductor region 1303 due to outward diffusion of impurities from N ⁺ -type semiconductor region 1305.
There is also a drawback that an abnormal diffusion layer is formed in the N ⁻ -type semiconductor region 1304 and the potential potential fluctuates.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a solid-state imaging device having a small number of manufacturing steps.

It is another object of the present invention to provide a solid-state imaging device in which a potential potential does not fluctuate due to an abnormal diffusion layer. The solid-state imaging device of the present invention includes a photoelectric conversion unit, which is disposed adjacent to the photoelectric conversion unit.
A vertical charge transfer portion adjacent to one end of the vertical charge transfer portion.
And transferred from the vertical charge transfer section.
A horizontal charge transfer unit for storing charges, and the horizontal charge transfer unit
Unnecessary charge discharge section that accepts overflowed charges
And the horizontal charge transfer section and the unnecessary charge discharge section.
Is formed in the semiconductor layer of the first conductivity type.
Region, and the horizontal charge transfer unit is configured such that the first potential is
The unnecessary charge is in a depleted state by being applied.
A second potential different from the first potential is applied to the discharge unit
Solid-state imaging device characterized by being in a non-depleted state .

Further, another solid-state imaging device according to the present invention includes a shift register for transferring charges, and a reset transistor connected to the shift register for converting charges into a voltage and having a region to which a reset voltage is applied. It has an output circuit and an overflow drain which receives a charge overflowing in the shift register and to which a drain voltage having a constant potential different from the reset voltage is applied.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to clarify the above and other objects, features, and effects of the present invention, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic diagram of a solid-state imaging device having a charge discharging unit adjacent to a horizontal charge transfer unit according to a first embodiment of the present invention.
And a vertical charge transfer unit or a CCD shift register 102
And a horizontal charge transfer unit or CCD shift register 103
, An output circuit unit 104, an unnecessary charge discharging unit or overflow drain 105, and an N ⁺⁺ type semiconductor region 10 provided at one end of the unnecessary charge discharging unit and connected to a constant voltage V _D1.
6. φ1 to φ4 are vertical charge transfer units 1
02 is a drive signal for driving the drive signal 02.

FIG. 2 is an enlarged plan view near the line II ′ of the solid-state imaging device according to the first embodiment of the present invention in FIG. The solid-state imaging device includes a vertical charge transfer channel 201, a horizontal charge transfer channel 202, a potential barrier region 203,
Unnecessary charge discharging region or overflow drain region 204
A first horizontal charge transfer electrode 205 made of polycrystalline silicon in a first layer, and a second horizontal charge transfer electrode 205 made of polycrystalline silicon in a second layer.
, A vertical charge transfer electrode 207, and a vertical / horizontal connection region 208. The vertical charge transfer channel 201, the horizontal charge transfer channel 202, the unnecessary charge discharging region 204, and the vertical and horizontal connection region 208 are formed so as to be surrounded by a P-type semiconductor region as an element isolation portion provided outside the dotted line. A horizontal charge transfer signal φH ₁ is applied to the first and second horizontal charge transfer electrodes 205 and 206. A horizontal charge transfer signal φH ₁ is applied to first and second horizontal charge transfer electrodes provided adjacent to the first and second horizontal charge transfer electrodes 205 and 206.
And a horizontal charge transfer signal φH ₂ complementary to the horizontal charge transfer signal is applied. A final vertical charge transfer signal φ is applied to the final vertical charge transfer electrode.
VLAST is applied.

FIG. 3 is a cross-sectional view taken along line II ′ of the solid-state imaging device according to the first embodiment of the present invention shown in FIGS. The present solid-state imaging device includes an N ⁻ type semiconductor substrate 301 having an impurity concentration of about 2.0 × 10 ¹⁴ cm ^−3.
And a P-type well layer 302 having an impurity concentration of about 1.0 × 10 ¹⁶ cm ^−3, a buried channel of a vertical charge transfer section, a horizontal / vertical connection section, a horizontal charge transfer section and a potential barrier section, and an unnecessary charge discharge section. impurity concentration constituting the is 1.0 × 10 ¹⁷ cm ^-3 of about N-type semiconductor region 303, the impurity concentration is 1.0 × 10 ¹⁸ cm ^-3 of P ⁺ -type semiconductor region 3 forming the device isolation region
07, the first layer of polycrystalline silicon 308 as the first horizontal charge transfer electrode 205, and the final vertical charge transfer electrode 2
07 as the second layer of polycrystalline silicon 309. In the present solid-state imaging device, unlike the related art, the buried channel and the unnecessary charge discharging portion of the horizontal charge transfer portion are formed by semiconductor regions having the same impurity profile.

The potential potential φB of the potential barrier section 203
Is formed so as to be deeper than the potential potential ΔV _H formed in the vertical / horizontal connection section 208 so as not to return to the vertical charge transfer section 102. For more information,
As shown in FIG. 2, the width of the N-type semiconductor region 303 of the potential barrier portion 203 is changed to the width of the N-type semiconductor region 30 of the horizontal charge transfer portion.
3 is formed narrow, and the potential of ΔB is set by the narrow channel effect. The vertical / horizontal connection section 208
Also the electric potential the? V _H is set by the narrow channel effect.

FIG. 4 is a sectional view taken along line II-II 'of the solid-state imaging device according to the first embodiment of the present invention shown in FIG. This solid-state imaging device includes an N ⁻ type semiconductor substrate 301, a P well layer 302, and an N type semiconductor region 30.
3, an N ⁻ -type semiconductor region 304 having an impurity concentration of about 7.0 × 10 ¹⁶ cm ⁻³ serving as a charge barrier region of the horizontal charge transfer portion;
N ⁺⁺ type semiconductor region 31 constituting the floating diffusion region and reset drain portion or reset transistor, respectively
1 and 306, a P ⁺ type semiconductor region 307 forming an element isolation portion, a first layer of polycrystalline silicon 308 forming a first horizontal charge transfer electrode 205, and a second horizontal charge transfer electrode 206 are formed. And a second layer of polycrystalline silicon 309. A power supply voltage V ^{D of} about 15 V is normally applied to the N ⁺⁺ type semiconductor region 306 constituting the reset drain of the signal charge. Therefore, the channel region below the horizontal charge transfer unit is in a depleted state. When the complementary horizontal charge transfer signals φH ₁ and φH ₂ are applied to the horizontal charge transfer electrodes, the potential changes as shown in the figure. V _OG is a constant voltage signal applied to the final horizontal charge transfer electrode. The charge information stored in the floating diffusion region 311 is transmitted to an output circuit unit 312 as illustrated. φR is a reset pulse.

FIG. 5 is a sectional view taken along line III-III 'of the solid-state imaging device according to the first embodiment of the present invention shown in FIG. 1 and a drawing showing potential potential. The solid-state imaging device includes a ^N-over type semiconductor substrate 301, a P-type well layer 302, an N-type semiconductor region 306 constituting the unnecessary charge discharging unit, a P ⁺ -type semiconductor region 307 constituting the element isolation portion, a A first layer of polycrystalline silicon 308 forming one horizontal charge transfer region 307;
The second horizontal charge transfer region 206 is formed of a second layer of polycrystalline silicon 309. Electric potential of the N-type semiconductor region 303 below the horizontal charge transfer electrodes horizontal charge transfer signal .phi.H ₂ of low level is applied, the horizontal potential PusaiH _L, and the horizontal charge transfer signal .phi.H _H of a high level is applied charge N-type semiconductor region 3 under transfer electrode
The potential of 03 is ΔH _H. Unnecessary charge discharging section, N type semiconductor electric potential of the region 303 so that the non-depleted even when ΨH _L, unnecessary charge discharging unit N ⁺⁺ type semiconductor region 306 which is provided at one end of the
The constant voltage V _D1 is applied via the. That is, when the first horizontal charge transfer electrode 205 is at a low level, the N ⁺⁺ type semiconductor region 106 provided at one end of the unnecessary charge discharging portion is provided in the N-type semiconductor region 303 constituting the unnecessary charge discharging portion. 3
A constant voltage V _{D1 that} is shallower than the potential ΨH _L formed in the N-type semiconductor region 303 below the first horizontal charge transfer electrode 205 and deeper than the potential ΨB of the potential barrier portion is applied through the transistor 06. (See FIG. 3). In this case, between the constant voltage V _D1 and electric potential PusaiH _L, the difference between the constant voltage V _D1 and electric potential ΨB it may be desirable respectively than 0.5V. In other words, when the constant potential V _D1 is shallower than the potential ΨB, there is a problem that the charges flow backward from the unnecessary charge discharging unit to the horizontal charge transfer unit. On the other hand, the constant potential V _D1 becomes the potential potential Ψ
When it is deeper than H _L, the unnecessary charge discharging portion immediately below the low level applied to the horizontal charge transfer electrode is depleted. Then, since the unnecessary charge discharging portion has a high resistance, the supply of holes from the N ⁺⁺ type semiconductor region 306 is delayed,
There is a problem that the absorption and removal of the unnecessary charges in the unnecessary charge discharging unit is delayed. Therefore, the constant voltage V _D1 must be provided between the potentials ΨH _{L and} ΨB, and the above-described range is desirable in consideration of the operation margin.

Next, the operation of the solid-state imaging device according to the first embodiment of the present invention will be described with reference to FIGS. FIG. 6 is a drawing corresponding to the potential potential diagram of FIG.
8 is a drawing corresponding to the potential potential diagram of FIG. 4, FIG.
FIG. 4 is a timing waveform chart showing an unnecessary charge discharging period and a signal charge transfer period.

During the unnecessary charge discharging period, unnecessary charges existing in the photoelectric conversion unit 101, the vertical charge transfer unit 102, and the horizontal charge transfer unit 103 are removed. The method of the unnecessary charges existing in the photoelectric conversion unit 101 is the same as that of the conventional method.
A lightly doped P ⁻ -type semiconductor region is formed immediately below the N-type semiconductor region, and a reverse bias voltage is applied to the N-type semiconductor substrate 301 to deplete the N-type semiconductor region itself and reduce all signal charges to the N-type semiconductor substrate 301. To be removed.

Along with the above operation, unnecessary charges existing in the vertical charge transfer unit 102 are simultaneously transferred to the horizontal charge transfer unit 103 by, for example, four-phase clock pulses.
At this time, the first and second horizontal charge transfer electrodes 205, 20
6, a high level voltage V _H is applied to the first horizontal charge transfer signal φH ₁ and a low level voltage V _L is applied to the second horizontal charge transfer signal φH ₂ . Therefore, as shown in FIG. 6A, charges are accumulated in the channel region of the horizontal charge transfer unit 103. After that, the excess charge that further accumulates and overflows the channel region of the horizontal charge transfer unit 103 passes through the potential barrier unit 203 and is transferred to the N-type semiconductor region 303 of the unnecessary charge discharge unit 105, as shown in FIG. Is absorbed and removed.

Thereafter, the unnecessary charges remaining in the horizontal charge transfer unit 103 are provided at the end of the horizontal charge transfer unit 103 by the normal high-speed operation of the horizontal charge transfer unit by the two-phase clock pulse shown in FIG. It is absorbed and removed by the N ^{+ +} type semiconductor region 306 of the reset drain. At this time, when the first and second horizontal charge transfer signals are inverted, as shown in FIG. 6C, the potential of the channel region of the horizontal charge transfer unit becomes shallow, and charges overflow in the horizontal charge transfer unit. However, the overflowed charges are removed by being transferred in the horizontal direction of the horizontal charge transfer section.

Subsequently, in the signal charge transfer period, the signal charges stored in the photoelectric conversion unit 101 are read out to the corresponding vertical charge transfer unit 102 by the amount of light incident at a predetermined time, and then each vertical charge transfer period is read. Each horizontal line transferred in the vertical direction in the charge transfer unit 102 is sent to the horizontal charge transfer unit 103. In the horizontal charge transfer unit 103, the horizontal transfer signals are sequentially switched, as shown in FIGS.
The signal charge is transferred in the horizontal direction, and the floating charge region 311
To stay in. The signal charge is output via the output circuit 104. Thereafter, as shown in FIG. 7C, a reset pulse φe is applied, and the potential of the floating charge region 311 is reset.

Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 9 is a schematic diagram showing the configuration of a solid-state imaging device having a charge discharging section adjacent to a horizontal charge transfer section according to a second embodiment of the present invention. The difference is that the constant voltage V _D2 is applied to the N ⁺⁺ type semiconductor region 106 provided at one end of the unnecessary charge discharging portion.

FIG. 10 is a cross-sectional view of the II ′ plane of the solid-state imaging device according to the second embodiment of the present invention shown in FIG. 9 and a drawing showing the potential potential, and FIG. FIG. 6 is a cross-sectional view of the solid-state imaging device according to the second embodiment taken along the line III-III ′ and a diagram illustrating potential potentials. The difference from the first embodiment of the present invention is that when the horizontal charge transfer signals φH ₁ and φH ₂ applied to the horizontal charge transfer electrodes are both high level signals, the N-type Semiconductor region 3
03, via the N ⁺⁺ type semiconductor regions 106 and 306,
N-type semiconductor region 30 below first horizontal charge transfer electrode 205
The voltage V _D2 is applied so as to be shallower than the potential potential ΨH _H formed at 3 and deeper than the potential potential ΨB of the potential barrier portion. In this case, between the constant voltage V _D2 and electric potential PusaiH _H, the difference between the constant voltage VD ₂ and electric potential ΨB it may be desirable respectively than 0.5V.

The operation is almost the same as that of the first embodiment. The difference is that, as shown in FIG. 12, the horizontal charge transfer signals applied to the horizontal charge transfer electrodes 205 and 206 during the unnecessary charge discharging period. When φH ₁ and H ₂ are both at the high level, the charge is transferred to the channel region below the horizontal charge transfer unit and the unnecessary charge discharging unit.

According to the second embodiment, the first embodiment of the present invention
Are possible embodiment of the solid-state imaging device and the same operation, and the constant voltage V _D2 is the horizontal charge transfer signal .phi.H ₁ is not required to set the constant voltage V _D2 thinking when a low level There is an advantage that the constant voltage setting margin of the constant voltage V _D1 of the first embodiment is further expanded.

FIG. 13 is a drawing showing a third embodiment of the present invention. This embodiment is different from the first and second embodiments in that an N ⁺⁺ type impurity region 106 to which a constant voltage _VD1 or a constant voltage _VD2 is applied is arranged at both ends of the unnecessary charge discharging unit 105. That is.

For this reason, the unnecessary charge discharging unit 105 supplies N ⁺⁺
This has the advantage that the distance between the mold semiconductor regions 106 is reduced and the ability to remove unnecessary charges is improved.

The present invention is not limited to the above-described embodiment, and can be modified as long as the scope of the invention is not changed.

For example, in the above-described embodiment of the present invention, the charge transfer device in which the potential barrier portion is formed by the narrow channel effect of the charge transfer channel has been described. Even in a charge transfer region where a potential barrier is formed by introducing an impurity of the opposite conductivity type, a dedicated electrode is disposed, and a desired potential is applied to the electrode to form a potential barrier. It goes without saying that the present invention can be similarly applied to an apparatus.

In the embodiment of the present invention described above,
An N ⁺⁺ type semiconductor region serving as a reset drain to which a constant voltage is applied to only one end of the horizontal charge transfer region, and an output circuit unit are arranged, but an N ⁺⁺ type serving as a reset drain at both ends of the horizontal charge transfer unit It goes without saying that the present invention can be similarly applied to a solid-state imaging device in which a semiconductor region and an output circuit unit are arranged.

Further, in the above-described embodiment of the present invention, an example is described in which the present invention is applied to a buried type two-phase drive charge transfer device.
It is needless to say that the present invention can be similarly applied to a charge transfer device driven by one or four phases.

[0048]

As described above, according to the present invention, the conventional solid-state is realized by using a semiconductor region formed with the same impurity profile as an N-type semiconductor region used as an unnecessary charge discharging portion in a non-depleted state. The same operation as the imaging device can be performed, and the N-type semiconductor region of the unnecessary charge discharging unit can be formed with the same impurity profile as the N-type semiconductor region of the charge transfer channel of the horizontal charge transfer unit. There is an effect that the number of manufacturing steps can be reduced as compared with the apparatus.

Further, since it is not necessary to form an N ⁺ -type impurity region serving as an unnecessary charge discharging portion having a relatively high impurity concentration below the horizontal charge transfer electrode, a gate insulating film below the horizontal charge transfer electrode in a later step is formed. In this case, an abnormal diffusion is formed in an N-type semiconductor region serving as a channel region or a potential barrier portion due to outward diffusion of impurities from the N + -type semiconductor region, and a potential potential fluctuates. There is an effect that the disadvantage of can be solved.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a solid-state imaging device having an unnecessary charge discharging unit adjacent to a horizontal charge transfer unit according to a first embodiment of the present invention.

FIG. 2 is a plan view of a region having an unnecessary charge discharging portion adjacent to the horizontal charge transfer portion according to the first embodiment of the present invention.

FIG. 3 illustrates a solid-state imaging device according to a first embodiment of the present invention;
FIG. 2 is a drawing showing a cross-sectional view of an I ′ plane and a potential potential.

FIG. 4 shows a solid-state imaging device according to the first embodiment of the present invention.
FIG. 3 is a cross-sectional view of a -II ′ plane and a drawing showing a potential potential.

FIG. 5 shows a solid-state imaging device according to the first embodiment of the present invention.
FIG. 3 is a cross-sectional view of an I-III ′ plane and a drawing showing a potential potential.

FIG. 6 illustrates a solid-state imaging device according to the first embodiment of the present invention.
FIG. 4 is a timing waveform chart of a potential on the I ′ plane.

FIG. 7 shows a solid-state imaging device II according to the first embodiment of the present invention.
FIG. 4 is a timing waveform chart of a potential potential on the -II ′ plane.

FIG. 8 is a diagram illustrating an example of a clock pulse applied to a horizontal charge transfer unit of the solid-state imaging device according to the first embodiment of the present invention.

FIG. 9 is a schematic configuration diagram of a solid-state imaging device having an unnecessary charge discharging unit adjacent to a horizontal charge transfer unit according to a second embodiment of the present invention.

FIG. 10 shows a solid-state imaging device according to a second embodiment of the present invention;
FIG. 2 is a drawing showing a cross-sectional view of the II ′ plane and a potential.

FIG. 11 illustrates a solid-state imaging device according to a second embodiment of the present invention;
FIG. 3 is a drawing showing a cross-sectional view of the III-III ′ plane and a potential.

FIG. 12 is a diagram illustrating an example of a clock pulse applied to a horizontal charge transfer unit of the solid-state imaging device according to the first embodiment of the present invention.

FIG. 13 is a schematic configuration diagram of a solid-state imaging device having an unnecessary charge discharging unit adjacent to a horizontal charge transfer unit according to a fourth embodiment of the present invention.

FIG. 14 is a schematic configuration diagram of a solid-state imaging device having an unnecessary charge discharging unit adjacent to a conventional horizontal charge transfer unit.

FIG. 15 is a plan view of a region having an unnecessary charge discharging portion adjacent to a conventional horizontal charge transfer portion.

FIG. 16 is a drawing showing a cross-sectional view of the II ′ plane and a potential potential of the conventional solid-state imaging device.

FIG. 17 is a cross-sectional view taken along the II-II ′ plane of a conventional solid-state imaging device and a drawing showing a potential potential.

FIG. 18 is a cross-sectional view of the conventional solid-state imaging device taken along the line III-III ′ and a diagram showing a potential potential.

FIG. 19 is a diagram illustrating an example of a clock pulse applied to a horizontal charge transfer unit of a conventional solid-state imaging device.

[Explanation of symbols]

Reference Signs List 101 photoelectric conversion unit 102 vertical charge transfer unit 103 horizontal charge transfer unit 104 output circuit unit 105 unnecessary charge discharge unit 106 N ⁺⁺ type semiconductor region 201 vertical charge transfer channel 202 horizontal charge transfer channel 203 potential barrier region 204 unnecessary charge discharge region 205 first horizontal charge transfer electrodes 206 second horizontal charge transfer electrodes 207 final vertical charge transfer electrodes 208 perpendicular horizontal connection area 301 N ^{over over} type semiconductor region 302 P-type well layer 303 N-type semiconductor region 304 N ^- -type semiconductor region 305 N ⁺ type semiconductor region 306 N ⁺⁺ type semiconductor region 307 P ⁺⁺ type semiconductor region 308 First layer polycrystalline silicon 309 Second layer polycrystalline silicon 310 Insulating film 311 Floating diffusion region

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/339 H01L 27/14-27/148 H01L 29/762-29/768 H04N 5/335

Claims (9)

(57) [Claims] 1. A photoelectric conversion unit, wherein said photoelectric conversion unit is adjacent to said photoelectric conversion unit.
A vertical charge transfer unit,
Placed adjacent to one end and transferred from the vertical charge transfer section
A horizontal charge transfer unit for storing the stored charge,
No need to accept charges overflowing the charge transfer section
A charge discharging unit, the horizontal charge transfer unit and the unnecessary
The charge discharging portion has the same impurity profile in the first conductivity type semiconductor layer.
Formed as a second conductivity type semiconductor region of the
The flat charge transfer section is emptied by the application of the first potential.
In the depleted state, and the unnecessary charge discharging unit is connected to the first potential.
In a non-depleted state by applying a different second potential
A solid-state imaging device. 2. An insulating film on a potential barrier portion and an unnecessary charge discharging portion.
The charge transfer electrode of the horizontal charge transfer section extends through
The solid-state imaging device according to claim 1, wherein: 3. At least one end of the unnecessary charge discharging section
A diffusion layer disposed thereon, wherein the diffusion layer has the second potential
3. The solid according to claim 1, wherein
Body imaging device. 4. At least one end of the horizontal charge transfer section
A diffusion layer disposed, wherein the first potential is applied to the diffusion layer.
4. The solid according to claim 1, wherein
Body imaging device. 5. A horizontal charge transfer unit provided in the horizontal charge transfer unit.
High level voltage is applied to all load transfer electrodes
The solid-state imaging device according to claim 1, wherein: 6. The unnecessary electric charge discharging unit according to claim 2, wherein
0.5 V or more shallower than the potential in the depleted state
The solid-state imaging device according to claim 1, wherein: 7. A shift register for transferring a charge,
Connect to shift register to convert charge to voltage
Reset having an area to which a reset voltage is applied
Output circuit having transistor and shift register
Accepts the electric charge that overflows inside the
Over which a constant drain voltage different from the pressure is applied
Solid-state imaging device having a flow drain
apparatus. 8. The overflow register according to claim 1, wherein
Buried channel with the same impurity concentration as the drain
8. The solid according to claim 7, having a flannel region.
Imaging device. 9. The method according to claim 1, wherein the constant potential drain voltage is
-Voltage that does not completely deplete the flow drain
The solid-state imaging device according to claim 7, wherein: