JP2849200B2 - Data transmission system - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a data transmission system such as a communication device using an ATM system (asynchronous transfer mode system), in particular, an ATM cell transmitted from a transmitting device to a receiving device. Related to the synchronization method.

(Prior Art) Conventionally, as a technique in such a field, for example, there is a technique described in the following literature.

Reference 1: IEICE Technical Report, CS89-55, 89
[134] (1989), Tatsuno et al., "Study of Cell Synchronization System Using mBlC Code Violation" Reference 2: Japanese Patent Application No. 1-287947 The ATM system divides transmission data into a predetermined length and transfers it. This is a multiplex transmission system in which an ATM cell is added as a header with the above address as a header.
The receiving side must identify the multiplexed ATM cells from the received data, that is, establish cell synchronization. The cell synchronization method is described in, for example, the above-mentioned document 1.

The cell synchronization system described in this document 1 is used on the encoding side.
Using the mBlC code, word synchronization is established by detecting the position of the mBlC code, and a code (CR
The frame synchronization is established by detecting the position V).

However, in this cell synchronization method, a word is configured such that the last bit of each word has a complementary code relationship with the immediately preceding bit, and this is detected to detect word synchronization. Further, when the last bit of each word has the same sign as that of the immediately preceding bit, the CRV is set, and frame synchronization is detected based on the position. Therefore, a device for protecting the word and frame from forward and backward is necessary, and the size of the receiving side device is increased. Further, there is a disadvantage that the transfer rate must be increased so that the transmission efficiency does not decrease even if the mBlC code is added.

In order to solve the drawbacks of the increase in the size of the device and the increase in the transfer speed, the present applicant has previously proposed the above-mentioned document 2. Hereinafter, the configuration will be described with reference to the drawings.

FIG. 2 is a block diagram showing the configuration of the data transmission system described in Document 2, and FIG. 3 is a transmission time chart thereof.

In this data transmission system, transmission data Doa output from the transmission side device 10 is transmitted to the reception side device 20 via the transmission line 15. The transmitting device 10 has an empty cell detection circuit 11, a synchronization pattern replacement circuit 12, and a transmission circuit 13. Further, the reception-side device 20 includes a reception circuit 21, a synchronization pattern detection circuit 22, and a cell boundary identification signal generation circuit 23.

In a data transmission system using such an ATM system, a transmission-side device 10 receives
When the input data Di composed of ATM cells is transferred, it is necessary that the boundary of the transferred ATM cells is recognized by the receiving device 20, that is, cell synchronization is required. Therefore, in the system shown in FIG. 2, cell synchronization is achieved as follows.

In the transmitting side device 10, the empty cell detection circuit 11 converts the input data Di constituting an ATM cell of a predetermined length into valid cells Dia containing data according to a cell boundary identification signal Si indicating a boundary of the ATM cell, Vacant cell Dib with no empty cell Dib, and outputs a synchronization pattern insertion signal S11 to the synchronous pattern replacement circuit 12 corresponding to the empty cell Dib. Synchronous pattern replacement circuit
12 converts the input data Di into a code of a predetermined code format,
In response to the synchronization pattern insertion signal S11, a synchronization pattern S12 including a specific code not included in the code is formed in a part of the empty cell Dib, and is transmitted to the transmission circuit 13. Transmission circuit 13
Then, the vacant cell Dib in which the synchronization pattern S12 is formed is transmitted to the receiving side device 20 via the transmission line 15 together with the valid cell Dia.

In the receiving side device 20, the receiving circuit 21 includes the transmitting side device 10
And transmits it to the synchronization pattern detection circuit 22. The synchronization pattern detection circuit 22 decodes a predetermined code included in the received signal to detect a synchronization pattern, outputs the synchronization pattern detection signal S22 to the cell boundary identification signal generation circuit 23, and outputs the output data Do.
Is output to the outside. In the cell boundary identification signal generation circuit 23,
Based on the synchronization pattern detection signal S22 and the length of the ATM cell, a cell boundary identification signal So synchronized with the ATM cell included in the signal received by the receiving circuit 21 is output to the outside.

As described above, in the data transmission system shown in FIG. 2, the transmitting side device 10 replaces a part of the empty cell Dib in the flow of the ATM cell in the input data Si with the synchronous pattern replacement circuit 1.
2 and is transmitted to the transmission line 15 after being replaced with a certain synchronization pattern S12. Then, in the receiving side device 20, the synchronization pattern S12 is detected by the synchronization pattern detection circuit 22, thereby realizing cell synchronization and reducing the device scale of the entire system.

(Problems to be Solved by the Invention) However, in the data transmission system of FIG. 2, since the violation code of the transmission line code is used as the synchronization pattern, the number of bits of the transmission data Doa increases,
As a result, the transmission path speed to be transmitted must be increased. In particular, when applied to high-speed interfaces such as 600 Mbps and 2.4 Gbps,
There is a problem that the system components are complicated and the cost is increased, and it has been difficult to solve the problem.

An object of the present invention is to provide a data transmission system system which solves the problems of the prior art that the components become complicated and the cost increases due to an increase in transmission speed.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a data transmission system for performing data transmission from a transmitting device to a receiving device by an ATM method, in which the transmitting device and the receiving device are reduced in number. Both are configured as follows.

The transmitting device is reset by the first cell boundary identification signal and generates a first pseudo random bit sequence (hereinafter, referred to as PRBS) that changes according to an error correction code (hereinafter, referred to as CRC) operation result. A generating circuit, a scrambling circuit for scrambling input data composed of ATM cells by the first PRBS, and a first cell boundary identification signal, and a header field in the ATM cells scrambled by the scrambling circuit. A CRC generation circuit that calculates a CRC and outputs the CRC calculation result, and a multiplexing circuit that writes the CRC calculation result to the scrambled ATM cell and outputs multiplexed transmission data to a transmission path. ing.

Further, in the receiving device, an input circuit that receives transmission data from the transmission path, detects a CRC, and outputs a second cell boundary identification signal, and is reset by the second cell boundary identification signal, A second PRBS generating circuit that generates a second PRBS that changes according to a CRC detected by the identification circuit, and a descrambling circuit that descrambles transmission data from the transmission line by the second PRBS, Have.

(Operation) According to the present invention, since the data transmission system is configured as described above, the input data is input to the scramble circuit of the transmission side device, and the first cell boundary identification signal is generated by the first PRBS generation signal. When input to the circuit, the first PRBS generation circuit outputs a first PRBS signal to a scramble circuit based on a CRC operation result output from the CRC generation circuit. The scramble circuit scrambles input data based on the first PRBS signal, and supplies the scramble output to a CRC generation circuit and a multiplexing circuit. CRC generation circuit 35
A CRC calculation is performed based on the scramble output, and the calculation result is provided to a first PRBS generation circuit and a multiplexing circuit. The multiplexing circuit multiplexes the CRC operation circuit and the scramble output, generates transmission data, and sends the transmission data to the transmission path.

The transmission data transmitted from the transmission path is input to the identification circuit, the second PRBS generation circuit, and the descrambling circuit of the receiving device. The discrimination circuit detects the CRC and outputs a second cell boundary discrimination signal to the outside and supplies it to the second PRBS generation circuit. The second PRBS generation circuit outputs a second PRBS signal that changes according to the CRC detected by the identification circuit to the descrambling circuit. In the descrambling circuit, the second
Based on the PRBS signal, it descrambles the transmission data from the transmission path and outputs the output data to the outside.

Thus, without using the violation code of the transmission line code as the synchronization pattern as in the past, the ATM
A cell boundary identification function can be realized by using, for example, a header echo control field (hereinafter, referred to as an HEC field) of a cell, whereby accurate data transfer can be performed without increasing a transmission line speed. Therefore, the above problem can be solved.

(Embodiment) FIG. 1 is a configuration block diagram of a data transmission system showing an embodiment of the present invention.

This data transmission system is a transmission side device that transmits input data S31 composed of ATM cells S31A in the form of transmission data S36.
The transmitting device 30 is connected to a receiving device 50 via a transmission line 40 on the output side.

The transmitting device 30 receives input data S31 composed of ATM cells S31A.
Input terminal 31 for inputting the first cell boundary identification signal S3
2 having an input terminal 32 for inputting the first P
It is connected to the reset terminal R of the RBS generation circuit 33. The first PRBS generation circuit 33 is reset by the first cell boundary identification signal S32 input to the reset terminal R, and the input terminal D
PR changed by the CRC operation result S35 input to the
It has a function of generating the BS signal S33 from the output terminal Q. The output terminal Q and the input terminal of the first PRBS generation circuit 33
31 is connected to the scramble circuit 34.

The scramble circuit 34 is a circuit that scrambles the input data S31 according to the first PRBS signal S33, and includes, for example, an exclusive OR circuit (hereinafter, referred to as an ExOR circuit) 34a. On the output side of this scramble circuit 34,
The CRC generation circuit 35 and the multiplexing circuit 36 are connected.

The CRC generation circuit 35 receives the first cell boundary identification signal S32, calculates the CRC of the header field in the scramble output S34, and outputs the CRC calculation result S35 to the input terminal D of the first PRBS generation circuit 33 and the multiplexed signal. This is a circuit for outputting to the conversion circuit 36. The multiplexing circuit 36 is a circuit that multiplexes the scramble output S34 and the CRC operation result S35 and outputs the transmission data S36 to the output terminal 37, and is configured by, for example, a multiplexer. The output terminal 37 is connected to the receiving device 50 via the transmission line 40.

The reception-side device 50 has an input terminal 51 for inputting transmission data S36 transmitted via the transmission path 40 as reception data S51. The input terminal 51 has an identification circuit 32 and a second PRBS generation circuit.
53 and a descrambling circuit 54 are connected.

The identification circuit 52 detects the CRC from the received data S51 and performs the second
And outputs the cell boundary identification signal S52 to the output terminal 55. The output side of the identification circuit 52 is connected to the reset terminal R of the second PRBS generation circuit 53. Second PRBS generation circuit
53 is reset by the second cell boundary identification signal S52 input to the reset terminal R, receives the CRC detected by the identification circuit 52 from the input terminal D, and changes the second P changed by the CRC.
This circuit outputs an RBS signal S53 from an output terminal Q. The output terminal Q is connected to a descrambling circuit 54.

The descrambling circuit 54 is a circuit that descrambles the received data S51 using the second PRBS signal S53,
For example, it is configured by an ExOR circuit 54a. The output data S54 of the descramble circuit 54 is output from an output terminal 56.

FIG. 4 is a diagram showing a configuration example of the PRBS generating circuits 33 and 53 in FIG.

The first and second PRBS generating circuits 53 and 54 shown in FIG. 1 have the same circuit configuration, and include an 8-bit shift register 61 and an ExOR.
A gate 62 is provided. The shift register 61 includes a clock input terminal CLK, a reset terminal R for inputting a cell boundary identification signal SA, a parallel load input terminal PL, an 8-bit D0 to D7 input terminal D for inputting a CRC operation result SB, and an 8-bit output terminal. It has Q0 to Q7 and a serial-in terminal SI. The output terminals Q6 and Q7 are connected to the serial-in terminal SI via the ExOR gate 62, and the PR output from the output terminal Q7
The BS signal SC is output from the output terminal Q.

The PRBS generation circuits 33 and 53 are reset by the gel boundary identification signal SA, and generate PRBs generated in accordance with the CRC operation result SB.
It has a function to change the S signal SC. That is, the shift register 61 is a rightward shift register having an 8-bit parallel load function, and is controlled by the input to the reset terminal R and the parallel load input terminal PL. When the cell boundary identification signal SA is input to the reset terminal R, the shift register 61 is set to "H". And this PR
The BS generation circuits 33 and 53 are, for example, PRBs of the generation polynomial X ⁸ + X ⁷ +1
When the S signal SC is generated and the cell boundary identification signal SA is inputted to the reset terminal R, each register constituting the shift register 61 is set to "H", and the input terminal D is controlled by controlling the parallel load input terminal PL. When the CRC calculation result SB is read into each register, a function of generating a sequence signal from an arbitrary position of PRBS is provided.

FIGS. 5 (a) and 5 (b) are time charts showing the operation of FIG. 1, and FIG.
(B) is a reception-side time chart. The operation of FIG. 1 will be described with reference to FIG.

In FIG. 5A, the input data S31 includes a header field S31a, an HEC field S31b, and an information field S31.
This is a cell stream in which an ATM cell S31A composed of 31c continuously flows. The cell boundary identification signal S32 is a signal indicating the cell boundary of the cell stream in the input data S31.

In the transmitting device 30, the input data S31 is
Then, when the first cell boundary identification signal S32 is input to the input terminal 32, the input data S31 is input to the ExOR circuit 34a, and the first cell boundary identification signal S32 is input to the first P terminal.
It is input to the RBS generation circuit 33 and the CRS generation circuit 35. First
In the PRBS generation circuit 33, the first cell boundary identification signal S32 and C
Based on the CRC calculation result S35 output from the RC generation circuit 35, a first PRBS signal S33 is generated and supplied to the ExOR circuit 34a. The first PRBS signal S33 includes a PRBSa corresponding to the header field S31a in the input data S31 and a PRBSb corresponding to the HEC field S31b and the information field S31b.
And it is comprised.

In the ExOR circuit 34a, the input data 31 and the first PRBS signal S33
Then, the input data S31 is scrambled by the first PRBS signal S33, and the scrambled output S34 is supplied to the CRC generation circuit 35 and the multiplexing circuit 36. This scramble output S34 is the header field S34
a, an HEC field S34b, and an information field S34c.

The CRC generation circuit 35 calculates the CRC of the header field S34a in the scramble output S34 from the first cell boundary identification signal S32 and the scramble output S34, and calculates the CRC calculation result.
S35 is output to the multiplexing circuit 36 and the first PRBS generating circuit 33. The CRC calculation result S35 (S35a) is the AT sent continuously.
It is output corresponding to each header field S31a of the M cell S31A. The multiplexing circuit 36 replaces the HEC field S30b of the scramble output S34 with the CRC operation result S35a, and outputs the transmission data S36 to the output terminal 37.

The transmission data S36 includes a header field S34a, an HEC field S35a, and an information field S34c. In the transmission data S36, the header field S34a
And the continuous field S34c is scrambled, and since the HEC field S35a is about several bits, the transmission data S36
Satisfies the conditions of DC component suppression and homo-code continuation suppression. Further, the HEC field S35a is the header field S34a
Since the RC operation result is written, the header field S34a and the HEC field S35a can be re-recognized in the receiving device 50. The operation will be described next with reference to FIG.

In FIG. 5B, the reception data S51 is
The transmission data S36 is transmitted through the header field S51a, and includes a header field S51a, an HEC field S51b, and an information field S51c. Such received data S51
Is input to the input terminal 51 of the receiving device 51, the received data S51 is supplied to the identification circuit 52, the input terminal D of the second PRBS generating circuit 53, and the ExOR circuit 54a of the descrambling circuit 54.

The identification circuit 52 performs a CRC operation on the received data S51, detects the header field S51a and the HEC field S51b, uses them to generate a second cell boundary identification signal S52, and uses the output terminal 55 and the second It outputs to the reset terminal R of the PRBS generation circuit 53. In the second PRBS generation circuit 53, the reception data S51 is reset by the second cell boundary identification signal S52.
PRB generated by the contents of the HEC field S51b of the second
The PRBS signal S35b in the S signal S53 is changed. This second PR
The BS signal S53 is the same as the first PRBS signal S33 in the transmitting device 30, and the signal S53 is supplied to the ExOR circuit 54a.

ExOR circuit 54a receives second PRBS signal S53 and received data S51
And exclusive-ORing the received data S51 with the second PRBS signal S53 to obtain the output data S51
54 is output to the output terminal 56. The output data S54 includes a header field S54a, an HEC field S54b, and an information field S54c. The header field S54a and the information field S54c are the same as the header field S53a and the information field S31c of the input data S31.

 This embodiment has the following advantages.

(A) The cell boundary discriminating function is realized by using the HEC field S31b of the ATM cell S31A, and the DC component suppression and the same code continuation suppression function are implemented by the scrambling function.
Therefore, the cell boundary identification function, the DC component suppression function, and the homo-code continuation suppression function required for the interface function of the data transmission system can be realized without increasing the transmission speed. In addition, since the transmission speed is not increased, the components of the data transmission system can be simplified and the cost can be reduced.

(B) Since the HEC operation result S35a of the CRC operation result S35 in the transmitting device 30 is different for each ATM cell S31A, the operation result S35a is used for scrambling the information field S31c, and the first PRBS signal S33 PRBSb differs for each ATM cell. Therefore, accidentally or artificially the information field
The probability that the scramble function is impaired by the data generated in S31c is reduced, and highly accurate data transmission becomes possible.

(C) The identification circuit 52 in the reception-side apparatus 50 is provided with a header correction function by HEC, so that the reception data S51
The transmission line errors in the header field S51a and the HEC field S51b are corrected, and accurate cell synchronization can be performed even when a transmission line error occurs.

Note that the present invention is not limited to the above-described embodiment.
Various modifications are possible, such as adding a circuit block for improving the transmission path accuracy in the transmitting device 30 and the receiving device 50 in the figure.

(Effects of the Invention) As described above in detail, according to the present invention, a first PRBS generation circuit, a scramble circuit, a CRC generation circuit, and a multiplexing circuit are provided in a transmission side device, and an identification is provided in a reception side device. Circuit, a second PRBS generating circuit, and a descrambling circuit, the HEC of the ATM cell in the input data is provided.
The cell boundary identification function can be realized using the field. Furthermore, the DC component suppression and the same code continuation suppression function can be realized by the scramble function. Therefore, without increasing the transmission line speed, the cell boundary identification function, DC component suppression function,
In addition to realizing the function of suppressing the same code continuity, since the transmission speed is not increased, simplification and cost reduction of system components can be expected.

Further, a CRC calculation result output from the CRC generation circuit is input to a first PRBS generation circuit, a first PRBS signal is output from the first PRBS generation circuit, and input data is input based on the first PRBS signal. Is to be scrambled.
Therefore, the user who uses the information field of, for example, an ATM cell in the input data does not know the PRBS weighed in the information field, and the transmission path may be affected by the data generated accidentally or intentionally in the information field. Can be removed, thereby enabling accurate data transfer.

[Brief description of the drawings]

1 is a configuration block diagram of a data transmission system showing an embodiment of the present invention, FIG. 2 is a configuration block diagram of a conventional data transmission system, FIG. 3 is a transmission time chart of FIG.
FIG. 4 is a block diagram of the PRBS generating circuit in FIG. 1, and FIGS. 5 (a) and 5 (b) are time charts of FIG. 1, and FIG. 4 (a) is a time chart on the transmitting side and FIG. (B) is a reception side time chart. 30 ... transmitting side device, 33,53 ... first and second PRBS generation circuits, 34 ... scramble circuit, 35 ... CRC generation circuit, 36
… Multiplexing circuit, 40… transmission line, 52… identification circuit, 54…
… Descrambling circuit, S31 …… Input data, S32, S52…
... First and second cell boundary identification signals, S33 and S53 ... First and second
PRBS signal, S34 ... scramble output, S35 ... CRC calculation result, S36 ... transmission data, S51 ... reception data, S54
……output data.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-3-80729 (JP, A) JP-A-55-28620 (JP, A) JP-A-58-17745 (JP, A) JP-A-63-1988 278436 (JP, A) JP-A-62-122349 (JP, A) JP-A-3-235441 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04L 12/28 H04L 12 / 56

Claims (1)

(57) [Claims] 1. A data transmission system for performing data transmission in which an ATM system transmits data from a transmitting device to a receiving device, wherein the transmitting device is reset by a first cell boundary identification signal, and performs an error correction code operation. A first pseudo-random bit sequence generating circuit for generating a first pseudo-random bit sequence that varies according to the result; and an ATM by the first pseudo-random bit sequence.
A scramble circuit that scrambles input data composed of cells; and the first cell boundary identification signal is input, and an error correction code of a header field in an ATM cell scrambled by the scramble circuit is calculated and the error correction code is calculated. An error correction code generation circuit that outputs an operation result, and a multiplexing circuit that writes the error correction code operation result in the scrambled ATM cell and outputs multiplexed transmission data to a transmission line, An identification circuit that receives transmission data from the transmission line, detects an error correction code and outputs a second cell boundary identification signal, and is reset by the second cell boundary identification signal; A second pseudo-random bit sequence for generating a second pseudo-random bit sequence that varies with the error correction code detected in the circuit Data transmission system comprising: the generating circuit, and a descramble circuit for performing a descrambling of the transmitted data from the transmission channel by said second pseudo random bit sequence.