JP2842385B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a contact plug.

[0002]

2. Description of the Related Art Recent advances in miniaturization and high integration technologies have enabled scaling in a planar direction with respect to a substrate, making it possible to form quarter micron contacts. However, on the other hand, scaling in the direction perpendicular to the substrate is currently difficult because the capacitance between the substrate and the wiring and the capacitance between the upper wiring and the lower wiring increase.
For this reason, as the scaling in the planar direction with respect to the substrate progresses, the aspect ratio of the contact portion increases, and the use of a contact plug is indispensable for reliable connection at the contact portion.

[0003] For example, as a method of forming a contact plug, Japanese Patent Application Laid-Open Nos.
No. 32630.

[0004] First, the one described in JP-A-1-147843 will be described. As shown in FIG. 10A, a device isolation region 102, a first electrode 105, an interlayer insulating film 107-1,
A second electrode 106 and an interlayer insulating film 107-2 are formed, a contact opening 111 is formed at a desired position, and a conductive film 112 is grown. At this time, non-doped polysilicon or doped polysilicon is used as the material of the conductive film 112. However, in the case of non-doped polysilicon, there is no problem if impurities are added after deposition to make a conductive material.

Next, as shown in FIG. 10B, the conductive film 112 is etched back using a known technique until the surface of the interlayer insulating film 107-2 is exposed to form a contact plug 112a. At this time, the surface of the first contact plug 112a is lower than the surface of the interlayer insulating film 107-2.

Finally, as shown in FIG. 10C, a semiconductor substrate 101 is formed by attaching a conductive film 113.
The diffusion layer 104 on the surface and the conductive film 113 are connected via the contact plug 112a.

In FIG. 10 (B), the etching at the time of performing the etch back is performed by selecting conditions such as the type of etching gas, power and pressure at the time of etching.
The condition that the interlayer insulating film 107-2 has an etching rate higher than that of the conductive film 112 The condition that the interlayer insulating film 102-2 and the conductive film 112 have the same etching rate is better than that of the conductive film 112. Any of the conditions having a slow etching rate can be selected.

When the etching conditions or the etching conditions are used, there is a risk that the interlayer insulating film 107-2 is etched by overetching at the time of etching back and the surface of the second electrode 106 is exposed. For this reason, etching conditions are usually used.

Japanese Patent Application Laid-Open No. 1-147843 also shows a diagram similar to FIG. 10B, and it is considered that etching conditions are used.

On the other hand, in Japanese Unexamined Patent Application Publication No. 62-32630, as shown in FIG. 11B, the upper portion of the polysilicon plug 34 appears to protrude from the surface 22 of the dielectric layer. In the lower left column of page 5 of Japanese Unexamined Patent Publication No. 62-32630, the method used for etching back the polysilicon layer 30 is preferably such that the polysilicon layer 30 is etched at substantially the same rate as the lower dielectric layer 20. A slight difference in the etch rate of the polysilicon layer 30 and the dielectric layer 20 with respect to the position of the surface 22 of the dielectric layer 20
The vertical position of the peripheral surface 36 of the polyplug 34 will cause fluctuations. A typical etching method would position the peripheral surface 37 of the polyplug 34 either above or below the surface 22 of the dielectric layer 20 from between 0 and 0.3 microns. It is clear from the description that the etching conditions are used, and also from the description in the specification, the positional relationship between the surface of the polyplug 34 after the etching and the dielectric layer 20 is not stable.

[0011]

The first problem is that it is difficult to stably form a contact plug under the above-described etching conditions, and under the etching conditions, the contact plug 112a is formed by the interlayer insulating film 107.
The surface is located below -2. In this case, in the case of a fine contact, the contact area between the contact plug and the wiring formed on the contact plug is small, so that the contact resistance cannot be ignored.

A second problem is that, when a plurality of contacts 211 are to be provided in the diffusion layer 204 as shown in FIG. The shape of the contact opening provided in the semiconductor substrate 210 is not circular but is distorted into an ellipse when viewed from the top surface of the semiconductor substrate.

The reason for this is that, when the underlayer is flat, FIG.
As shown in (B) and (C), the first opening 211-1P
Has a circular shape when viewed from the top of the semiconductor substrate. However, in a portion having a step in the base, exposure light is applied to the underlying interlayer insulating film 207.
This is because the shape of the second opening 211-2P of the photoresist film is not a circle when viewed from the upper surface of the semiconductor substrate but is distorted and an elliptical shape.

On the other hand, when the horizontal scaling proceeds, the contact portion corresponding to the second opening 211-2P becomes a bird's beak portion (diffusion layer 20) of the element isolation region 202.
4 as a result, the bird's beak portion of the element isolation region 202 is etched, and the semiconductor substrate 201 and the diffusion layer 204 are etched. May be short-circuited by the contact plug.

The third problem is that in the case of fine contacts,
In order to reduce the contact resistance between the contact plug and the metal wiring formed on the contact plug, for example, aluminum, copper, silicide, etc., before forming the wiring on the contact plug, for example, inert gas such as argon, helium, etc. In some cases, a natural oxide film on the surface of a contact plug is etched and cleaned by dry etching using a gas, HF gas, or the like.

When this cleaning process is performed, the interlayer insulating film 207 is formed.
Is also etched at the same time, and the material of the etched interlayer insulating film is re-adhered to the surface of the contact plug during the cleaning process, causing the contact resistance to vary. Further, if this cleaning treatment is not performed, the contact resistance becomes higher as compared with the case where the cleaning treatment is not performed by the natural oxide film on the contact plug surface.

It is an object of the present invention to firstly increase the contact area between a contact plug and a wiring formed on the contact plug, and secondly, to increase a contact resistance between the contact plug and a wiring formed on the contact plug. Third, it is to prevent the shape from being distorted due to the influence of the step of the base in the photolithography process and the contact size from being larger than expected in some places.

[0018]

According to a method of manufacturing a semiconductor device of the present invention, a first conductive film made of a first conductive film is formed on a first insulating film on a semiconductor substrate having a diffusion layer formed on a surface thereof. electrode,
Sequentially depositing a first interlayer insulating film, a second electrode, a second interlayer insulating film, a conductive buffer film, and a second insulating film having an anti-reflection action together with the buffer film; Forming an opening reaching the diffusion layer from the surface of the second insulating film by lithography, forming a contact plug filling the opening with a second conductive film, and removing the second insulating film. , a step of the surface portion of the contact plug protruding from the surface of the buffer layer, the surface and the buffer of the contact plug
A step of cleaning the surface of the film to remove a natural oxide film; and depositing and patterning a third conductive film on the buffer film including the projecting surface of the contact plug to expose the interlayer insulating film and form a wiring layer. Forming step.

The absolute of the second in this case the second conductive film
After filling the opening by depositing the Enmaku entire surface, it is possible to form the contact plugs, leaving is etched only to the open mouth.

[0020] Alternatively, it may be formed a contact plug to fill this selectively growing the second conductive film in the open mouth. The surface of the second conductive film may be subjected to selective growth until reaching the surface of the second insulating film, a second reaching the first opening and the second electrode reaching the diffusion layer
Openings were formed respectively, wherein when forming the second conductive film, wherein the first apertures及 beauty said second apertures each selection of the grown first apertures after allowed embedding is complete It said first apertures及 beauty said second opening is switched to confluency prior to
Fill mouth with said second conductive film, the first leaving each only said first apertures及 beauty second apertures is etched
And a second contact plug may be formed.

Further, the buffer film may be a silicon film or a titanium nitride film, and a polysilicon film, an amorphous silicon film, a refractory metal film or a refractory metal silicide film may be used when the second conductive film is entirely grown. it can. When the second conductive film is selectively grown, it can be a polysilicon film or a high melting point metal film.

Since the second insulating film is removed after the formation of the contact plug, it is easy to make the contact plug protrude from the surface of the buffer film.

Even if the natural oxide film is removed by dry etching to clean the surface of the contact plug and the material of the buffer film is re-attached, there is no problem because the material is conductive.

[0024] The so buffer layer and are imparted an antireflection effect in the composite film of the second insulating film can reduce the effect of reflections from the underlying during exposure, of the opening of the contact shape
And the substantially circular opening can be formed .

[0025]

Next, a first embodiment of the present invention will be described.

As shown in FIG. 1A, using a known technique, an element isolation region 302, a gate oxide film 303 (first insulating film) , a semiconductor substrate 301 (P-type silicon substrate ) ,
N + type diffusion layer 304, first electrode 305 (gate electrode
The first conductive film is patterned by using the same method ), the interlayer insulating film 307-1, the second electrode 306, and the interlayer insulating film 307-2.
To form Next, a polysilicon film having a thickness of 30 nm or 2
Buffer film 30 made of 5 nm titanium nitride (TiN) film
8, an insulating film 309 (second insulating film) such as a silicon oxide film or a silicon nitride film having a thickness of 20 to 50 nm is formed, a photoresist film 310 is formed by a coating method, and exposed using i-line, Develop and place contact opening 3 in desired position
11 is transferred to the diffusion layer 30 by a known etching technique.
Expose 4.

Next, as shown in FIG. 1B, after removing the photoresist film 310, for example, 200 to 1000
A conductive film 312 of nm is deposited on the entire surface.

Preferably, the conductive film 312 is made of silicide with a high melting point metal such as polysilicon, amorphous silicon, silicon, tungsten, molybdenum, or the like.
The opening is completely filled with the conductive film 312 using a metal such as tungsten or aluminum.

For example, if the conductive film 312 is a film of good coverage such as polysilicon or amorphous silicon,
If the film is grown to a thickness of half or more of the opening width, the opening is completely buried. Therefore, an appropriate film thickness may be determined according to the opening size.

The conductive film 312 is made of polysilicon,
When growing amorphous silicon, silicon, or the like, the impurity may be grown while being doped with an impurity, or the impurity may be introduced by a method such as thermal diffusion, ion implantation, or the like after the completion of the non-doping.

Next, the first etching is performed by a known etching technique.
Is etched to form a contact plug 312a shown in FIG. As this etching, it is preferable to detect the end point of the etching when the conductive film 312 is completely removed from the surface of the first insulating film 309 (by detecting a change in the plasma spectrum during the etching and detecting the end point of the etching). And the above-mentioned condition that the insulating film 309 has an etching rate lower than that of the conductive film 312 (for example, the first insulating film 309 is a silicon oxide film, and the first conductive film 312 is a polysilicon film). If the film is used in combination with reactive ion etching using a mixed gas of HCl and O ₂ , the contact plug 312 a becomes 10 .mu.m less than the surface of the first insulating film 309.
It can be formed stably so that the surface is located at a position below ２０20 nm.

Next, as shown in FIG. 2A, the insulating film 309 is removed by a known etching technique. For example, when the insulating film 309 is a silicon oxide film, wet etching with buffered hydrofluoric acid is preferably used.

As a result, the surface of the contact plug 312a is made 10 to 30 nm thicker than the surface of the buffer film 308.
Can be on top.

Next, for example, as shown in FIG.
An inert gas such as argon and helium and a natural oxide film of HF gas are removed. At this time, even if the material of the antireflection film 308 is re-attached to the contact plug 312a, there is no problem because the material is conductive. By this surface treatment, finally, the surface of the contact plug 312b is located above the surface of the thinned buffer film 308a and the interlayer insulating film 307.
-2 can be formed stably so as to be at a position 20 to 40 nm above the surface.

Next, as shown in FIG.
Grow 13. The conductive film 313 is made of silicide with amorphous silicon, polysilicon, doped polysilicon, a refractory metal such as tungsten or molybdenum, or polycide which is a composite film of silicide and polysilicon, metal such as aluminum, copper, or gold. And a few percent of silicon
Aluminum, copper, gold and the like can be applied.

Preferably, a cleaning treatment step (see FIG.2
(B)) and a conductive film forming step (FIG.2(C)) continuously
After the cleaning process, the contact plug surface
For example, when the pressure is reduced so that the natural oxide film cannot be formed again
Conditions and inert gas atmosphere such as nitrogen, argon, helium, etc.
In the situation such as3Of the conductive film 313 is formed, for example, by CV.
It is desirable to start by the D method or the sputtering method.

Next, the conductive film 313 and the buffer film 308a
Is patterned to form a contact plug 312b.
To form a wiring layer to be connected.

The case where a contact plug is formed by providing an opening on a diffusion layer having a flat underlayer has been described.
Even in the situation shown in FIG. 9 or when an opening is provided over the first electrode or the second electrode, since the buffer film 308 and the first insulating film 309 have an antireflection effect, the photoresist film 310 Since the influence of the reflection from the light is reduced, the distortion of the shape of the contact opening is reduced, and the contact opening can be formed in a substantially circular shape.

The buffer film does not need to be transparent to the exposure light (i-line in this embodiment), but preferably absorbs light. An antireflection film used for an optical part such as a lens is required to have transparency, but here, there is no necessity for that purpose.

Next, a second embodiment of the present invention will be described.

As in the first embodiment, FIG.
As shown in (A), on a semiconductor substrate 401, an element isolation region 402, a gate oxide film 403 (first insulating film) , a diffusion layer 404, a first electrode 405, an interlayer insulating film 407-1,
A second electrode 406, an interlayer insulating film 407-2, a buffer film 408 (for example, a titanium nitride film of 25 nm), a second insulating film 409 (for example, a silicon oxide film of 20 to 50 nm),
A photoresist film 410 is formed, exposed by i-line, developed to form an opening 411, etched to expose the diffusion layer 404, and a conductive film 412 is formed as shown in FIG. I do.

Preferably, the conductive film 412 (200 to 10)
00 nm) is polysilicon, amorphous silicon,
The opening is completely filled with the conductive film 412 by using silicon, silicide with a high melting point metal such as tungsten or molybdenum, or metal such as tungsten or aluminum.

For example, if the conductive film 412 is a film of good coverage such as polysilicon, amorphous silicon, etc., if the film is grown to a thickness of half or more of the opening width, the opening is completely filled. The appropriate film thickness may be determined according to the above.

Also, polysilicon is used as the conductive film 412.
When growing amorphous silicon, silicon, or the like, the impurity may be grown while doping the impurity, or the impurity may be introduced by a method such as thermal diffusion or ion implantation after the completion of the non-doping.

Next, a known method for detecting the end point of the etching, and the above-described conditions in which the insulating film 409 has an etching rate higher than that of the conductive film 412 (for example, when the first insulating film is a silicon oxide film, If the conductive film 1 is a polysilicon film, the contact plug 412a has an insulating film as shown in FIG. 3 (c) when the combined use of reactive ion etching using a mixed gas of CHF ₃ and CF ₄ is used. 40
9 can be formed so as to be 10 to 20 nm higher than the surface.

Next, as shown in FIG. 4A, the insulating film 409 is removed by a known etching technique. For example, when the insulating film 409 is a silicon oxide film, it is preferable to use wet etching with buffered hydrofluoric acid. Thus, the surface of the contact plug 412b can be 30 to 70 nm above the surface of the buffer film 408.

Next, a natural oxide film on the surface of the contact plug 412a is removed by performing dry etching using an inert gas such as argon or helium, or HF gas. By this surface treatment, as shown in FIG. 4B, finally, the contact plug 412b formed of the conductive film 412 is located above the surface of the thinned buffer film 408a and the interlayer insulating film 407-2. 40 than the surface of
It can be formed stably such that the surface comes to a position on the order of ８０80 nm.

Here, in the above-described first embodiment,
While the contact plug formed of the conductive film is 20 to 40 nm above the surface of the interlayer insulating film, in the present embodiment, the contact plug is formed to project to 40 to 80 nm above the surface of the interlayer insulating film. Therefore, it goes without saying that the contact area with the wiring layer is increased and the contact resistance is reduced as compared with the first embodiment.

Next, as shown in FIG. 4C, a conductive film 413 is grown in the same manner as in the first embodiment. The conductive film 413 is a silicide of a high melting point metal such as amorphous silicon, polysilicon, doped polysilicon, tungsten, molybdenum, or a composite film of a silicide and a polysilicide as in the first embodiment. Metals such as polycide, aluminum, copper, and gold, and aluminum, copper, and gold containing several percent of silicon can be applied. More preferably, the cleaning treatment step (see FIG. 4 (B)) and the operation of the second conductive film forming step are desirably performed continuously. After the cleaning treatment, for example, the pressure is reduced so that a natural oxide film cannot be formed again on the surface of the contact plug. It is desirable that the formation of the conductive film 413 be started by, for example, a CVD method, a sputtering method, or the like in a situation such as the above or in an atmosphere of an inert gas such as nitrogen, argon, and helium. It goes without saying.

Next, the stacked film of the conductive film 413 and the buffer film 48a is patterned to form a contact block 412b.
To form a wiring layer to be connected.

Although the case where the contact plug is formed by providing an opening on the diffusion layer having a flat base as in the first embodiment has been described, the situation as shown in FIG. Even when an opening is provided on the second electrode or the second electrode, the photoresist film 409
Is less affected by the reflection from the base, so that the distortion of the shape of the contact opening is reduced and the contact opening can be formed in a substantially circular shape.

Further, as a modification of the first and second embodiments, when forming a contact plug, a known method for judging the end point of etching is used, and the condition that the insulating film and the conductive film have substantially the same etching rate is used. May be used.
In this case, as described in the related art, the position of the surface of the contact plug formed of the conductive film varies slightly during etching, but can be formed at substantially the same position as the surface of the insulating film. The contact plug can be formed 40 to 60 nm above the surface of the interlayer insulating film.

Next, a third embodiment of the present invention will be described.

As in the first and second embodiments, as shown in FIG. 5A, an element isolation region 502, a gate oxide film 503, a diffusion layer 504 and a first isolation region 502 are formed on a semiconductor substrate 501.
Electrode 505, interlayer insulating film 507-1, second electrode 50
6, an interlayer insulating film 507-2, a buffer film 508 (for example, a titanium nitride film of 25 nm), and an insulating film 509 (for example, 20 nm).
-50 nm silicon oxide film), photoresist film 50
1 is formed, exposed by i-line, developed, and
11 is formed and etching is performed to expose the diffusion layer 504.

Next, the photoresist film 510 is removed,
For example, it is described in JP-A-4-58525,
As shown in FIG. 5B, a conductive film 512 of, for example, 200 to 1000 nm is grown by using a selective CVD technique for selectively growing polysilicon in the contact.

The method described in the above-mentioned publication discloses a growth gas (SiH
₂ Cl ₂ ) and an etching gas (HCl) at the same time to selectively form a polysilicon layer in the contact hole.
and l) an etching step for removing an undesired silicon lump formed on the insulating film by sequentially flowing l), thereby selectively growing a polycrystalline silicon film in the contact hole.

Preferably, the conductive film 512 can be used because it is possible to selectively grow a metal such as doped polysilicon, silicon or tungsten in addition to polysilicon. In the case where polysilicon or silicon is grown as the conductive film 512, the conductive film 512 may be grown while being doped with impurities, or the impurities may be introduced by a method such as thermal diffusion or ion implantation after completion of the non-doped growth.

Next, as shown in FIG. 5C, the insulating film 509 is removed by a known etching technique. For example, when the insulating film 509 is a silicon oxide film, an oxide film wet etch (buffered hydrofluoric acid) is preferably used.

[0059] Thus the surface of the contact plug formed in the conductive film 512 may be on 30~70nm than the surface of the bar Ffa film 508.

Next, the natural oxide film on the surface of the conductive film 512 is removed by dry etching using an inert gas such as argon or helium, or HF gas, for example, as shown in FIG. Thus, contact plug 512a is formed. By this surface treatment, finally, the contact plug 512a can be 40 to 80 nm above the surface of the interlayer insulating film 507-2.

Here, in the above-described first embodiment,
The contact plug is 20 to 4 times larger than the surface of the interlayer insulating film.
However, in the present embodiment, as in the above-described second embodiment, the height can be 40 to 80 nm above the surface of the interlayer insulating film 507-2. Needless to say, the contact area with the wiring layer increases and the contact resistance decreases as compared with the embodiment.

Next, as shown in FIG. 6B, a conductive film 513 is grown as in the first embodiment. As in the first embodiment, the second conductive film 513 has a silicide of a high melting point metal such as amorphous silicon, polysilicon, doped polysilicon, tungsten, molybdenum, or a silicide and polysilicon. Metals such as polycide, aluminum, copper, and gold, which are composite films, and aluminum, copper, and gold containing several percent of silicon can be applied. Further, preferably, cleaning is performed in the same manner as in the first embodiment. It is desirable that the process (FIG. 6A) and the operation of forming the second conductive film be performed continuously. After the cleaning process, for example, a natural oxide film cannot be formed again on the surface of the contact plug. It is desirable that the formation of the second conductive film 513 be started by, for example, a CVD method, a sputtering method, or the like under a reduced pressure state or an inert gas atmosphere such as nitrogen, argon, and helium. Needless to say, the.

Next, the conductive film 513 and the buffer film 508a
The contact plug 512a
Is formed to connect with the wiring layer.

Further, as in the case of the first embodiment, the case where an opening is formed on a diffusion layer having a flat base is described. However, the situation shown in FIG. Even if an opening is provided on the electrode, the photoresist film 510 is less affected by the reflection from the base by the buffer film 508, so that the distortion of the shape of the contact opening is reduced and the contact opening can be formed in a substantially circular shape. .

Next, a fourth embodiment of the present invention will be described. As shown in FIG. 7A, the steps up to the formation of the photoresist film 610 are performed in the same manner as in the first to third embodiments. Next, i-line exposure and development are performed to open
11-1 and 611-2 are formed and etched to expose the diffusion layer 604 and the second electrode 606, respectively.

Next, as shown in FIG. 7B, the conductive film 612-2 is buried up to the entrance of the shallower opening by a selective growth method similar to that of the third embodiment. At this time, the conductive film 612-1 is partially formed in the deeper opening. Next, switching to the entire growth without selectivity, FIG.
As shown in (C), a conductive film 612 is formed.

Next, as in the first embodiment, as shown in FIG. 8, contact plugs 612a, 612b
To form This may be the same as in the second embodiment. The following steps are the same as in the first and second embodiments.

This is because, if there are openings for contacts having different depths, if only selective growth is used, the position of the surface of the contact plug buried in the shallow opening and the contact buried in the deep opening At the position of the plug surface, the former is a method for preventing the amount of protrusion from the surface of the interlayer insulating film from increasing.

[0069]

As described above, according to the present invention, a buffer film and a second insulating film are deposited on an interlayer insulating film, an opening for contact is provided, a contact plug is formed, and a second insulating film is formed. By removing the film, the contact plug can be reliably made to protrude from the buffer film, so that the contact area with the wiring layer can be increased. Since the second insulating film plays a role of a cushion in determining the position of the surface of the contact plug, and the buffer film plays a role of an etching stop layer when removing the second insulating film, the thickness of the interlayer insulating film is reduced. Can be prevented from affecting. Therefore, electrical characteristics and reliability can be improved.

Further, since the conductive buffer film prevents the insulator from re-adhering when the natural oxide film on the contact plug surface is removed, the contact resistance with the wiring layer can be reduced.

Further, since the buffer film and the second insulating film are provided on the surface of the interlayer insulating film, the anti-reflection effect of the buffer film and the adverse effect of the reflection from the base can be suppressed. Can be reduced. Therefore, high integration and improvement in reliability can be achieved.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views in a process order for explaining a first embodiment of the present invention.

FIGS. 2A to 2C are sectional views in the order of steps, which are separated from FIGS.

FIGS. 3A to 3C are cross-sectional views in the order of steps for explaining a second embodiment of the present invention.

FIG. 4 is a cross-sectional view in the order of steps, which is shown separately in FIGS.

FIGS. 5A to 5C are cross-sectional views in the order of steps for explaining a third embodiment of the present invention.

FIG. 6 is a sectional view in the order of steps, which is shown separately in FIGS.

FIGS. 7A to 7C are cross-sectional views in the order of steps for explaining a fourth embodiment of the present invention.

FIG. 8 is a sectional view showing a state following FIG. 7;

9 is a plan view (FIG. 9A) showing a target shape for explaining a problem of the prior art, and an actual shape of a portion corresponding to a cross-sectional view taken along line AA of FIG. 9A. FIG. 9 is a sectional view showing
(B)) and a plan view corresponding to FIG.
(C)).

FIGS. 10A to 10C are cross-sectional views in the order of steps, illustrating the technique described in Japanese Patent Application Laid-Open No. 1-147843;

FIGS. 11A and 11B are cross-sectional views in the order of steps for explaining the technology described in Japanese Patent Application Laid-Open No. 62-32630; FIGS.

[Explanation of symbols]

101, 201, 301, 401, 501, 601
Semiconductor substrate 102 to 602 Element isolation region 303 to 603 Gate oxide film 104 to 604 Diffusion layer 105 to 605 First electrode 106, 206 to 606 Second electrode 107-1, 207, 207-1 to 607-1, 107
-2-607-2 interlayer insulating film 308-608 buffer film 309-609 insulating film 310-610 photoresist film 211, 211-1P, 211-2P, 311-61
1, 611-1, 611-2 Opening 312-612, 612-1, 612-2 Conductive film 312a-612a Contact plug 312b, 412b, 612b Contact plug 10 Wafer substrate 12 Diffusion area 14 Wafer surface 16 Field oxidation Object area 18 Polysilicon gate 20 Silicon dioxide layer 22 Dielectric layer surface 24 Contact hole 30 Polysilicon layer 32 Polysilicon layer surface 34 Polyplug 36 Peripheral surface 37 Polyplug surface

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/28-21/288 H01L 21/3205-21/3213 H01L 21/768

Claims (3)

(57) [Claims] 1. A first electrode made of a first conductive film, a first interlayer insulating film, a second electrode, and a first conductive film on a first insulating film on a semiconductor substrate having a diffusion layer formed on a surface thereof. Sequentially depositing a second interlayer insulating film, a conductive buffer film, and a second insulating film having an anti-reflection action together with the buffer film; and forming the second insulating film from the surface of the second insulating film by photolithography. Forming an opening reaching the diffusion layer and forming a contact plug filling the opening with a second conductive film; and removing the second insulating film, so that a surface portion of the contact plug is formed on the buffer film. Projecting from the surface, the surface of the contact plug and the
Process to clean the surface of the buffer film and remove the natural oxide film
And depositing a third conductive film on the buffer film including the projecting surface of the contact plug and patterning the third conductive film to expose the interlayer insulating film and form a wiring layer. Manufacturing method. 2. The contact plug according to claim 1, wherein said second conductive film is deposited on the entire surface of said second insulating film to fill said opening, and then etched to form a contact plug leaving only said opening. A method for manufacturing a semiconductor device. 3. The etching rate condition of the second conductive film , which is faster than that of the second insulating film, after selectively growing the second conductive film in the opening and forming a contact plug filling the opening. The method for manufacturing a semiconductor device according to claim 1, wherein the etching is performed by: