JP2839513B2 - Method of forming bump - Google Patents

Method of forming bump

Info

Publication number
JP2839513B2
JP2839513B2 JP63263156A JP26315688A JP2839513B2 JP 2839513 B2 JP2839513 B2 JP 2839513B2 JP 63263156 A JP63263156 A JP 63263156A JP 26315688 A JP26315688 A JP 26315688A JP 2839513 B2 JP2839513 B2 JP 2839513B2
Authority
JP
Japan
Prior art keywords
film
bump
electrode
nickel plating
palladium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63263156A
Other languages
Japanese (ja)
Other versions
JPH021127A (en
Inventor
晃司 山川
暢男 岩瀬
道彦 稲葉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63263156A priority Critical patent/JP2839513B2/en
Publication of JPH021127A publication Critical patent/JPH021127A/en
Application granted granted Critical
Publication of JP2839513B2 publication Critical patent/JP2839513B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0103—Zinc [Zn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Wire Bonding (AREA)
  • Chemically Coating (AREA)

Description

【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） 本発明は、バンプの形成方法の改良に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to an improvement in a bump forming method.

（従来の技術） 現在、電子機器の小形化に伴い、IC、LSI等の半導体
チップは高密度、高集積化が進められている。また、半
導体素子の実装の面からみても電極ピッチ間の縮小化、
I/O数の増大といった傾向にある。更に、電卓やICカー
ドにみられるカード化に対応する薄型化が要求されてい
る。(Prior Art) At present, with the miniaturization of electronic devices, high density and high integration of semiconductor chips such as ICs and LSIs are being promoted. Also, from the viewpoint of the mounting of the semiconductor element, the reduction between the electrode pitches,
It tends to increase the number of I / Os. In addition, there has been a demand for a thinner device corresponding to the cardization found in calculators and IC cards.

ところで、半導体素子のAl電極から外部端子へ電極リ
ードを取出す方法としてはワイヤボンディング方式が知
られている。ワイヤボンディング方式は、25〜30μｍφ
のAu（又はAl、Cu）の極細線を１本づつ熱圧着又は超音
波により順次接続する方法である。現在、自動ワイヤボ
ンダの普及により省力化、信頼性、量産性が達成されて
いるものの、半導体素子の高集積化に伴う多ピン化、狭
ピッチ化、更に薄型実装化に対応できない問題があっ
た。By the way, a wire bonding method is known as a method of extracting an electrode lead from an Al electrode of a semiconductor element to an external terminal. Wire bonding method is 25 ~ 30μmφ
In this method, ultrafine wires of Au (or Al, Cu) are sequentially connected one by one by thermocompression bonding or ultrasonic waves. At present, although labor saving, reliability, and mass productivity have been achieved by the spread of automatic wire bonders, there has been a problem that it is not possible to cope with an increase in the number of pins, a narrower pitch, and a thinner package accompanying the higher integration of semiconductor elements.

これに対し、TAB方式やフリップチップ方式などのワ
イヤレスボンディング方式は一括接合、位置合せ精度か
らくる信頼性、実装の薄型化、自動化の面からも今後の
半導体素子の実装技術の主流となることが予想される。
ワイヤレスボンディング方式では、一般に半導体素子の
アルミニウム電極上にバンプと呼ばれる金属突起物が形
成される。かかるバンプは、従来、以下に説明する第５
図（Ａ）〜（Ｄ）の工程により形成されている。On the other hand, wireless bonding methods such as the TAB method and flip chip method will become the mainstream of semiconductor device mounting technology in the future in terms of batch bonding, reliability due to alignment accuracy, thinner mounting, and automation. is expected.
In the wireless bonding method, a metal projection called a bump is generally formed on an aluminum electrode of a semiconductor element. Conventionally, such a bump is formed by a fifth type described below.
It is formed by the steps shown in FIGS.

まず、半導体ウェハ１上にAl電極２を形成した後、全
面にSiO1やSi3N4などのパッシベーション膜３を形成
し、更に該パッシベーション膜３を選択的にエッチング
除去して前記Al電極２の大部分を露出させる（第５図
（Ａ）図示）。First, after an Al electrode 2 is formed on a semiconductor wafer 1, a passivation film 3 such as SiO 1 or Si 3 N 4 is formed on the entire surface, and the passivation film 3 is selectively removed by etching. (See FIG. 5 (A)).

次いで、同図（Ｂ）に示すようにパッシベーション膜
３を含むウェハ１全面に蒸着又はスパッタリングにより
下地金属膜４を形成する。つづいて、写真蝕刻法により
前記Al電極２に対応する前記下地金属膜４を露出させる
ための開口部を有するレジストパターン５を形成した
後、下地金属膜４を陰極として電気めっきを施し、露出
する下地金属膜４部分を含む周囲に金属突起物６を選択
的に形成する（同図（Ｃ）図示）。この後、レジストパ
ターン５を除去し、更に金属突起物６をマスクとして露
出する下地金属膜４を除去してバンプを形成する（同図
（Ｄ）図示）。Next, as shown in FIG. 1B, a base metal film 4 is formed on the entire surface of the wafer 1 including the passivation film 3 by vapor deposition or sputtering. Subsequently, a resist pattern 5 having an opening for exposing the underlying metal film 4 corresponding to the Al electrode 2 is formed by photolithography, and then electroplating is performed using the underlying metal film 4 as a cathode to expose. Metal protrusions 6 are selectively formed around the base metal film 4 (see FIG. 3C). Thereafter, the resist pattern 5 is removed, and the underlying metal film 4 that is exposed using the metal protrusions 6 as a mask is removed to form bumps (FIG. 10D).

しかしながら、上述した従来のバンプの形成方法にあ
っては次のような問題があった。即ち、バンプの形成に
際しては下地金属膜の形成、写真蝕刻法によるレジスト
パターンの形成、電気めっき後のレジストパターンの除
去、下地金属膜のエッチングという極めて多くの工程を
必要とするため、コストの点で問題がある。しかも、こ
れらの工程は通常の半導体素子の製造工程で取り扱う物
質と異なるものを多く使用するため、半導体素子への汚
染の問題が生じる。また、上記方法はウェハ状態でのバ
ンプ形成であるため、ウェハからダイシングした半導体
素子を対象としてバンプを形成することができない。こ
のため、ウェハに形成された不良半導体素子上にもバン
プを形成してしまう問題や、ダイシング等により分離さ
れた半導体素子状態で出荷されたものをアセンブリの時
にバンプを形成して最終の半導体装置として作り上げる
ことができず、汎用性が悪いという問題があった。However, the conventional bump forming method described above has the following problems. In other words, the formation of a bump requires an extremely large number of steps of forming a base metal film, forming a resist pattern by photolithography, removing the resist pattern after electroplating, and etching the base metal film. There is a problem. In addition, since these processes use many different materials from those handled in a normal semiconductor device manufacturing process, there is a problem of contamination of the semiconductor device. In addition, since the above method involves forming a bump in a wafer state, a bump cannot be formed for a semiconductor element diced from a wafer. For this reason, there is a problem that bumps are also formed on defective semiconductor elements formed on a wafer, and a semiconductor device which is shipped in a semiconductor element state separated by dicing or the like is formed at the time of assembly to form a final semiconductor device. There was a problem that versatility was poor.

このようなことから、ダイシング後の半導体素子に対
してパラジウム活性化を併用した無電解ニッケルめっき
法によりバンプを形成することが試みられている。この
方法は、半導体素子をパラジウム溶液に浸漬してAl電極
表面にパラジウムを析出、活性化した後、無電解ニッケ
ルめっき液中に浸漬して半導体素子にニッケルめっき膜
からなるバンプを形成するものである。しかしながら、
かかる方法ではパラジウムを析出する工程においてAl電
極以外の素子表面（例えばパッシベーション膜）上にも
パラジウムが析出して活性化されるため、その後の無電
解ニッケルめっきに際してAl電極のみならずパッシベー
ション膜上にもニッケルめっき膜が析出される。その結
果、パッシベーション膜上に析出されたニッケルめっき
膜によりバンプ間が電気的に短絡する問題があった。特
に、半導体素子の高密度化に伴ってバンプ間隔が縮小さ
れると、前記バンプ間の短絡発生頻度が高くなり、歩留
りの低下等の原因となる。For this reason, attempts have been made to form bumps on a semiconductor element after dicing by electroless nickel plating using palladium activation in combination. In this method, a semiconductor element is immersed in a palladium solution to deposit palladium on the surface of an Al electrode, activated, and then immersed in an electroless nickel plating solution to form a bump made of a nickel plating film on the semiconductor element. is there. However,
In such a method, in the step of depositing palladium, palladium is also deposited on the element surface other than the Al electrode (for example, a passivation film) and activated, so that not only the Al electrode but also the passivation film is used in the subsequent electroless nickel plating. Also, a nickel plating film is deposited. As a result, there is a problem that the bumps are electrically short-circuited by the nickel plating film deposited on the passivation film. In particular, when the interval between the bumps is reduced with the increase in the density of the semiconductor element, the frequency of short-circuiting between the bumps increases, which causes a decrease in yield and the like.

（発明が解決しようとする問題点） 本発明は、上記従来の課題を解決するためになされた
もので、極めて簡単な操作で半導体素子のアルミニウム
電極上のみにバンプの一部もしくは全部を構成するニッ
ケルめっき膜を選択的にかつ安定的に析出し得るバンプ
の形成方法を提供しようとするものである。(Problems to be Solved by the Invention) The present invention has been made to solve the above-mentioned conventional problems, and a part or whole of a bump is formed only on an aluminum electrode of a semiconductor element by an extremely simple operation. An object of the present invention is to provide a method for forming a bump capable of selectively and stably depositing a nickel plating film.

［発明の構成］ （問題点を解決するための手段） 本発明は、表面にアルミニウム電極が露出され、かつ
前記電極以外の表面領域が絶縁膜で覆われた半導体素子
を５〜2000ppmのPbを含むパラジウム溶液に浸漬して前
記素子のアルミニウム電極表面にパラジウムを選択的に
析出させる工程と、 無電解ニッケルめっきを施して前記素子のアルミニウ
ム電極表面にニッケルめっき膜を析出させる工程と を具備したことを特徴とするバンプの形成方法である。[Structure of the Invention] (Means for Solving the Problems) The present invention provides a semiconductor device in which an aluminum electrode is exposed on the surface and a surface region other than the electrode is covered with an insulating film by using 5 to 2000 ppm of Pb. A step of selectively depositing palladium on the surface of the aluminum electrode of the element by immersing the element in a palladium solution containing the same; and a step of depositing a nickel plating film on the surface of the aluminum electrode of the element by electroless nickel plating. This is a method of forming a bump.

上記半導体素子は、例えばウェハから通常の素子形成
工程を経てダイシング等により割断されれたもので、Al
電極以外の領域はSiO2、Si3N4、PSG（リンシリケートガ
ラス）等の絶縁膜（パッシベーション膜）で覆われたも
のである。The above-mentioned semiconductor element is, for example, one that has been cut from a wafer through dicing or the like through a normal element forming process,
The region other than the electrodes is covered with an insulating film (passivation film) such as SiO 2 , Si 3 N 4 , or PSG (phosphosilicate glass).

上記パラジウム溶液の主成分であるパラジウムは、例
えば塩化パラジウム（PdCl2）等を用いることができ
る。このパラジウム溶液中に含有されるPbは、パラジウ
ム溶液による半導体素子の活性化に際してアルミニウム
電極にのみにパラジウムを選択的に析出させるために用
いられる。かかるPbの含有量を上記範囲に限定した理由
は、5ppm未満にすると半導体素子表面のアルミニウム電
極以外のSiO2、Si3N4、PSGなどの絶縁膜上にもパラジウ
ムが析出し、アルミニウム電極表面のみにパラジウムを
選択的に析出、活性化できず、一方その含有量が2000pp
mを超えるとパラジウムの析出抑制効果が大きくなりす
ぎてアルミニウム電極表面にもパラジウムが析出しなく
なるからである。より好ましいPbの含有量は、50〜300p
pmである。As the palladium which is a main component of the palladium solution, for example, palladium chloride (PdCl 2 ) or the like can be used. Pb contained in the palladium solution is used for selectively depositing palladium only on the aluminum electrode when the semiconductor element is activated by the palladium solution. The reason for limiting the content of Pb to the above range is that if the content is less than 5 ppm, palladium is also deposited on an insulating film such as SiO 2 , Si 3 N 4 , PSG other than the aluminum electrode on the semiconductor element surface, and the aluminum electrode surface Palladium cannot be selectively deposited and activated only on the other hand, while its content is 2000pp
If it exceeds m, the effect of suppressing the precipitation of palladium becomes too large, and palladium does not precipitate on the surface of the aluminum electrode. More preferred Pb content is 50-300p
pm.

また、パラジウム溶液はアルミニウム電極を腐食しな
い酸またはアルカリ組成にすることが好ましい。かかる
パラジウム溶液での処理に際しては、20〜40℃の温度条
件で行なうことが好ましい。The palladium solution preferably has an acid or alkali composition that does not corrode the aluminum electrode. The treatment with such a palladium solution is preferably performed at a temperature of 20 to 40 ° C.

さらに、パラジウム溶液での処理に先立って半導体素
子のアルミニウム電極表面を硫酸、硝酸、リン酸等で酸
処理したり、アルカリ処理して前記電極表面を清浄化し
てもよい。Further, prior to the treatment with the palladium solution, the surface of the aluminum electrode of the semiconductor element may be subjected to acid treatment with sulfuric acid, nitric acid, phosphoric acid, or the like, or may be treated with alkali to clean the electrode surface.

上記無電解ニッケルめっき処理でのめっき液は、例え
ば次亜リン酸塩を還元剤としてNi−Ｐ合金を析出するニ
ッケルめっき液、または水素化ホウ素を還元剤としてNi
−Ｂ合金を析出するニッケルボロンめっき液等が挙げら
れる。The plating solution in the electroless nickel plating process is, for example, a nickel plating solution that deposits a Ni-P alloy using hypophosphite as a reducing agent, or a nickel plating solution that uses borohydride as a reducing agent.
And a nickel boron plating solution that precipitates a -B alloy.

上記バンプ全体の構造は、実装する方法によって種々
の形態を採用し得る。例えば、無電解ニッケルめっきを
バンプ状に厚付けしてもよいし、無電解ニッケルめっき
膜を下地膜とし、この上に無電解銅めっきにより銅バン
プを、また無電解金めっきにより金バンプを形成しても
よい。無電解ニッケルでバンプを形成する場合には、そ
の厚さを10〜30μｍ程度とし、下地として用いる場合に
はサブミクロンから５μｍ程度とすることが望ましい。
また、無電解ニッケルめっき膜を下地膜とし、この上に
超音波はんだ付法によりはんだバンプを形成してもよ
い。The structure of the whole bump can adopt various forms depending on the mounting method. For example, electroless nickel plating may be thickened in a bump shape, or an electroless nickel plating film may be used as a base film, on which copper bumps are formed by electroless copper plating and gold bumps are formed by electroless gold plating. May be. When the bump is formed of electroless nickel, its thickness is preferably about 10 to 30 μm, and when it is used as a base, it is preferably about submicron to about 5 μm.
Further, an electroless nickel plating film may be used as a base film, on which solder bumps may be formed by ultrasonic soldering.

本発明では、上記無電解ニッケルめっき膜を形成した
後に100〜500℃で熱処理する工程を付加することが可能
である。In the present invention, it is possible to add a step of performing a heat treatment at 100 to 500 ° C. after forming the electroless nickel plating film.

（作用） 本発明によれば、Pbを所定量含み、かつアルミニウム
への腐食作用の小さい酸又はアルカリ組成のパラジウム
溶液にアルミニウム電極が形成された半導体素子を浸漬
することによって、該素子の電極表面にパラジウムを選
択的に析出させることができる。従って、この後の無電
解ニッケルめっきにより半導体素子のアルミニウム電極
上のみにバンプの一部もしくは全部を構成するニッケル
めっき膜を選択的にかつ安定的に析出でき、ひいては半
導体素子表面の絶縁層上に析出したニッケルめっき膜に
よる導通、短絡のない信頼性の高いバンプを形成でき
る。(Action) According to the present invention, a semiconductor element on which an aluminum electrode is formed is immersed in a palladium solution having an acid or alkali composition containing a predetermined amount of Pb and having a small corrosive effect on aluminum, whereby the electrode surface of the element is immersed. Palladium can be selectively precipitated on the surface. Therefore, a nickel plating film constituting a part or all of the bumps can be selectively and stably deposited only on the aluminum electrode of the semiconductor element by the subsequent electroless nickel plating, and thus on the insulating layer on the surface of the semiconductor element. A highly reliable bump free from conduction and short circuit due to the deposited nickel plating film can be formed.

また、上記無電解ニッケルめっき膜を形成した後に10
0〜500℃で熱処理する工程を付加することによって、ア
ルミニウム電極に対するニッケルめっき膜の密着性を著
しく向上でき、ひいては該電極に対して密着性の優れた
バンプを形成できる。こうした熱処理により密着性が向
上化される理由は明らかではないが、熱処理によって析
出したニッケルめっきと電極材料であるアルミニウムが
相互に拡散してそれらの界面に密着性の向上に関与する
層が形成されることに起因するものと考えられる。この
ようにアルミニウム電極に対するニッケルめっき膜の密
着性を向上することによって、該ニッケルめっき膜を下
地膜として異種の金属（例えば銅）をめっきしたり、は
んだ付したりする際に該ニッケルめっき膜が剥離するの
を防止でき、半導体素子での実装工程での接続不良のな
い信頼性の高いバンプを形成できる。なお、前記熱処理
温度を限定した理由は、その温度を100℃未満にすると
アルミニウム電極に対してニッケルめっき膜を良好に密
着させる効果が少なく、かといってその温度が500℃を
超えると半導体素子に形成された拡散層の再拡散やアル
ミニウムの溶融等が生じて信頼性の低下を招く恐れがあ
るからである。また、前記熱処理はニッケルめっき膜の
形成後であればよく、例えば無電解ニッケルめっきを厚
付けしてバンプとする場合には該バンプ形成後、無電解
ニッケルめっき膜を下地膜とし、この上に無電解銅めっ
きにより銅バンプを形成する場合には、該下地膜の形成
後や銅バンプの形成後に熱処理すればよい。After forming the electroless nickel plating film, 10
By adding a heat treatment step at 0 to 500 ° C., the adhesion of the nickel plating film to the aluminum electrode can be significantly improved, and a bump having excellent adhesion to the electrode can be formed. It is not clear why such heat treatment improves the adhesion, but the nickel plating deposited by the heat treatment and aluminum, which is the electrode material, diffuse into each other, forming a layer at the interface between them that contributes to the improvement in adhesion. It is considered to be due to By improving the adhesion of the nickel plating film to the aluminum electrode as described above, the nickel plating film can be used when plating or soldering a different kind of metal (for example, copper) using the nickel plating film as a base film. Peeling can be prevented, and a highly reliable bump free of connection failure in a mounting step on a semiconductor element can be formed. Note that the reason for limiting the heat treatment temperature is that if the temperature is less than 100 ° C., the effect of causing the nickel plating film to be in good contact with the aluminum electrode is small. This is because the re-diffusion of the formed diffusion layer, the melting of aluminum, and the like may occur, which may cause a decrease in reliability. The heat treatment may be performed after the formation of the nickel plating film. For example, in the case where the electroless nickel plating is thickened to form a bump, the electroless nickel plating film is used as a base film after the formation of the bump. When a copper bump is formed by electroless copper plating, heat treatment may be performed after the formation of the base film or the formation of the copper bump.

（実施例） 以下、本発明の実施例を図面を参照して説明する。Hereinafter, embodiments of the present invention will be described with reference to the drawings.

実施例１ まず、通常のウェハプロセスに従って各種のトランジ
スタ、配線等が形成されたシリコン基板11上にAl電極12
を形成した後、全面にSi3N4からなるパッシベーション
膜13を形成し、更に該パッシベーション膜13を選択的に
エッチング除去して前記Al電極12の大部分が露出された
半導体素子を用意した（第１図（Ａ）図示）。Example 1 First, an Al electrode 12 was formed on a silicon substrate 11 on which various transistors, wirings, etc. were formed in accordance with a normal wafer process.
Is formed, a passivation film 13 made of Si 3 N 4 is formed on the entire surface, and the passivation film 13 is selectively etched away to prepare a semiconductor device in which most of the Al electrode 12 is exposed ( FIG. 1 (A) is shown.

次いで、前記半導体素子をリン酸溶液に浸漬して酸処
理を施した後、Al電極12表面を軽く洗浄した。つづい
て、塩化パラジウムをベースとし、Pbを200ppm含む温度
30℃、pH2のパラジウム溶液に前記半導体素子を30秒間
〜１分間浸漬して露出するAl電極12表面のみにPdを含む
層14を選択的に付着させた（同図（Ｂ）図示）。Next, after the semiconductor element was immersed in a phosphoric acid solution to perform an acid treatment, the surface of the Al electrode 12 was lightly washed. Next, a temperature based on palladium chloride containing 200 ppm of Pb
The semiconductor element was immersed in a palladium solution at 30 ° C. and pH 2 for 30 seconds to 1 minute to selectively adhere a layer 14 containing Pd only on the exposed surface of the Al electrode 12 (illustrated in FIG. 3B).

次いで、前記半導体素子を純水でそのAl電極12表面の
Pdを含む層14が除去されない程度に洗浄した後、半導体
素子を下記組成からなりpHが４〜６、温度が80〜90℃の
無電解ニッケルめっき浴中に浸漬して２時間の無電解ニ
ッケルめっきを行なうことにより露出するAl電極12を含
む周辺に厚さ20μｍのリンを含むニッケル膜からなる複
数のバンプ15（寸法100μｍ角、ピッチ200μｍ）を析出
させた（同図（Ｃ）図示）。Next, the semiconductor element was treated with pure water on the surface of the Al electrode 12.
After washing to such an extent that the layer 14 containing Pd is not removed, the semiconductor element is immersed in an electroless nickel plating bath having the following composition and having a pH of 4 to 6 and a temperature of 80 to 90 ° C. for 2 hours. A plurality of bumps 15 (dimensions: 100 μm square, pitch: 200 μm) made of a nickel film containing phosphorus having a thickness of 20 μm were deposited around the periphery including the Al electrode 12 exposed by plating (illustration in FIG. 10C).

〔無電解ニッケルめっき浴の組成〕[Composition of electroless nickel plating bath]

塩化ニッケル 30g/ ヒドロキシ酢酸ソーダ 50g/ 次亜リン酸ソーダ 10g/ 次いで、半導体素子をクリーンオーブン中で150℃、
２時間の熱処理を施した。この時、同図（Ｄ）に示すよ
うにAl電極12とバンプ15の界面にNi及びAlを含む相16が
形成された。Nickel chloride 30 g / sodium hydroxyacetate 50 g / sodium hypophosphite 10 g /
Heat treatment was performed for 2 hours. At this time, a phase 16 containing Ni and Al was formed at the interface between the Al electrode 12 and the bump 15 as shown in FIG.

しかして、本実施例１で得られたバンプ付半導体素子
について各バンプ間での短絡を調べたところ、皆無であ
ることが確認された。これに対し、Pbを含まない以外は
実施例と同様なパラジウム溶液を用いて活性化、無電解
ニッケルめっき処理することにより形成したバンプ間の
短絡を調べたところ、パッシベーション膜に析出された
ニッケルめっき膜に基づく導通、短絡が数個のバンプ間
で認められた。When the short-circuit between the bumps of the semiconductor device with bumps obtained in Example 1 was examined, it was confirmed that there was no short-circuit between the bumps. On the other hand, the short circuit between the bumps formed by the activation and electroless nickel plating using the same palladium solution as in the example except that Pb was not included was examined, and the nickel plating deposited on the passivation film was examined. Conduction and short circuit based on the film were observed between several bumps.

また、本実施例１において熱処理前と熱処理後のバン
プ15のせん断強度を調べた。その結果、熱処理前では30
〜60gであつたのが、熱処理後では130〜170gとなり、Al
電極12に対するバンプ15の密着性が著しく向上されてい
ることが確認された。In addition, in Example 1, the shear strength of the bump 15 before and after the heat treatment was examined. As a result, 30
熱処理 60 g, but after heat treatment becomes 130-170 g, Al
It was confirmed that the adhesion of the bump 15 to the electrode 12 was significantly improved.

実施例２ まず、第２図（Ａ）に示すように実施例１と同様な半
導体素子を用意した。つづいて、半導体素子をリン酸溶
液に浸漬して酸処理を施した後、Al電極12表面を軽く洗
浄した。つづいて、塩化パラジウムをベースとし、Pbを
200ppm含む温度30℃、pH1.5のパラジウム溶液に前記半
導体素子を30秒間〜１分間浸漬して露出するAl電極12表
面のみにPdを含む層141を選択的に付着させた（同図
（Ｂ）図示）。Example 2 First, as shown in FIG. 2A, a semiconductor device similar to that of Example 1 was prepared. Subsequently, after the semiconductor element was immersed in a phosphoric acid solution to perform an acid treatment, the surface of the Al electrode 12 was lightly washed. Then, based on palladium chloride, Pb
Temperature 30 ° C. containing 200 ppm, was selectively deposited was a layer 14 1 containing Pd only Al electrode 12 surface exposed by the immersion of the semiconductor element 30 sec to 1 min to a solution of palladium of pH 1.5 (Fig. ( B) illustrated).

次いで、前記半導体素子を純水でそのAl電極12表面の
Pdを含む層141が除去されない程度に洗浄した後、半導
体素子を実施例１で用いたのと同様な組成からなりpHが
４〜６、温度が80〜90℃の無電解ニッケルめっき浴中に
浸漬して約20分間の無電解ニッケルめっきを行なうこと
により露出するAl電極12を含む周辺にバンプ材料として
の厚さ５μｍのリンを含むニッケル膜（以下、単にニッ
ケル膜と称す）171を析出した（同図（Ｃ）図示）。Next, the semiconductor element was treated with pure water on the surface of the Al electrode 12.
After the layer 14 1 containing Pd were washed so as not to be removed, pH made from a similar composition to that using a semiconductor device in Embodiment 1 is 4-6, electroless nickel plating bath temperature is 80-90 ° C. immersed in about 20 minutes of the nickel film containing phosphorus having a thickness of 5μm as bump material around containing Al electrodes 12 exposed by performing electroless nickel plating (hereinafter, simply referred to as a nickel film) 17 1 Deposited (illustrated in FIG. 3C).

次いで、前記半導体素子を純水で洗浄し、再び前記と
同組成のパラジウム溶液中に浸漬して既に析出させたニ
ッケル膜171上にパラジウムを含む層142を付着させた
（同図（Ｄ）図示）。つづいて、前記半導体素子を純水
でそのAl電極12表面のPdを含む層142が除去されない程
度に洗浄した後、半導体素子を前記と同様な無電解ニッ
ケルめっき浴中に浸漬して約20分間の無電解ニッケルめ
っきを行なうことによりニッケル膜151上に厚さ５μｍ
のニッケル膜152を析出した（同図（Ｅ）図示）。Then, the semiconductor element was washed with pure water, (figure was deposited layers 14 2 containing palladium on the nickel film 17 1 already precipitated by immersion in a palladium solution of the same composition again (D ) Illustration). Subsequently, after said layer 14 2 of a semiconductor device containing Pd of the Al electrode 12 surface with pure water and washed so as not to be removed, approximately by immersing the semiconductor device in the same electroless nickel plating bath 20 the thickness 5μm on the nickel film 15 1 by performing electroless nickel plating minutes
The nickel film 15 2 was deposited (Fig. (E) shown).

次いで、前記パラジウム溶液への半導体素子の浸漬、
無電解ニッケルめっき処理を１サイクルとし、これを２
サイクル順次行なうことにより、パラジウムを含む層14
3、ニッケル層153、パラジウムを含む層144、ニッケル
膜154を析出して厚さ約20μｍのバンプ15を形成した。
つづいて、半導体素子をクリーンオーブン中で150℃、
２時間の熱処理を施してAl電極12とバンプ15の界面にNi
及びAlを含む相16を形成した（同図（Ｆ）図示）。Next, immersing the semiconductor element in the palladium solution,
One cycle of electroless nickel plating treatment
By performing the cycle sequentially, the layer 14 containing palladium
3, the nickel layer 15 3, the layer 14 4 containing palladium, to form a bump 15 having a thickness of about 20μm to precipitate the nickel film 15 4.
Then, put the semiconductor device in a clean oven at 150 ° C,
Heat treatment for 2 hours is applied to the interface between Al electrode 12 and bump 15
Then, a phase 16 containing Al and Al was formed (illustrated in the same figure (F)).

しかして、本実施例２で得られたバンプ付半導体素子
は各バンプ間での短絡が皆無で、かつAl電極12に対して
各バンプ15が良好に密着していることが確認された。ま
た、半導体素子のAl電極12に形成された各バンプ15はパ
ラジウムを含む層141〜144とニッケル膜171〜174との積
層構造をなし、四角柱型の安定した形状を有するもので
あった。更に、バンプ15が形成された半導体素子を異方
性導電ゴムを用いて外部配線に実装したところ、バンプ
15の高さ、形状が均一なことから信頼性の高い良好な接
合を達成することができた。Thus, it was confirmed that in the semiconductor device with bumps obtained in Example 2, there was no short circuit between the bumps, and the bumps 15 were in good contact with the Al electrode 12. Further, each of the bumps 15 formed on the Al electrodes 12 of the semiconductor device forms a laminated structure of a layer 14 1-14 4 and the nickel film 17 1-17 4 containing palladium, which has a quadratic prism-shaped stable shape Met. Furthermore, when the semiconductor element on which the bump 15 was formed was mounted on external wiring using anisotropic conductive rubber, the bump 15
Since the height and the shape were uniform, reliable and good bonding could be achieved.

実施例３ 前述した実施例２の第２図（Ａ）〜（Ｃ）の工程に従
って厚さ５μｍのニッケル膜17を析出し、クリーンオー
ブン中で150℃、２時間の熱処理を施してAl電極12とニ
ッケル膜17の界面にNi及びAlを含む相16を形成した後、
無電解銅めっき処理を施して厚さ約15μｍの銅めっき膜
18を析出してニッケル膜17及び銅めっき膜18からなるバ
ンプ15を形成した（第３図図示）。Example 3 A nickel film 17 having a thickness of 5 μm was deposited according to the steps shown in FIGS. 2A to 2C of Example 2 and heat-treated at 150 ° C. for 2 hours in a clean oven to form an Al electrode 12. After forming the phase 16 containing Ni and Al at the interface of the nickel film 17 and
Approximately 15μm thick copper plating film by electroless copper plating
18 was deposited to form a bump 15 composed of a nickel film 17 and a copper plating film 18 (shown in FIG. 3).

本実施例３で形成されたバンプ15は、主にニッケルよ
り柔らかい銅により形成されているため、TAB方式での
接続が容易となる。なお、銅めっき膜の上に金やはんだ
などの接合し易い層を設けることも可能である。Since the bumps 15 formed in the third embodiment are mainly formed of copper softer than nickel, connection by the TAB method is facilitated. Note that it is also possible to provide a layer such as gold or solder that can be easily joined on the copper plating film.

実施例４ 前述した実施例２の第２図（Ａ）〜（Ｃ）の工程に従
って厚さ２μｍのニッケル膜17を析出し、クリーンオー
ブン中で150℃、２時間の熱処理を施してAl電極12とニ
ッケル膜17の界面にNi及びAlを含む相16を形成した後、
無電解金めっき処理によりNi表面をAuで置換した。更
に、置換Au上に無電解金めっき（厚付け用）処理により
約20μｍの金バンプを形成した。Embodiment 4 A nickel film 17 having a thickness of 2 μm is deposited in accordance with the steps of FIGS. After forming the phase 16 containing Ni and Al at the interface of the nickel film 17 and
The Ni surface was replaced with Au by electroless gold plating. Further, a gold bump of about 20 μm was formed on the substituted Au by electroless gold plating (for thickening).

実施例５ 前述した実施例２の第２図（Ａ）〜（Ｃ）の工程に従
って厚さ５μｍのニッケル膜17を析出し、クリーンオー
ブン中で150℃、２時間の熱処理を施してAl電極12とニ
ッケル膜17の界面にNi及びAlを含む相16を形成した後、
超音波はんだ付法により厚さ約30μｍのはんだ膜19を付
着してニッケル膜17及びはんだ膜19からなるバンプ15を
形成した（第４図図示）。Fifth Embodiment A nickel film 17 having a thickness of 5 μm is deposited in accordance with the steps of FIGS. 2A to 2C of the second embodiment, and subjected to a heat treatment at 150 ° C. for 2 hours in a clean oven to form an Al electrode 12. After forming the phase 16 containing Ni and Al at the interface of the nickel film 17 and
A solder film 19 having a thickness of about 30 μm was attached by ultrasonic soldering to form a bump 15 composed of the nickel film 17 and the solder film 19 (FIG. 4).

本実施例５で形成されたバンプ15は、主にはんだによ
り形成されているため、TABテープに対して低温で接合
することが可能となる。その結果、TABテープとしてポ
リイドフィルムに代って安価なポリエステルフィルムに
カバーリードを設けた構造のものを使用できる利点を有
する。Since the bump 15 formed in the fifth embodiment is mainly formed by solder, it can be joined to the TAB tape at a low temperature. As a result, there is an advantage that a TAB tape having a structure in which cover leads are provided on an inexpensive polyester film instead of the polyid film can be used.

［発明の効果］ 以上詳述した如く、本発明によれば極めて簡単な操作
で半導体素子のアルミニウム電極上のみにバンプの一部
もしくは全部を構成するニッケルめっき膜を選択的にか
つ安定的に析出でき、ひいては隣接する同志の短絡のな
い信頼性の高いバンプを高歩留りで形成し得る方法を提
供できる。また、ニッケルめっき膜の析出後に熱処理を
施すことによって、アルミニウム電極に対して高い密着
性を有し、剥離、断線等のない高信頼性のバンプを形成
できる。[Effects of the Invention] As described above in detail, according to the present invention, a nickel plating film constituting a part or all of a bump is selectively and stably deposited only on an aluminum electrode of a semiconductor element by an extremely simple operation. Thus, it is possible to provide a method capable of forming a highly reliable bump having no short circuit between adjacent ones at a high yield. Further, by performing a heat treatment after the deposition of the nickel plating film, a highly reliable bump having high adhesion to the aluminum electrode and having no peeling, disconnection, or the like can be formed.

【図面の簡単な説明】[Brief description of the drawings]

第１図（Ａ）〜（Ｄ）は本発明の実施例１におけるバン
プの形成工程を示す断面図、第２図（Ａ）〜（Ｆ）は本
発明の実施例２におけるバンプの形成工程を示す断面
図、第３図、第４図は夫々実施例３、５により形成され
たバンプ付き半導体素子を示す断面図、第５図（Ａ）〜
（Ｄ）は従来のバンプの形成工程を示す断面図である。 11……シリコン基板、12……Al電極、13……パッシベー
ション膜、14、141〜144……パラジウムを含む層、15…
…バンプ、16……Ni及びAlを含む層、17、171〜174……
ニッケル膜、18……銅めっき膜、19……はんだ膜。1 (A) to 1 (D) are cross-sectional views showing a bump forming step in Embodiment 1 of the present invention, and FIGS. 2 (A) to 2 (F) show a bump forming step in Embodiment 2 of the present invention. FIGS. 3 and 4 are cross-sectional views showing a semiconductor device with bumps formed according to Examples 3 and 5, respectively, and FIGS.
(D) is a sectional view showing a conventional bump forming step. 11 ...... silicon substrate, 12 ...... Al electrodes, 13 ...... passivation film, 14, 14 1 to 14 4 ...... comprises palladium layer, 15 ...
… Bump, 16… layer containing Ni and Al, 17, 17 1 to 17 4 ……
Nickel film, 18 ... Copper plating film, 19 ... Solder film.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭57−79649（ＪＰ，Ａ) 特開 昭57−188664（ＪＰ，Ａ) 特開 昭63−45378（ＪＰ，Ａ) 特開 昭62−235473（ＪＰ，Ａ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 21/60 C23C 18/00 - 20/08──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-57-79649 (JP, A) JP-A-57-188664 (JP, A) JP-A-63-45378 (JP, A) JP-A-62 235473 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 21/60 C23C 18/00-20/08

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】表面にアルミニウム電極が露出され、かつ
前記電極以外の表面領域が絶縁膜で覆われた半導体素子
を５〜2000ppmのPbを含むパラジウム溶液に浸漬して前
記素子のアルミニウム電極表面にパラジウムを選択的に
析出させる工程と、 無電解ニッケルめっきを施して前記素子のアルミニウム
電極表面にニッケルめっき膜を析出させる工程と を具備したことを特徴とするバンプの形成方法。A semiconductor device having an aluminum electrode exposed on its surface and a surface region other than said electrode covered with an insulating film is immersed in a palladium solution containing 5 to 2,000 ppm of Pb to cover the aluminum electrode surface of said device. A method for forming a bump, comprising: a step of selectively depositing palladium; and a step of applying electroless nickel plating to deposit a nickel plating film on an aluminum electrode surface of the element. 【請求項２】前記無電解ニッケルめっき膜を前記アルミ
ニウム電極表面に析出させた後、100〜500℃の熱処理を
施すことを特徴とする請求項１記載のバンプの形成方
法。2. The bump forming method according to claim 1, wherein after the electroless nickel plating film is deposited on the surface of the aluminum electrode, a heat treatment at 100 to 500 ° C. is performed.
JP63263156A 1988-03-15 1988-10-19 Method of forming bump Expired - Fee Related JP2839513B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63263156A JP2839513B2 (en) 1988-03-15 1988-10-19 Method of forming bump

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63-61386 1988-03-15
JP6138688 1988-03-15
JP63263156A JP2839513B2 (en) 1988-03-15 1988-10-19 Method of forming bump

Publications (2)

Publication Number Publication Date
JPH021127A JPH021127A (en) 1990-01-05
JP2839513B2 true JP2839513B2 (en) 1998-12-16

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Publication number Priority date Publication date Assignee Title
JP4952907B2 (en) * 2006-11-30 2012-06-13 大王製紙株式会社 Superabsorbent composite sheet and absorbent article

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779649A (en) * 1980-11-06 1982-05-18 Seiko Epson Corp Formation of electrode
US4425378A (en) * 1981-07-06 1984-01-10 Sprague Electric Company Electroless nickel plating activator composition a method for using and a ceramic capacitor made therewith
JPS61251153A (en) * 1985-04-30 1986-11-08 Fujitsu Ltd Formation of bump of semiconductor device
JPS62210649A (en) * 1986-03-12 1987-09-16 Toshiba Corp Semiconductor device and manufacture thereof
JPS62235473A (en) * 1986-04-04 1987-10-15 Nippon Mining Co Ltd Alkali type catalytic solution for electroless plating
JPS6345378A (en) * 1986-08-09 1988-02-26 Shinko Electric Ind Co Ltd Activating solution for electroless nickel plating

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