JP2838473B2 - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

Info

Publication number
JP2838473B2
JP2838473B2 JP23917593A JP23917593A JP2838473B2 JP 2838473 B2 JP2838473 B2 JP 2838473B2 JP 23917593 A JP23917593 A JP 23917593A JP 23917593 A JP23917593 A JP 23917593A JP 2838473 B2 JP2838473 B2 JP 2838473B2
Authority
JP
Japan
Prior art keywords
light emitting
semiconductor light
emitting device
led array
common electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP23917593A
Other languages
Japanese (ja)
Other versions
JPH0766456A (en
Inventor
喜文 尾藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP23917593A priority Critical patent/JP2838473B2/en
Publication of JPH0766456A publication Critical patent/JPH0766456A/en
Application granted granted Critical
Publication of JP2838473B2 publication Critical patent/JP2838473B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Led Devices (AREA)
  • Led Device Packages (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、例えばページプリンタ
の感光ドラムの露光用光源として用いられるLEDアレ
イを備える半導体発光装置であって、回路基板上の配線
に金バンプ等の導電性部材を介し押し付けられることで
接続されるものに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device provided with an LED array used as a light source for exposing a photosensitive drum of a page printer, for example, in which a wiring on a circuit board is connected via a conductive member such as a gold bump. It relates to what is connected by being pressed.

【0002】[0002]

【従来の技術】素子基板の一方の主面において一列に整
列する複数のLEDによって構成されるLEDアレイを
備える半導体発光装置において、図6に示すように、そ
の素子基板101の一方の主面101aにおいて各LE
D102毎に個別電極103を形成し、その素子基板1
01の他方の主面101bにおいて共通電極104を形
成したものが従来より用いられている。この半導体発光
装置を回路基板に実装する場合、その共通電極104を
導電性ペーストを介して回路基板上の配線に接続し、各
個別電極103をワイヤーボンダーによって一つずつ回
路基板上の配線に接続することが行われている。
2. Description of the Related Art In a semiconductor light emitting device provided with an LED array composed of a plurality of LEDs arranged in a line on one main surface of an element substrate, as shown in FIG. At each LE
An individual electrode 103 is formed for each D102, and the element substrate 1
In the prior art, a common electrode 104 is formed on the other main surface 101b of the light emitting device 101. When this semiconductor light emitting device is mounted on a circuit board, the common electrode 104 is connected to the wiring on the circuit board via a conductive paste, and each individual electrode 103 is connected to the wiring on the circuit board one by one using a wire bonder. That is being done.

【0003】[0003]

【発明が解決しようとする課題】上記のように各個別電
極103を一つずつ回路基板上の配線に接続しようとす
ると生産性が低下してしまう。そこで、図7に示すよう
に、素子基板101の一方の主面101aにおいて各L
ED102毎に個別電極103を形成すると共にLED
アレイの片側に共通電極104′を形成し、各個別電極
103と共通電極104′とに金バンプ等の導電性部材
105を形成し、その導電性部材105をマイクロバン
プボンディング法等によって回路基板上の配線に封止樹
脂の収縮力によって押し付けて接続することが提案され
ている。
As described above, when each individual electrode 103 is to be connected one by one to the wiring on the circuit board, the productivity is reduced. Therefore, as shown in FIG. 7, each of the L
An individual electrode 103 is formed for each ED 102 and an LED is formed.
A common electrode 104 'is formed on one side of the array, a conductive member 105 such as a gold bump is formed on each individual electrode 103 and the common electrode 104', and the conductive member 105 is mounted on a circuit board by a micro-bump bonding method or the like. It has been proposed to press and connect to the wiring by the contraction force of the sealing resin.

【0004】図7に示す構成では、回路基板に実装され
る半導体発光装置は各個別電極103と共通電極10
4′とに形成される導電性部材105を介し支持される
ことになるが、各導電性部材105相互の間隔が狭いた
め安定した支持を行うことできない。そのため、各導電
性部材105と回路基板上の配線との接続が不安定にな
って接触抵抗のバラツキが生じ、LEDアレイの発光特
性が不均一になるという問題がある。
In the configuration shown in FIG. 7, a semiconductor light emitting device mounted on a circuit board includes individual electrodes 103 and a common electrode 10.
4 'is supported via the conductive member 105 formed thereon, but since the distance between the conductive members 105 is small, stable support cannot be performed. Therefore, there is a problem that the connection between each conductive member 105 and the wiring on the circuit board becomes unstable, the contact resistance varies, and the light emitting characteristics of the LED array become uneven.

【0005】本発明は、上記従来技術の問題を解決する
ことのできる半導体発光装置を提供することを目的とす
る。
An object of the present invention is to provide a semiconductor light emitting device that can solve the above-mentioned problems of the prior art.

【0006】[0006]

【課題を解決するための手段】本発明の半導体発光装置
は、素子基板の一方の主面において一列に整列する複数
のLEDによって構成されるLEDアレイと、その素子
基板の一方の主面において各LED毎に形成される個別
電極と、その素子基板の一方の主面においてLEDアレ
イの両側に形成される共通電極と、各個別電極と各共通
電極とに形成される導電性部材とを備え、その導電性部
材を介し回路基板上の配線に押し付けられることで接続
される。
According to the present invention, there is provided a semiconductor light emitting device comprising: an LED array formed by a plurality of LEDs arranged in a line on one main surface of an element substrate; An individual electrode formed for each LED, a common electrode formed on both sides of the LED array on one main surface of the element substrate, and a conductive member formed on each individual electrode and each common electrode, The connection is made by being pressed against the wiring on the circuit board via the conductive member.

【0007】[0007]

【作用】本発明の構成によれば、回路基板に実装される
半導体発光装置は各個別電極と各共通電極とに形成され
る複数の導電性部材を介し支持される。その共通電極は
LEDアレイの両側に形成されているので、一方側の共
通電極に形成される導電性部材と他方側の共通電極に形
成される導電性部材の間隔は広くなり、共通電極をLE
Dアレイの一方側にのみ形成する場合に比べ、安定して
半導体発光装置を支持することができる。これにより、
全ての導電性部材と回路基板上の配線とをバランスよく
確実に接続でき、接触抵抗のバラツキをなくしてLED
アレイの発光特性を均一化できる。
According to the structure of the present invention, the semiconductor light emitting device mounted on the circuit board is supported via a plurality of conductive members formed on each individual electrode and each common electrode. Since the common electrodes are formed on both sides of the LED array, the distance between the conductive member formed on the common electrode on one side and the conductive member formed on the common electrode on the other side is increased, and the common electrode is connected to the LE.
The semiconductor light emitting device can be supported more stably than when formed only on one side of the D array. This allows
All the conductive members and the wiring on the circuit board can be connected reliably and in a well-balanced manner.
The light emission characteristics of the array can be made uniform.

【0008】[0008]

【実施例】以下、図面を参照して本発明の実施例を説明
する。
Embodiments of the present invention will be described below with reference to the drawings.

【0009】図1、図2に示す半導体発光装置1は、シ
リコン基板(素子基板)2の一方の主面2aにおいて一
列に並列する複数のLED3によって構成されるLED
アレイと、その素子基板2の一方の主面2aにおいて各
LED3毎に形成されたアノード電極(個別電極)4
と、その基板2の一方の主面2aにおいてLEDアレイ
の両側に形成されたカソード電極(共通電極)5とを備
えている。
The semiconductor light emitting device 1 shown in FIGS. 1 and 2 is constituted by a plurality of LEDs 3 arranged in a line on one main surface 2 a of a silicon substrate (element substrate) 2.
An array and an anode electrode (individual electrode) 4 formed for each LED 3 on one main surface 2a of the element substrate 2
And a cathode electrode (common electrode) 5 formed on one main surface 2a of the substrate 2 on both sides of the LED array.

【0010】各LED3は、素子基板2の一方の主面2
aに半導体結晶を有機金属気相エピタキシー(MOCV
D)や分子線エピタキシー(MBE)等により成長さ
せ、その成長層をLED3となる部分を残してエッチン
グすることで形成でき、例えば図2に示すように、ガリ
ウム砒素(GaAs)、ガリウム砒素リン(GaAs
P)、ガリウムリン(GaP)等の成長層であるバッフ
ァー層3aと、AlX Ga1-X Asの成長層であるn形
半導体層3b、p形半導体層3cおよびp+ 形半導体層
3dとで構成でき、さらに、窒化珪素(SiNX )、酸
化珪素(SiO2 )等の保護膜7をプラズマCVD等に
より形成することで構成できる。
Each LED 3 is connected to one main surface 2 of the element substrate 2.
a with a semiconductor crystal by metalorganic vapor phase epitaxy (MOCV
D) or molecular beam epitaxy (MBE) or the like, and the grown layer can be formed by etching while leaving a portion to be the LED 3. For example, as shown in FIG. 2, gallium arsenide (GaAs), gallium arsenide phosphorus ( GaAs
P), a buffer layer 3a that is a growth layer of gallium phosphide (GaP) or the like, an n-type semiconductor layer 3b, a p-type semiconductor layer 3c, and a p + -type semiconductor layer 3d that are growth layers of Al x Ga 1 -x As. And a protective film 7 of silicon nitride (SiN x ), silicon oxide (SiO 2 ) or the like formed by plasma CVD or the like.

【0011】各個別電極4は、各LED3を覆う保護膜
7の一部をエッチングにより除去することで露出するp
+ 型半導体層3dに接続され、図1に示すように、各L
ED3からLEDアレイの並列方向(図1において左右
方向)に直角な方向(図1において上下方向)に引き出
され、一側方に引き出されるものと他側方に引き出され
るものとが交互に並列し、その引き出し端の上に金バン
プ(導電性部材)11が形成されている。
Each individual electrode 4 is exposed by removing a part of the protective film 7 covering each LED 3 by etching.
+ Type semiconductor layer 3d, and as shown in FIG.
It is pulled out from ED3 in the direction (vertical direction in FIG. 1) perpendicular to the parallel direction of the LED array (horizontal direction in FIG. 1), and the one pulled out to one side and the one pulled out to the other side are alternately arranged in parallel. A gold bump (conductive member) 11 is formed on the drawn end.

【0012】各共通電極5は、保護膜7の一部をエッチ
ングにより除去することで露出する素子基板2の一方の
主面2aに接続され、LEDアレイに沿う帯状とされ、
その上に間隔をおいて複数の金バンプ(導電性部材)1
1が形成されている。また、LEDアレイの一方側と他
方側それぞれにおいて、個別電極4上の金バンプ11と
共通電極5上の金バンプ11とはLEDアレイに沿って
交互に並列する。
Each common electrode 5 is connected to one main surface 2a of the element substrate 2 which is exposed by removing a part of the protective film 7 by etching, and has a strip shape along the LED array.
A plurality of gold bumps (conductive members) 1 are spaced apart therefrom.
1 is formed. Further, on each of one side and the other side of the LED array, the gold bumps 11 on the individual electrodes 4 and the gold bumps 11 on the common electrode 5 are alternately arranged in parallel along the LED array.

【0013】各金バンプ11は、例えば、各電極4、5
上の直径数十μm程度のバンプ形成部分を除いてレジス
トによって被覆し、しかる後に電気メッキによって金層
を厚さ10〜13μm程度に成膜することで形成でき
る。メッキ液の組成としては、例えば、シアン化金カリ
ウムを4〜8重量%、クエン酸カリウムを30〜40重
量%、第一りん酸カリウムを30〜40重量%、クエン
酸を20〜30重量%、エチレンジアミン二酢酸ニッケ
ルを2〜3重量%それぞれ混合した液を用いることがで
きる。その電気メッキは、複数の半導体発光装置1をシ
リコンウエハー上に作り込んだ状態で、各電極4、5を
全て互いに接続する短絡配線を設け、その短絡配線を介
し各電極4、5をメッキ電極に接続することで行ない、
そのウエハーを分断して各半導体発光装置1を互いに分
離する際に短絡配線を各電極4、5相互間で切断するよ
うにしてもよい。また、図4に示すように、電極4、5
をアルミニウム薄膜により形成し、この電極4、5と金
バンプ11との間に、クロム(Cr)12a、ニッケル
(Ni)12bおよび金(Au)12cを蒸着やスパッ
タリングによって順次成長させた三層金属膜12を介在
させてもよい。
Each of the gold bumps 11 is, for example, a corresponding one of the electrodes 4, 5
It can be formed by coating with a resist except for a bump forming portion having a diameter of about several tens of μm and then forming a gold layer to a thickness of about 10 to 13 μm by electroplating. The composition of the plating solution is, for example, 4 to 8% by weight of potassium gold cyanide, 30 to 40% by weight of potassium citrate, 30 to 40% by weight of potassium monophosphate, and 20 to 30% by weight of citric acid. And a liquid obtained by mixing nickel ethylenediamine diacetate in an amount of 2 to 3% by weight. In the electroplating, in a state where a plurality of semiconductor light emitting devices 1 are formed on a silicon wafer, a short-circuit wire for connecting all the electrodes 4 and 5 is provided, and the electrodes 4 and 5 are plated via the short-circuit wires. By connecting to
When the wafer is cut and the semiconductor light emitting devices 1 are separated from each other, the short-circuit wiring may be cut between the electrodes 4 and 5. Also, as shown in FIG.
Is formed from an aluminum thin film, and chromium (Cr) 12a, nickel (Ni) 12b, and gold (Au) 12c are sequentially grown between the electrodes 4, 5 and the gold bumps 11 by vapor deposition or sputtering. The film 12 may be interposed.

【0014】上記半導体発光装置1は、図3に示すよう
に、金バンプ11を介しガラス等の透明な回路基板15
上の配線16に透明な封止樹脂17の収縮力によって押
し付けられることで接続される。この接続は、先ず、硬
化前の封止樹脂17を回路基板15上にコーティング
し、その上から半導体発光装置1を金バンプ11を介し
配線16に押し付け、しかる後に封止樹脂17を紫外線
や熱等によって硬化させて収縮させるマイクロバンプボ
ンディング法により行うことができる。
As shown in FIG. 3, the semiconductor light emitting device 1 has a transparent circuit board 15 made of glass or the like via gold bumps 11.
It is connected to the upper wiring 16 by being pressed by the contraction force of the transparent sealing resin 17. In this connection, first, the sealing resin 17 before curing is coated on the circuit board 15, the semiconductor light emitting device 1 is pressed from above onto the wiring 16 via the gold bumps 11, and then the sealing resin 17 is exposed to ultraviolet light or heat. It can be performed by a micro-bump bonding method of curing and shrinking by a method such as the above.

【0015】上記構成によれば、回路基板15に実装さ
れる半導体発光装置1は、各個別電極4と各共通電極5
とに形成される複数の金バンプ11を介し支持される。
その共通電極5はLEDアレイの両側に形成されている
ので、一方側の共通電極5に形成される金バンプ11と
他方側の共通電極5に形成される金バンプ11の間隔は
広くなり、共通電極5をLEDアレイの一方側にのみ形
成する場合に比べ、安定して半導体発光装置1を支持す
ることができる。また、個別電極4もLEDアレイの一
方側と他方側とに引き出されるものから構成されている
ので、LEDアレイの一方側にのみ個別電極4を形成す
る場合に比べ、一方側の個別電極4に形成される金バン
プ11と他方側の個別電極4に形成される金バンプ11
の間隔が広くなり、さらに、LEDアレイの一方側と他
方側とにおいて個別電極4上の金バンプ11と共通電極
5上の金バンプ11とはLEDアレイに沿って交互に並
列するので、LED3の並列方向に関する各金バンプ1
1相互の間隔も広くなり、より安定して半導体発光装置
1を支持することができる。これにより、全ての金バン
プ11と回路基板15の配線16とをバランスよく確実
に接続でき、接触抵抗のバラツキをなくしてLEDアレ
イの発光特性を均一化できる。
According to the above configuration, the semiconductor light emitting device 1 mounted on the circuit board 15 includes the individual electrodes 4 and the common electrodes 5.
And is supported via a plurality of gold bumps 11 formed at the same time.
Since the common electrodes 5 are formed on both sides of the LED array, the distance between the gold bumps 11 formed on the common electrode 5 on one side and the gold bumps 11 formed on the common electrode 5 on the other side is increased. The semiconductor light emitting device 1 can be supported more stably than when the electrodes 5 are formed only on one side of the LED array. In addition, since the individual electrodes 4 are also formed so as to be drawn out to one side and the other side of the LED array, the individual electrodes 4 are formed on one side of the LED array as compared with the case where the individual electrodes 4 are formed only on one side of the LED array. Gold bump 11 to be formed and gold bump 11 to be formed on individual electrode 4 on the other side
And the gold bumps 11 on the individual electrodes 4 and the gold bumps 11 on the common electrode 5 are alternately parallel along the LED array on one side and the other side of the LED array. Each gold bump 1 in parallel direction
The distance between the semiconductor light emitting devices 1 is increased, and the semiconductor light emitting device 1 can be supported more stably. As a result, all the gold bumps 11 and the wirings 16 of the circuit board 15 can be reliably connected in a well-balanced manner, and variations in contact resistance can be eliminated, and the light emission characteristics of the LED array can be made uniform.

【0016】なお、本発明は上記実施例に限定されるも
のではない。例えば、図5に示すように、LEDの両側
の各共通電極5を、LEDアレイに沿う部分5Aと、こ
の部分5AからLEDアレイに向かって突出すると共に
各個別電極4の相互間に配置される複数の部分5Bとで
構成し、その各個別電極4の間に配置される部分5Bに
金バンプ11を形成するようにしてもよい。これによ
り、個別電極4から共通電極5までの距離が短くなって
抵抗が低減される。
The present invention is not limited to the above embodiment. For example, as shown in FIG. 5, each common electrode 5 on both sides of the LED is arranged between a portion 5A along the LED array and each individual electrode 4 protruding from this portion 5A toward the LED array. A plurality of portions 5B may be formed, and the gold bumps 11 may be formed on the portions 5B disposed between the individual electrodes 4. Thereby, the distance from the individual electrode 4 to the common electrode 5 is shortened, and the resistance is reduced.

【0017】[0017]

【発明の効果】本発明の半導体発光装置によれば、素子
基板の一方の主面に形成される導電性部材を介し回路基
板に安定して実装されることで良好な発光特性を得るこ
とができる。
According to the semiconductor light emitting device of the present invention, good light emitting characteristics can be obtained by being stably mounted on the circuit board via the conductive member formed on one main surface of the element substrate. it can.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例の半導体発光装置の平面図FIG. 1 is a plan view of a semiconductor light emitting device according to an embodiment of the present invention.

【図2】本発明の実施例の半導体発光装置の断面図FIG. 2 is a sectional view of a semiconductor light emitting device according to an embodiment of the present invention.

【図3】本発明の実施例の半導体発光装置の実装状態で
の断面図
FIG. 3 is a cross-sectional view of the mounted state of the semiconductor light emitting device according to the embodiment of the present invention.

【図4】本発明の実施例の金バンプの断面図FIG. 4 is a sectional view of a gold bump according to an embodiment of the present invention.

【図5】本発明の変形例の半導体発光装置の平面図FIG. 5 is a plan view of a semiconductor light emitting device according to a modification of the present invention.

【図6】従来の半導体発光装置の断面図FIG. 6 is a sectional view of a conventional semiconductor light emitting device.

【図7】先の提案に係る半導体発光装置の断面図FIG. 7 is a cross-sectional view of a semiconductor light emitting device according to the previous proposal.

【符号の説明】[Explanation of symbols]

2 素子基板 3 LED 4 個別電極 5 共通電極 11 金バンプ 15 回路基板 2 element board 3 LED 4 individual electrode 5 common electrode 11 gold bump 15 circuit board

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 素子基板の一方の主面において一列に整
列する複数のLEDによって構成されるLEDアレイ
と、その素子基板の一方の主面において各LED毎に形
成される個別電極と、その素子基板の一方の主面におい
てLEDアレイの両側に形成される共通電極と、各個別
電極と各共通電極とに形成される導電性部材とを備え、
その導電性部材を介し回路基板上の配線に押し付けられ
ることで接続される半導体発光装置。
An LED array comprising a plurality of LEDs arranged in a line on one main surface of an element substrate, an individual electrode formed for each LED on one main surface of the element substrate, and an element for the element A common electrode formed on both sides of the LED array on one main surface of the substrate, and a conductive member formed on each individual electrode and each common electrode,
A semiconductor light emitting device that is connected by being pressed against wiring on a circuit board via the conductive member.
JP23917593A 1993-08-30 1993-08-30 Semiconductor light emitting device Expired - Fee Related JP2838473B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23917593A JP2838473B2 (en) 1993-08-30 1993-08-30 Semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23917593A JP2838473B2 (en) 1993-08-30 1993-08-30 Semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPH0766456A JPH0766456A (en) 1995-03-10
JP2838473B2 true JP2838473B2 (en) 1998-12-16

Family

ID=17040843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23917593A Expired - Fee Related JP2838473B2 (en) 1993-08-30 1993-08-30 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JP2838473B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6333522B1 (en) 1997-01-31 2001-12-25 Matsushita Electric Industrial Co., Ltd. Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor
JP4491948B2 (en) * 2000-10-06 2010-06-30 ソニー株式会社 Device mounting method and image display device manufacturing method

Also Published As

Publication number Publication date
JPH0766456A (en) 1995-03-10

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