JP2828646B2 - One-stone inverter device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single inverter device including a single switching element.

[Prior Art] FIG. 11 shows a conventional one-stone inverter device. In this inverter device, the transistor Q ₁ is repeated on and off, for supplying high frequency power to a load. This one-stone inverter device is a well-known one disclosed in Japanese Patent Application No. 62-242070. The waveform of each part of the inverter 1 is the twelfth
Is as shown in the figure, the voltage of the choke coil L ₁ has a waveform obtained by subtracting the voltage applied to the transistor Q ₁ from the DC power source E as shown in FIG. (C). Here, the inverter device of FIG. 11 is used for a discharge lamp lighting device.
In the discharge lamp lighting device controls the transistor Q ₁ as follows. First, by shortening the ON period of the transistor Q _1, the voltage applied to the discharge lamp l reduced flow the preheating current to the filament of the discharge lamp l via a capacitor C ₃ in this period. And, then the on-period of the transistor Q ₁ will continue to increase, the discharge lamp l lights rated.

[Problems to be solved fingertip] However, when the on-Dee tee transistor Q ₁ is increased, as for higher applied voltage of the transistor Q1 is it, the applied voltage of the choke coil L ₁ also increases accordingly. Because That is, a high voltage in the choke coil L ₁ is applied at the time of rated lighting of the discharge lamp l, the choke coil
It is necessary to use a large-sized ones as L _1.

The discharge lamp l becomes end of life, when the half-wave discharge phenomenon occurs, the current flowing through the choke coil L ₁ is rapidly increased, it is caused to the choke coil L ₁ is saturated.
This is shown in FIG. FIG. 13 (a) shows a normal case, and FIG. 13 (b) shows a case where the discharge lamp 1 reaches the end of its life. As apparent from FIG increased, the peak value of the choke coil L ₁ in the end of life of the discharge lamp l appears just before the transistor Q ₁ is turned off, the over-current flows through the transistor Q _1, switching loss is greatly I do. Therefore there is a problem that stress applied to the transistor Q ₁ is greatly increased.

The present invention has been made in view of the above points, and an object of the present invention is to provide a single inverter device capable of reducing the size of an inductance element and reducing stress on a switching element when a load is abnormal. It is in.

[Means for Solving the Problems] To achieve the above object, the present invention periodically turns on,
A switching element that repeatedly turns off, an LC resonance circuit that is excited by the switching of the switching element, and an inductance element that applies a DC voltage to the switching element.
A switching element is connected via the inductance of the resonance circuit, and both ends of the inductance element, or
A load is connected to either end of the series circuit of the inductance of the LC resonance circuit and the switching element via a DC cut capacitor.

[Operation] As described above, according to the present invention, by connecting the switching element to the DC power supply via the inductance element and the inductance of the LC resonance circuit, the voltage applied during steady operation of the load is determined by the inductance of the LC resonance circuit. By sharing, the voltage applied to the inductance element can be reduced to reduce the size of the inductance element, and the peak of the current flowing through the inductance element due to the interaction with the LC resonance circuit occurs when the switching element is off. Thus, the switching loss is reduced, and the stress applied to the switching element is reduced.

Embodiment 1 FIG. 1 shows a first embodiment of the present invention. In the present embodiment that is connected to the choke coil L ₁ across the series circuit of the load L and the capacitor C ₂ is different from Figure 11 circuit. With this Ichiseki inverter to the discharge lamp lighting apparatus is as shown in FIG. 2, the discharge lamp l and the capacitor C ₃ load L
There is. The transistor in this discharge lamp lighting device
Control for Q ₁ are also basically carried out in the same manner as described in the conventional example. The capacitor C ₂ is a capacitor C _1, C _3, constitutes a resonant circuit together with the choke coil L _1, L ₂ and the discharge lamp l, is a factor for determining the oscillation frequency, a function of the DC-cut Yes Therefore, the capacitance is sufficiently larger than the capacitors C ₁ and C ₃ .

Load L a choke coil L ₁ as shown in Figure 2
When connected to both ends of the series circuit of the capacitor C ₃ and the capacitor C ₂ , the waveform of the voltage V _L1 applied to the choke coil L ₁ shown in FIG. Electric light
Becomes substantially equal to the tube voltage Vla. That is, the choke coil L
_The voltage applied to ₁ is applied with a high voltage for a moment when the discharge lamp 1 is started, but drops to the tube voltage Vla after the discharge or the like 1 is turned on. Therefore, it is possible to reduce the always voltage applied to the choke coil L _1, therefore the choke coil L ₁ can be made compact.

Next, a case where the discharge lamp 1 is at the end of its life and a half-wave discharge phenomenon has occurred will be described. FIG. 4 shows an operation waveform diagram of each part at this time. In this case, current I _L1 flowing to the choke coil L ₁ increases as shown in FIG. 4 (d), also increases the peak value. In this case, if the circuit configuration of a conventional example, with the increase of the choke coil L ₁ of the current I _L1, although the also increases the collector current I _C of the transistor Q _1, when current I _L1 of the present embodiment peak appears in the off-period duration of the transistor Q ₁ (showing a fourth view (a) the collector-emitter voltage V _CE of the transistor Q _1.) Thus, the current at the moment the transistor Q ₁ as in the prior art are turned off I
_L1 does not reach the peak value and the transistor
Without switching loss for Q ₁ is greatly increased, thus it stressful reduced applied to the transistor Q _1.

Embodiment 2 FIG. 5 shows a second embodiment. In this embodiment one end connected to the positive electrode side of the DC power source E in parallel circuit of the capacitor C ₃ to the discharge lamp l in the first embodiment, it is connected to the negative electrode side. In this embodiment, since the capacitor C ₂ is serving as a DC-cut, it is possible to perform the same circuit operation as Figure 2 circuit. Therefore, in this embodiment, the same effect as that of the first embodiment can be expected.

Third Embodiment FIG. 6 shows a third embodiment. In the present embodiment, the present invention is applied to a discharge lamp lighting device for lighting two discharge lamps 1 in parallel, and the same effects as those of the above-described embodiments can be obtained. Note that the balancer choke BT in the figure is two discharge lamps l.
Is for surely lighting. That is, when one of the discharge lamps 1 starts a slight discharge, the current flowing through the two windings of the balancer choke BT becomes unbalanced, a high voltage is generated in the balancer choke BT, and the discharge that starts the voltage and the minute discharge is started. The composite voltage of the tube voltage of the electric lamp 1 is applied to the other discharge lamp so as to operate. Then, when the two discharge lamps 1 are turned on, the currents flowing through the two windings of the balance choke BT become substantially equal, the voltages induced in each winding work to cancel each other, and the balancer choke BT has almost impedance. Disappears.

Embodiment 4 FIG. 7 shows a fourth embodiment. This embodiment is obtained by adding a transistor Q ₁ protection to the third embodiment. In this embodiment of the on transistors Q _1, is also shown specific configuration of the control circuit 2 for controlling the off. In this embodiment is connected to the capacitor C ₁ across the transistor Q _1. The control circuit 2, turns on the transistor Q _1, an oscillation circuit 3 which outputs a square wave signal for turning off, Yes constituted by a buffer B ₁ for current amplification, the protection circuit 3 is abnormal from both ends voltage of the transistor Q ₁ a comparator 5 that detects, composed of a flip-flop 6 which holds the output state of the comparator 5 when the abnormality detection, the oscillation circuit 3, an aND gate G ₁ taking aND of three outputs of the comparators 5 and the flip-flop 6 I have.

When the two discharge lamps 1 are normally lit, while the output of the oscillation circuit 4 shown in FIG.
Since the outputs of the comparator 5 and the flip-flop 6 are at a high level as shown in FIGS. 8 (d) and 6 (e), the output of the oscillation circuit 4 remains unchanged as shown in FIG. 8 (f). It becomes ₁ output. Here, the flip-flop 5 is a D flip-flop, and when the output of the oscillation circuit 4 falls (when the clock is input), if the set input is low, the output Q becomes low. However, since the output of the comparator 6 is at the high level when the output of the oscillation circuit 4 falls as shown in FIG. 8 (d), the output Q is held at the high level.

Next, the discharge lamp l becomes the end of life, when the half-wave discharge phenomenon occurs, as described in the first embodiment described above, increases the current of the choke coil L ₁ is a half-wave discharge, especially two-lamp co when raised and causes a saturation phenomenon current flowing through the choke coil L ₁ is rapidly increased. At this time, if the oscillating current applied to the transistor Q ₁ is not returned to nearly 0V occurs. Performs the protection operation transistor Q ₁ in the comparator 5 and the flip-flop 6 in this case. That is, the ninth
The collector-emitter voltage V _CE of the transistor Q ₁ as shown in FIG. (B) will not return to 0V, and the output of the comparator 5, as shown in (d) of FIG. Is held at a low level, therefore the AND gate G The output of ₁ also becomes low level,
Operation of the inverter 1 transistor Q ₁ is turned off is stopped. Then, when the output of the oscillation circuit 4 falls, the output Q of the flip-flop 6 also goes low, and the state in which the operation of the inverter is stopped is continued.

Here, the collector-emitter voltage of the transistor Q ₁
The reason why V _CE does not return to 0V will be described. In the inverter 1 of the present invention, as can be seen from FIGS. 3 and 4,
The peak value of the current I _L1 flowing to the choke coil L _1, the transistor Q ₁ is generated during the OFF. Period transistor Q ₁ is off (in fact a diode D ₁ also off), the current I _L1
A combined current of the current I _C2 flowing through the capacitor C ₂ flows through the capacitor C _1. Here, the peak value of the current I _L1 is increased significantly, increasing the direct current component superimposed on the charge and discharge current of the capacitor C ₁ as shown in FIG. 10 (b) is, consequently discharge current of the capacitor C ₁ Decrease. Then, when the current _IL1 further increases from the state shown in (d) of FIG.
Collector-emitter voltage V _CE of the transistor Q ₁ is to not return to 0V. Therefore, the above-described protection operation is performed by the voltage detection circuit 5.

In the above description, when the load condition is the worst (for example, when both lamps generate half-wave discharge),
Although the collector-emitter voltage V _CE of the transistor Q ₁ is described for protection against phenomena not return to 0V, and the abnormal state of the protection function does not work (e.g., when only one lamp is turned end-of-life Ya with the heating of the choke coil L _1, and decreases the saturation magnetic flux density of the choke coil L _1, the process of gradually current I _L1 is gradually increased, etc.),
There is an effect of reducing the switching loss of the transistor Q ₁ by the configuration of the inverter can be reduced stress of the transistor Q _1.

[Effects of the Invention] As described above, since the switching element is connected to the DC power supply via the inductance element and the inductance of the LC resonance circuit as described above, the voltage is applied during steady operation of the load with the inductance of the LC resonance circuit. Voltage,
The voltage applied to the inductance element can be reduced.
The peak of the current flowing through the inductance element due to the interaction with the resonance circuit can be caused to occur when the switching element is off, so that the switching loss is reduced and the stress applied to the switching element can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention, FIG. 2 is a specific circuit diagram of the above embodiment, FIG. 3 is an explanatory diagram of normal operation of the above embodiment, and FIG. FIG. 5, FIG. 5 is a circuit diagram of the second embodiment, FIG. 6 is a circuit diagram of the third embodiment, FIG. 7 is a circuit diagram of the fourth embodiment, and FIG. FIG. 9 is an explanatory diagram of the operation at the time of an abnormality in the above, FIG. 10 is an explanatory diagram of a principle in which the worst abnormal state occurs in the above, FIG. 11 is a circuit diagram of a conventional example, and FIG. FIG. 13 is an explanatory diagram comparing an abnormal operation with a normal operation. E is a direct current power source, Q ₁ is a transistor, L _1, L ₂ is a choke coil, C _1, C ₂ is a capacitor, L is a load.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H05B 41/24 H02M 7/48 H02M 7/537

Claims (1)

(57) [Claims] A switching element for periodically turning on and off, an LC resonance circuit excited by switching of the switching element, and an inductance element for applying a DC voltage to the switching element; The switching element is connected via the element and the inductance of the LC resonance circuit, and a load is applied to either end of the inductance element or either end of the series circuit of the inductance of the LC resonance circuit and the switching element via a DC cut capacitor. Is connected to the inverter.