JP2812009B2 - Digital audio transmission system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to a digital audio transmission system for multiplexing and transmitting a voice coded data signal obtained by coding a voice signal. It is suitable for use in transmitting audio signals for broadcasting. In particular, the present invention relates to a multiplex transmission system for digital audio interface data.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram of a conventional digital audio transmission system. FIG. 6 shows a frame format of digital audio interface data of a conventional digital audio transmission system. FIG.
FIG. 6A shows a subframe configuration, and FIG. 6B shows a frame configuration.

[0003] Conventionally, digital audio transmission systems include:
When multiplexing and transmitting DAI data specified in the EIAJ (Japan Electronic Machinery Manufacturers Association) CP-340 standard,
In order to ensure transparency, that is, to transmit not only voice encoded data but also control information multiplexed for each frame as it is, multiplex transmission including a preamble has to be performed.

In FIG. 6, a preamble is used to identify subframes, frames, and blocks in order to reproduce control information (V, U, C, P) preambled together with voice encoded data in a block cycle. 8
This is a bit synchronization pattern.

[0005] As shown in FIG.
If the interface circuit 102 performs balanced / unbalanced conversion (B / U conversion) and transmits the data as it is, it is necessary to multiplex and transmit 64-bit data per stereo sample.

[0006]

However, in such a conventional digital audio transmission system, since the multiplex transmission including the preamble is performed, there is a disadvantage that the amount of transmission information increases and the transmission efficiency decreases.

An object of the present invention is to solve the above-mentioned drawbacks and to provide a digital audio transmission system capable of reducing the amount of transmission information and improving transmission efficiency.

[0008]

According to the present invention, there is provided a multiplexing circuit for multiplexing and transmitting digital audio interface data including a preamble of a plurality of bits per sample, and a separating circuit for separating an output of the multiplexing circuit. In the digital audio transmission system provided with the digital audio interface data, the preamble replacement for inputting the digital audio interface data, replacing a plurality of preambles with a frame synchronization bit pattern composed of a smaller number of bits, and outputting the frame synchronization bit pattern to the multiplexing circuit. Circuit, the multiplexing circuit includes multiplexing means for multiplexing the output of the preamble reordering circuit, and the separating circuit includes separating means for separating the output of the multiplexing means, from the output of the separating means. Detecting means for detecting the frame synchronization bit pattern, and the detecting means The frame synchronization bit pattern of the output of said separating means based on a detection result, characterized in that a synchronization bit Distribution circuit replacing attached to the plurality of preambles.

In the present invention, the digital audio interface data may be digital audio interface data defined by the EIAJCP-340 standard.

[0010]

The preamble changing circuit receives digital audio interface data, converts a plurality of preambles into a frame synchronization bit pattern composed of a smaller number of bits, and outputs the frame synchronization bit pattern to the multiplexing circuit. The multiplexing means multiplexes the output of the preamble changing circuit, and the separating means separates the output of the multiplexing means. The detecting means detects the frame synchronization bit pattern from the output of the separating means. The synchronization bit replacement circuit replaces the frame synchronization bit pattern output from the separation means with the plurality of preambles based on the detection result of the detection means.

As described above, the amount of transmission information can be reduced and the transmission efficiency can be improved.

[0012]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a digital audio transmission system according to an embodiment of the present invention.

In FIG. 1, a digital audio transmission system includes an input terminal 101 for inputting DAI data S1 including a preamble of a plurality of bits per sample, and a V11 interface circuit 102 for performing an unbalanced output conversion of the input terminal 101. , Video data S1
0, an input terminal 110 for inputting 0, a multiplexing circuit 104 for multiplexing DAI data including a plurality of preambles per sample and an output of the input terminal 110, and a multiplexing circuit 1
And a separating circuit 105 for separating the output of the circuit 04.
V11 interface circuit 108 for inputting the output DAI data of No. 5 and performing unbalanced balance conversion, an output terminal 109 of DAI data for transmitting the output of the V11 interface circuit 108, and video data for transmitting the output video data S11 of the separation circuit 105 And an output terminal 111.

The feature of the present invention is that V1
DAI data S3 compressed by replacing a plurality of preambles of output DAI data S2 of one interface circuit 102 with an F bit synchronization pattern of 1 bit per frame as a frame synchronization bit pattern composed of a smaller number of bits. Is provided to the multiplexing circuit 104. The multiplexing circuit 104 includes multiplexing means for multiplexing the compressed DAI data S3 output from the preamble changing circuit 103.
Reference numeral 5 denotes a separating means for separating the output multiplexed data S4 of the multiplexing circuit 104,
An F-bit synchronization detecting circuit 106 serving as detecting means for detecting the F-bit synchronization pattern from the AI data S5, and a separating circuit 10 based on the detection result of the F-bit synchronization detecting circuit 106
5, the F-bit synchronization changing circuit 107 as a synchronization bit changing circuit for changing the F bit synchronization pattern of the compressed DAI data S5 to the plurality of preambles and outputting the DAI data S7 to the V11 interface circuit 108.
And that it had.

The digital audio interface data (DAI data) is EIAJ CP-34.
0 is the digital audio interface data specified by the standard.

The operation of the digital audio transmission system having such a configuration will be described. FIG. 2 is a block diagram of a preamble changing circuit of the digital audio transmission system according to the present invention. FIG. 3 is a block diagram of an F-bit synchronous reordering circuit of the digital audio transmission system according to the present invention. FIG. 4 shows a frame format of compressed digital audio interface data of the digital audio transmission system of the present invention. FIG. 4A shows a subframe configuration, FIG. 4B shows a frame configuration and FIG.
Indicates an F-bit synchronization pattern.

FIG. 1 shows an example of multiplexing DAI data and video data. In the present embodiment, the DAI data as an input signal is, for example, EIAJ CP-340.
The signal shall conform to the digital audio interface standard. As shown in FIG. 6, the DAI data includes a 4-bit preamble and 4-bit information bits (V, U,
(C, P bits), and constitutes a subframe composed of 28 bits of audio data samples. Furthermore, one frame (stereo 1C
H), and 192 frames constitute one block. For details on the DAI standard, see “EAIJ CP-
340 Digital audio interface, 198
7.9 enactment ".

In FIG. 1, the operation on the transmitting side will be described first. DAI data S1 input from the input terminal 10 is V
The data is subjected to balance / unbalance (B / U) conversion by the 11 interface circuit 102. Preamble replacement circuit 1
03 detects the head of the block by the preamble of the DAI data subjected to the balance / unbalance conversion, replaces the 4-bit preamble with a 1-bit F-bit synchronization pattern per frame, and outputs one sample 5 shown in FIG.
The 7-bit compressed DAI data S3 is output. The multiplexing circuit 104 multiplexes the compressed DAI data S3 and video data S10 and outputs the multiplexed data S4 on the transmission line.

On the receiving side, the operation opposite to that of the transmitting side is performed. That is, in the compressed DAI data S5 separated from the separation circuit 105, the F bit synchronization detection circuit 106
Detects the F bit synchronization and outputs a block synchronization signal S6. Further, the switching from the F-bit synchronization pattern to the preamble is performed by the F-bit synchronization switching circuit 107 using the block synchronization signal S6, so that the DAI data S7 of 64 bits / one stereo sample can be reproduced.

The preamble changing circuit 103 and the F-bit synchronization changing circuit 107 will be described in detail below.

In FIG. 2, reference numeral 121 denotes a preamble detection circuit, 122 denotes a biphase demodulation circuit, and 123 denotes a FIFO.
O memory, 124 is a timing generator and 125 is a multiplexing circuit. The preamble detection circuit 121
By detecting the preamble of the AI data S2,
This is a circuit that outputs a block synchronization signal S21 indicating the beginning of a block. The timing generator 124 is a circuit that generates a FIFO control signal S24 and an F-bit change control signal S25 based on the block synchronization signal S21.
The bi-phase demodulation circuit 122 is a circuit that performs bi-phase demodulation of encoded audio data and control information excluding the preamble synchronization bit, and outputs 64-bit / one-sample audio data S22. The FIFO memory 123 writes the audio data S22,
FIRST IN FIRST for speed conversion read as audio data S23 of one bit stereo sample
OUT memory. The multiplexing circuit 125 multiplexes the F-bit synchronization pattern with the audio data S23 according to the F-bit change control signal S25, and converts the compressed DAI data S3 changed from the preamble to the F-bit synchronization pattern.
(FIG. 4 shows a frame configuration). As shown in FIG. 4, this F-bit synchronization pattern is one block per block.
Although 92 bits can be allocated, in this embodiment, a 16-bit pattern is allocated as a synchronization pattern, and the other bits are fixed bits.

In FIG. 3, 131 is a timing generator, 132 is a FIFO memory, 133 is a biphase demodulator, and 134 is a multiplexing circuit. The timing generator 131 uses the block synchronization signal S6 to perform FIFO
This is a circuit that generates a control signal S31, a biphase modulation control signal S33, and a preamble change control signal S35. The FIFO memory 132 is a speed conversion FIFO memory for writing the compressed DAI data S5 of one 57-bit stereo sample and reading out the audio data S32 of one 64-bit / stereo sample. Multiplexing circuit 13
4 multiplexes a 4-bit preamble with audio data S34 of 64 bits / one stereo sample to obtain DAI data S7 having a frame configuration shown in FIG.

With the circuit configuration described above, when multiplexing and transmitting DAI data, the transmission speed is doubled because 64 bits / stereo 1 sample (3.072 Mb / s, actually preamble modulation transmission). 6.144 Mb /
s. ) Is required, but if multiplexed transmission is performed instead of the F-bit pattern, it is possible to transmit at 57 bits / one stereo sample (2.736 Mb / s).

Further, since the receiving side replaces the F bit synchronization pattern with the original preamble, the transparency of the DAI data can be guaranteed.

[0025]

As described above, the present invention has an excellent effect of reducing the amount of transmission information and improving transmission efficiency.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital audio transmission system according to an embodiment of the present invention.

FIG. 2 is a block diagram of a preamble changing circuit of the digital audio transmission system of the present invention.

FIG. 3 is a block diagram of an F-bit synchronization switching circuit of the digital audio transmission system according to the present invention.

FIG. 4 is a frame format of compressed digital audio interface data of the digital audio transmission system of the present invention.

FIG. 5 is a block diagram of a conventional digital audio transmission system.

FIG. 6 shows a frame format of digital audio interface data of a conventional digital audio transmission system.

[Explanation of symbols]

 101 DAI data input terminal 102, 108 V11 interface circuit 103 Preamble replacement circuit 104, 104A, 125, 134 Multiplexing circuit 105, 105A Separation circuit 106 F bit synchronization detection circuit 107 F bit synchronization replacement circuit 109 Output of DAI data Terminal 110 Video data input terminal 111 Video data output terminal 121 Preamble detection circuit 122 Bi-phase demodulation circuit 123, 132 FIFO memory 124, 131 Timing generation circuit 133 Bi-phase modulation circuit S1, S2, S7, S8 DAI data S3, S5 Compressed DAI data S4 Multiplexed data S6, S21 Block synchronization signal S10, S11 Video data S22, S23, S32, S34 Audio data S24, S31 FIFO Control signal S25 F-bit change control signal S33 Bi-phase modulation control signal S35 Preamble change control signal

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04J 3/00 3/26 H04L 7/08

Claims (2)

(57) [Claims] 1. A digital audio transmission system comprising: a multiplexing circuit for multiplexing and transmitting digital audio interface data including a preamble of a plurality of bits per sample; and a separating circuit for separating an output of the multiplexing circuit. A multiplexing circuit that receives the digital audio interface data, replaces the plurality of preambles with a frame synchronization bit pattern composed of a smaller number of bits, and outputs the frame synchronization bit pattern to the multiplexing circuit; Includes multiplexing means for multiplexing the output of the preamble changing circuit, the separating circuit includes separating means for separating the output of the multiplexing means, and detects the frame synchronization bit pattern from the output of the separating means. Detecting means, based on a detection result of the detecting means, Digital audio transmission system, characterized in that the frame synchronization bit pattern of the output of the releasing means and a synchronization bit Distribution circuit replacing attached to the plurality of preambles. 2. The digital audio interface data defined in the EIAJCP-340 standard.
Digital audio transmission system as described.