JP2806472B2 - Multi-processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a multiple processing device for a time-division exchange. (Prior Art) It is known that a multi-processing method for performing a required number of parallel processes as a set of basic information transmission rates is useful in time division switching to handle traffic having different information transmission rates. Preservation of time sequence of multiple information (n × 64kb / s) in digital network
As described in -34), when the multiple processing is performed using the time division time switch, the time order may be disturbed among a plurality of output time slots assigned to the multiple.
In order to guarantee this at the time of exchange, continuous allocation of intermediate time slots and allocation of intermediate time slots by special calculation have been performed. (Problems to be Solved by the Invention) In the simple continuous allocation of intermediate time slots, the internal block rate is large, and the intermediate time slot allocation algorithm by calculation can allocate random intermediate time slots, so that the traffic characteristics are good. However, if the number of multiple calls is large, it takes time to process, and the time order preservation rule (TSSI) is guaranteed for two frames, so a means to secure frame synchronization on the terminal side is required. was there. (Means for Solving the Problems) The present invention provides an intermediate time slot group comprising a plurality of intermediate time slot sets satisfying a time order preservation rule in a time-division switching multiple processing device using a time-space-time switch configuration. Allocating means for allocating one or a plurality of intermediate time slot sets in the intermediate time slot group when a multiple call occurs, and the one or more allocating means based on the accommodation positions of the input device and the output device. Determining means for determining a frame delay amount between input and output time slots corresponding to a leading time slot of each of a plurality of intermediate time slot sets, and based on a result of the determination by the determining means, The method is characterized in that the allocation of the intermediate time slot group is controlled so that the frame delay amounts are the same. (Operation) In response to the occurrence of the multiple call, the control unit selects a required number of unused group numbers in the management table and determines the frame delay amount. A time slot of the unused group number is assigned to an intermediate time slot position. If all the frame delay amounts determined here match, allocation is performed, and the busy number of the group number is displayed. (Embodiment) First, the guarantee principle of the time order preservation rule of the configuration using the time-space-time switch will be described. FIG. 2 is an explanatory view of the guarantee principle. In the figure, P is a first time switch (hereinafter referred to as a P switch), H is a space switch (hereinafter referred to as an H switch), S is a last time switch (hereinafter referred to as an S switch), F is a frame head position, and A _{00 to} A. ₀₂ is an input time slot position on the P switch, B _{00 to} B ₀₂ is an output time slot position on the S switch, C _{0 to} C ₂ are intermediate time slot positions on the H switch, and T is a frame period (number of time slots). , W is assigned an intermediate time slot position C ₀ with respect to the intermediate time slot position C ₀ ~ ₂ assignments permissible location, X is the input time-slot position a ₀₀ is output to the S switch in the same frame with respect to the input time slot position a ₀₀ permissible location, Y is assigned permissible position of the intermediate time slot position C ₁ with respect to the input time slot position a ₀₀ is output to the S switch in the next frame, It is assigned allowable position of the intermediate time slot position C ₂ with respect to the input time slot position A ₀₀ is output to the S switch in the next following frame. In FIG. 2 (b) is P switch input time slot of input time slot position A _00, the intermediate time slots read the position C _0, the intermediate time of the H-switch slot position C ₀
Of via an intermediate time slot given to the S switch input time slot of the intermediate time slot position C ₀ to indicate that read from S switch output time slot position B ₀₀ of the time slot. Since the information cannot be read before being input by the time switch, the positional relationship of the intermediate time slot C ₀ satisfies A ₀₀ C ₀ B ₀₀ (in the same time slot, the input information is Read to the slot). Similarly intermediate time slots
Positional relationship between the C ₁ satisfies the A ₀₀ C ₁ B _01. Fig. 2 (b)
Indicates the conversion process of each time slot position A ₀₀ → C ₁ → B ₀₁ and A ₀₀ → C ₂ → B ₀₂ . Generally, the input time slot of the P switch is determined by the accommodation position of the input terminal, and the output time slot of the S switch is determined by the accommodation position of the output terminal. Therefore, when the accommodation positions of the input terminal and the output terminal are determined, the input time slot positions A _{00 to} A ₀₂ and the output time slot positions B _{00 to} B _02
02 is determined, and if the time slot position on the H switch in the conversion process is AB, that is, if the input time slot position is earlier than the output time slot position, the time slot position C _0,1 is set during FIG. on assignment allowable position W, may be set on the assigned allowable position W of the intermediate time slot positions C _{1, 2} of the a> B if the second view (b). At this time, if the C ₀ to ₂ points on the allocation allowable position W belong to the allocation allowable positions X, Y, and Z, the input time slot frame is converted into the same frame, the next frame, and the next frame. . Actually, since each time slot position cannot exceed the frame period T, the output time slot positions B _{00 to} B ₀₂ are always B _XX MOD (T) = B ₀₀ as the time slot position. The same applies to the intermediate time slot position C ₀ ~ _2. More than the allowable point intermediate time slot position C ₀ ~ ₂ points can be expressed as follows. If the condition of the intermediate time slot C _n is K = 0 on the H-switch when the frame delay amount and K is the AB AC _n B K = 1 condition in the case of AB B <C <A + K · T
When C _n = CMOD (T) or A> B ACB + KT
C _n = CMOD (T) For K = 2 the conditions A> B B + (K- 1) T <
C <A + (K−1) · T Cn = CMOD (T) Or simply expressed: AB: ACB → K = 0 Other than above → K = 1 When A> B <C <A → K = 2 Above → K = 1 According to this, the intermediate time slot C _n point can be assigned to an arbitrary frame position, and each time slot position A,
Once the B and C _n points are determined, only one frame delay K is determined. The same concept can be applied to multiple calls. FIG. 3 shows the time slot assignment of a multiple call. This shows an example of the plural number 3 with K = 1, and each Ci (i = 0 to 2) point is located on the time slot position C _n point allocated to the time slot allocation allowable position Y on the H switch. Each P if placed
It can be seen that even if the time order preservation rule (TSSI) is disturbed for each switch and S switch, the time order preservation rule is secured within one frame on the final output time slot of the S switch. In FIG. 3, an allowable time slot allocation position Y ₀ of the intermediate time slot indicates an allowable allocation section of the intermediate time slot position C ₀ for allocating the input time slot position A ₀ to the output time slot B ₀ when K = 1. the allocation permitting position Y _1, Y ₂ Aru respectively shows the input time slot positions a _1, a _2. From this, if Y ₀ , Y ₁ , and Y ₂ within the permissible section are assigned, even if an arbitrarily selected intermediate time slot position C _i is assigned, the time order preservation rule within one frame is maintained on the S switch, and K It can be said that the value can be managed. Depending on the generated call, the number of required time slots is one or more. In the case of one, the delay amount k is determined to be one no matter which intermediate time slot is selected according to the above description, and the time is automatically set. While the order preserving rule is guaranteed, in a plurality of cases, the time order preserving rule is guaranteed if the delay amount k for each of the selected intermediate time slots is the same. FIG. 4 shows the assignment of input / output time slots, and is an application example in the case where assignment with high regularity is made to input / output time slots. Input device (not shown) is a time slot to A ₀ to A _n, the output device (not shown) is to be assigned each time slot to B ₀ ~B _n. #N is an appropriately defined time slot management group in which multiple calls are allocated at equal intervals. That is, the input / output device makes a multiple call (A +
B _i ) × 4 + C (A and C are fixed values determined for each call, B _i = ₀ , ₁ ,
.., N). Here, A _i = (P + i) × 4
+2 (i = ₀ , ₁ ,..., N) B _i = (q + i) × 4 + 1
(I = ₀ , ₁ ,..., N). Here, A _i indicates an input time slot position, B _i indicates an output time slot position, and P and q indicate group numbers. From now on H
The allowable range of the position C _i of the intermediate time slot on the switch has a certain phase shift as shown in FIG.
5 Although FIG is an intermediate time slot allocation permitting position C _i as a frame delay amount K = 1, the case of the arrangement of the A _0> B ₀ K
= 2, and K = 0 can be selected in the case of the arrangement of A ₀ B _0. Therefore, considering each case, the intermediate time slot allocation allowable position C ₀ can be selected at an arbitrary position. Since the tolerance of the intermediate time slot allocation tolerance position C _i has a fixed phase, which is the same as the phase difference in each of the input time slot A _i and the output time slot B _i , C _i =
If (M + i) × 4 + N (i = ₀ , ₁ ,..., N), the value of the frame delay amount K obtained between the time slot positions A ₀ , B ₀ , and C ₀ is the time slot position A _i , B _i and C _i , the same as the value of the frame delay K obtained. Therefore, when a group of intermediate time slots shifted by four time slots is created and the group is assigned to a multiple call, conversion is automatically performed with the guaranteed time order preservation rule. FIG. 1 is a block diagram showing a specific example of the assignment of an intermediate time slot. In the figure, 10 is a control unit, 11 is a management table,
12 is an input device, 13 is a switch group, and 14 is an output device.
The control unit 10 has a function of determining an index of a free time slot in the management table 11 and a value of the frame delay amount K by inputting a set of input / output time slots to be connected. Further, it controls the display of the use state and the like. The management table 11 indicates a group having four time slots. The time slots corresponding to the current group numbers GN = 0, 1, 3 are in use, and the group numbers GN = 2, 4 indicate that they are free. . The operation will be described below with reference to FIG. When a call with a plurality of fours occurs, the call is input to the switch group 13 by the input device 12. The control unit 10 includes a management table 11
Assignment of the display in use the group number GN = 2 corresponding time slots by selecting the "0" to an intermediate time slot position C _i, Bs in use group number GN = 2 to 1. Considering the occurrence of a call of plural number 8 here, if the group number GN = 3 is empty, GN = 2, and if three groups are allocated, they are unconditionally allocated because they are continuous constant phase slots. Since group number GN = 3 is in use, GN = 2 and 4 need to be assigned. In this case, the control unit 10 sets the time slot group TS ₀ of each group number GN.
The value of the frame delay amount K is checked, and if they match, the corresponding time slot set is assigned to the intermediate time slot set. FIG. 6 shows an example of conversion in the case of multiple call 8. Input time slot position A _i = 22,26,30,34,38,42,46,50 Output time slot position Bi = 28,32,36,40,44,48,52,56, and intermediate time slot position Although for the C _i group number GN = 2, 4 sequentially allocated to the input time-slot position a ₀ to a K = 1, a K = 0 becomes inconvenient to the input time-slot position a _4. Therefore the intermediate time slot positions C _i and the assigned in the order of group number GN = 4.2 input time slot A _0, A ₄ together to obtain a K = 1 is determined to be assigned, assign the corresponding input time slot set to an intermediate time slot sets . There are variations in the time slot group management method, and the main parameters are shown below. (1) Number of time slots per GN to be managed There is an optimum value depending on the type of the plural number N and the appearance frequency. (2) Time slot allocation in GN to be managed There is an optimum value depending on the periodicity of the time slot accommodated in the input / output terminal. (3) Number of GN Tables to Manage There is an optimum value for accommodating the same time slot in a plurality of tables depending on the combination of the above (1) and (2). It is one idea to adopt a hierarchical structure. (4) Time slot arrangement between adjacent GNs Since it is necessary to allocate a plurality of GNs to one multiple call according to the relationship between the maximum number of multiples and the above (1), generally the adjacent GNs are assigned.
It is preferable that the time slots between them maintain the periodicity of (2). As another management method, there is a method using a two-dimensional map in which a maximum plural number is taken in a row. In this case, there is an advantage that the group management can be set to an arbitrary length of an arbitrary line. As described above, the assignment of the intermediate time slot to the multiple call can follow a certain rule in the set, so that the number of times of transmitting the path setting order can be reduced. As an example,
For the input / output time slot, if the leading time slot A is determined in the case of input, the other time slots of the multiple call n are A +
(N-1) .times.S, leading time slot B also in the case of output
Is determined, B + (n-1) .times.S, and C + (n-1) .times.S when the assigned intermediate time slots can be collectively designated by one group.
The path order can be automatically connected by specifying each point of A, B, and C and a multiple number (simultaneously set number) n. The same method can be applied to the case of an exchange configuration using a multistage time switch. (Effect of the Invention) As described above, according to the present invention, in a time division switch using a time-space-time switch configuration, a plurality of
An intermediate time slot group that satisfies TSSI is provided in advance, and one or more sets are assigned from the group when a multiple call is generated. In addition, since the processing time can be reduced and the degree of freedom in selecting a group or a set is high, the traffic characteristics are not significantly impaired, so that efficient processing can be expected. Also, since the frame delay between input / output time slots is determined, the TSSI within one frame can be guaranteed, and the input / output terminal does not need to perform multiple processing.
TSSI at each relay stage even if multiple relay stages with the same configuration are used
Has the advantage that can be guaranteed. In addition, since intermediate time slot allocation of multiple calls can be processed collectively, the number of path connection order transmissions can be reduced, and processing efficiency can be expected.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an intermediate time slot assignment;
FIG. 2 is a diagram for explaining the principle of guaranteeing the time order preservation rule, FIG. 3 is a diagram for explaining time slot allocation for multiple calls, FIG. 4 is a diagram for explaining input / output time slot allocation, and FIG. 5 is a diagram for explaining intermediate time slot allocation. FIG. 6 is a conversion diagram of the multiple call 8. 10 control unit, 11 management table, 12 input device,
13: Switch group, 14: Output device, F: Frame head position, P: First stage time switch, H ... Space switch, S ... Last stage time switch.

Continuation of front page    (72) Inventor Yoshitaka Saito               1-7-12 Toranomon, Minato-ku, Tokyo Okiden               Ki Industry Co., Ltd. (72) Inventor Akihiko Asano               1-7-12 Toranomon, Minato-ku, Tokyo Okiden               Ki Industry Co., Ltd.                (56) References JP-A-57-79793 (JP, A)

Claims (1)

(57) [Claims] A time-division exchange multiple processing apparatus using a time-space-time switch configuration, comprising an intermediate time slot group consisting of a plurality of intermediate time slot groups satisfying a time order preservation rule, wherein the intermediate time slot group is generated when a multiple call is generated. Allocating means for allocating one or a plurality of intermediate time slot sets, and a first time slot for each of the one or a plurality of intermediate time slot sets to be allocated based on the accommodation positions of the input device and the output device. Determining means for determining a frame delay amount between corresponding input / output time slots, based on a result of the determination by the determining means, the allocating means sets the frame delay amount to be equal to the intermediate time slot. A multiple processing apparatus characterized by performing group assignment control.