JP2800341B2 - Method for manufacturing voltage non-linear resistor element - Google Patents

Method for manufacturing voltage non-linear resistor element

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Publication number
JP2800341B2
JP2800341B2 JP2011336A JP1133690A JP2800341B2 JP 2800341 B2 JP2800341 B2 JP 2800341B2 JP 2011336 A JP2011336 A JP 2011336A JP 1133690 A JP1133690 A JP 1133690A JP 2800341 B2 JP2800341 B2 JP 2800341B2
Authority
JP
Japan
Prior art keywords
thin film
sio
voltage non
varistor element
linear resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2011336A
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Japanese (ja)
Other versions
JPH03214705A (en
Inventor
貴之 湯浅
雅昭 勝又
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
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Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2011336A priority Critical patent/JP2800341B2/en
Publication of JPH03214705A publication Critical patent/JPH03214705A/en
Application granted granted Critical
Publication of JP2800341B2 publication Critical patent/JP2800341B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 産業上の利用分野 本発明は、酸化亜鉛を主成分とし、それ自身が電圧非
直線性を示す焼結体の側面に、高抵抗層を形成した電圧
非直線抵抗体素子の製造方法に関するものである。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage non-linear resistor having a high resistance layer formed on a side surface of a sintered body mainly composed of zinc oxide and exhibiting voltage non-linearity itself. The present invention relates to a method for manufacturing an element.

従来の技術 従来より、酸化亜鉛を主成分とし、これにビスマス、
マンガン等の酸化物を添加物として加え、成形して、焼
成することにより得られる電圧非直線性の高い抵抗体
は、酸化亜鉛バリスタと呼ばれ、電圧安定化素子、サー
ジ吸収素子、避雷器等として広く用いられている。
2. Description of the Related Art Conventionally, zinc oxide has been used as a main component, and bismuth,
A resistor having a high voltage non-linearity obtained by adding an oxide such as manganese as an additive, molding, and firing is called a zinc oxide varistor, and is used as a voltage stabilizing element, a surge absorbing element, a lightning arrestor, and the like. Widely used.

この酸化亜鉛バリスタを電力用避雷器として用いる場
合、要求されるべき特性の一つに放電耐量特性がある。
これは、JEC−187−1973に規定されているように、4/10
μsの衝撃電流を5分間隔で2回印加し、素子が耐え得
るピーク電流の最大値である。
When this zinc oxide varistor is used as a power surge arrester, one of the required characteristics is a discharge withstand characteristic.
This is defined as 4/10, as specified in JEC-187-1973.
This is the maximum value of the peak current that the element can withstand when a shock current of μs is applied twice at 5 minute intervals.

従来より、電力用避雷器の製造方法として、放電耐量
を上げることを目的に、避雷素子の側面に、SiO2,Zn7Sb
2O12,Bi2O3等の混合物を塗布し、焼結させ、高抵抗層を
形成したり(特開昭56−69804号公報)、焼成容器内にS
b2O3,Bi2O3,SiO3等からなる混合物を配置し、気−固相
反応により避雷素子の側面に高抵抗層を形成する方法
(特公昭60−15128号公報)等が知られていた。
Conventionally, as a method of manufacturing a power surge arrester, SiO 2 , Zn 7 Sb
A mixture of 2 O 12 , Bi 2 O 3, etc. is applied and sintered to form a high resistance layer (Japanese Patent Application Laid-Open No. 56-69804).
b 2 O 3, Bi 2 O 3, the mixture is placed consisting of SiO 3 etc., air - a method of forming a high-resistance layer on the side surfaces of the arrester element by solid phase reaction (JP-B 60-15128 Patent Publication) Hitoshigachi Had been.

発明が解決しようとする課題 しかしながら、上記の方法では、前者の場合、焼結後
の高抵抗膜中の粒子の大きさが不均一であったり、作製
膜がポーラスであったりすることがあり、避雷素子と高
抵抗膜との密着性が必ずしも十分ではない場合がある。
また、後者の場合、作製膜厚の均一性が良くない場合が
ある。そして、高抵抗層と、避雷素子との密着性が十分
ではないと、サージ電流が避雷素子と高抵抗層の間をリ
ークし、本来持つべき高抵抗層の特性は十分に満たされ
ず、放電耐量の限界値が低下することがある。また、高
抵抗膜の膜厚が均一でないと、膜の薄いところを選択的
にサージ電流が流れ、放電耐量の限界値が低下する原因
になる。
Problems to be Solved by the Invention However, in the above method, in the former case, the size of the particles in the high-resistance film after sintering is not uniform, or the produced film may be porous, In some cases, the adhesion between the lightning arrester and the high-resistance film is not always sufficient.
In the latter case, the uniformity of the formed film thickness may not be good. If the adhesion between the high-resistance layer and the lightning arrester is not sufficient, a surge current leaks between the lightning arrester and the high-resistance layer, and the characteristics of the high-resistance layer, which should be originally possessed, are not sufficiently satisfied. Limit value may decrease. In addition, if the thickness of the high resistance film is not uniform, a surge current flows selectively in a thin portion of the film, which causes a decrease in the limit value of the discharge withstand amount.

本発明は、このような課題を解決するもので、バリス
タ素体側面にバリスタ素体と密着性が高く、均一な厚み
の高抵抗薄膜を形成することにより、放電耐量特性に優
れた電圧非直線抵抗体素子を提供することを目的とする
ものである。
The present invention is intended to solve such a problem. By forming a high-resistance thin film having high uniformity and a uniform thickness on the varistor element side surface on the side of the varistor element, the voltage non-linearity excellent in discharge withstand characteristics can be obtained. It is an object of the present invention to provide a resistor element.

課題を解決するための手段 この目的を達成するために本発明の電圧非直線抵抗体
素子の製造方法は、酸化亜鉛を主成分とするバリスタ素
体の上、下を挟持して回転させながらCVD法またはスパ
ッタリング法により前記バリスタ素体の後を面にSiO2
膜またはSi3N4薄膜を形成することを特徴とするもので
ある。
Means for Solving the Problems In order to achieve this object, a method for manufacturing a voltage non-linear resistor element according to the present invention comprises the steps of: An SiO 2 thin film or a Si 3 N 4 thin film is formed on the surface behind the varistor element by a sputtering method or a sputtering method.

作用 この方法によると、耐熱衝撃性、絶縁性に優れたSiO2
薄膜またはSi3N4薄膜をバリスタ素体の側面に均一な厚
みで、かつバリスタ素体との密着性良く形成することが
できるので、サージ電流印加による強電界やバリスタ素
体の発熱に十分耐え得る、すなわち、放電耐量特性に優
れた電圧非直線抵抗体素子を得ることができる。
According to this method, SiO 2 with excellent thermal shock resistance and insulation properties
Since a thin film or Si 3 N 4 thin film can be formed on the side surface of the varistor element with uniform thickness and good adhesion to the varistor element, it can sufficiently withstand a strong electric field due to surge current application and heat generation of the varistor element. That is, it is possible to obtain a voltage non-linear resistor element having excellent discharge withstand characteristics.

実施例 以下、本発明の製造方法について、実施例に基づき詳
細に説明する。
Examples Hereinafter, the production method of the present invention will be described in detail based on examples.

まず、酸化亜鉛粉末に、ビスマス、コバルト、マンガ
ン、アンチモン、クロム等の酸化物を、合計量に対して
それぞれ0.3mol%〜1.5mol%加え、十分に粉砕、混合し
た後、造粒し、原料粉を作製した。この原料粉を直径40
mm、厚さ30mmの大きさに圧縮形成し、空気中で700℃〜9
00℃の温度で十分にバインダーを分解した後、空気中に
おいて1200℃で焼結させ、酸化亜鉛バリスタ素体を得
た。
First, oxides such as bismuth, cobalt, manganese, antimony, and chromium are added to zinc oxide powder in an amount of 0.3 mol% to 1.5 mol% based on the total amount, sufficiently pulverized and mixed, and then granulated. A powder was made. This raw material powder has a diameter of 40
mm, thickness of 30mm, formed in air, 700 ° C ~ 9 in air
After sufficiently decomposing the binder at a temperature of 00 ° C, the binder was sintered in air at 1200 ° C to obtain a zinc oxide varistor body.

このようにして得られたバリスタ素体の側面に、プラ
ズマCVD法を用い、SiO2の高抵抗膜を形成した。以下
に、その具体的な作製方法を示す。すなわち、第2図に
示すように、バリスタ素体4の上下を回転可能な治具5
で挟み、予め300℃の温度に赤外線を用いてバリスタ素
体4を加熱させた後、ゆっくり回転させながら反応室6
を通過させた。ここで、膜厚は反応室6を通過させる時
間で制御した。そして、反応室6の内容量は、約65リッ
トル、反応ガスは、SiH4ガスが30(ml/min)、N2Oガス
が800(ml/min)の流量で反応室6中にガス導入バルブ
8を制御して導入し、製膜中の反応室6のガス圧は、1T
orr.になるように真空ポンプ(図示せず)へのメインバ
ルブ9により制御した。また、プラズマを作る放電電極
7は、40cm角の平面で、13.56MHzの高周波電源を用い、
500(W)の電力を投入した。上記条件でのバリスタ素
体4上での製膜速度は、約150(ml/min)であった。こ
の条件で膜厚を変えて、4種類の試料を作成した。この
ようにして作製した試料の両端面を研磨してアルミニウ
ムの容射電極を形成し、バリスタ素子を作製した。この
ようにして作製したバリスタ素子の概略図を第1図に示
す。下記の第1表に作製した試料のSiO2薄膜の膜厚を示
す。
A high resistance film of SiO 2 was formed on the side surface of the varistor element body thus obtained by using a plasma CVD method. The specific manufacturing method is described below. That is, as shown in FIG. 2, a jig 5 rotatable up and down of the varistor element body 4 is provided.
After heating the varistor element 4 in advance at a temperature of 300 ° C. using infrared rays, the reaction chamber 6 is rotated slowly.
Passed through. Here, the film thickness was controlled by the time required to pass through the reaction chamber 6. The internal volume of the reaction chamber 6 is about 65 liters, and the reaction gas is introduced into the reaction chamber 6 at a flow rate of 30 (ml / min) of SiH 4 gas and 800 (ml / min) of N 2 O gas. The valve 8 was controlled and introduced, and the gas pressure in the reaction chamber 6 during film formation was 1 T
orr. was controlled by a main valve 9 to a vacuum pump (not shown). The discharge electrode 7 for generating plasma is a plane of 40 cm square and uses a 13.56 MHz high frequency power supply.
500 (W) power was applied. The film formation rate on the varistor element body 4 under the above conditions was about 150 (ml / min). The film thickness was changed under these conditions, and four types of samples were prepared. Both ends of the sample thus manufactured were polished to form aluminum spray electrodes, and a varistor element was manufactured. FIG. 1 shows a schematic view of the varistor element thus manufactured. Table 1 below shows the thickness of the SiO 2 thin film of the prepared sample.

また、第1図において、1は酸化亜鉛バリスタ素体、
2はSiO2薄膜、3は電極である。
In FIG. 1, 1 is a zinc oxide varistor element body,
2 is an SiO 2 thin film and 3 is an electrode.

また、比較のために、従来例の素子として、SiO2薄膜
の代わりに、バリスタ素体の側面に、SiO2,Zn7Sb2O12,B
i2O3を適当な割合で混合した絶縁材料を薄くコーティン
グし、熱処理を施し、上記と同様の方法で電極を形成し
て作製した試料(試料5)を用意した。
For comparison, as a conventional device, instead of a SiO 2 thin film, SiO 2 , Zn 7 Sb 2 O 12 , B
A sample (sample 5) was prepared by thinly coating an insulating material in which i 2 O 3 was mixed at an appropriate ratio, performing heat treatment, and forming an electrode in the same manner as described above.

このようにして得られたバリスタ素子(試料1〜5)
に対して、4/10μsの衝撃電流を5分間隔で2回印加
し、素子が耐え得るピーク電流の限界値を測定した。
Varistor element thus obtained (Samples 1 to 5)
Then, an impact current of 4/10 μs was applied twice at 5 minute intervals, and the limit value of the peak current that the element could withstand was measured.

この結果を下記の第2表に示す。第2表中、×印が素
子の破壊した電流値である。
The results are shown in Table 2 below. In Table 2, the mark x indicates the current value at which the element was destroyed.

第2表より、SiO2薄膜をバリスタ素体の側面にコーテ
ィングした素子の放電耐量は何もコーティングしていな
い素子、または熱処理により絶縁材料をコーティングし
た素子のそれに比べて、大きく優れていることがわか
る。また、今回の実験では、SiO2薄膜の膜厚が厚くなる
ほど放電耐量は大きくなっているが、膜厚が10μmの素
子においても、従来例に比べ十分特性の向上は認められ
る。
From Table 2, it can be seen that the discharge withstand capability of the element coated with the SiO 2 thin film on the side surface of the varistor element is significantly superior to that of the element coated with nothing or the element coated with insulating material by heat treatment. Recognize. Further, in this experiment, although the discharge withstand capacity increased as the thickness of the SiO 2 thin film increased, the characteristics were sufficiently improved even in a device having a thickness of 10 μm as compared with the conventional example.

尚、今回の実験において、SiO2薄膜はSiH3ガスと、N2
Oガスを用いたプラズマCVD法により作製したが、これは
プラズマCVD法に限らず、減圧CVD法や、常圧CVD法等、
他の化学気相成長法、あるいはスパッタリング等の物理
的蒸着法によっても、SiO2薄膜の作製は可能であり、本
発明の素子に適応することは可能である。
In this experiment, the SiO 2 thin film was composed of SiH 3 gas and N 2
It was produced by the plasma CVD method using O gas, but this is not limited to the plasma CVD method, such as a low pressure CVD method, a normal pressure CVD method, etc.
The SiO 2 thin film can be produced by other chemical vapor deposition methods or physical vapor deposition methods such as sputtering, and can be applied to the device of the present invention.

ここで、上記のSiO2薄膜に代えてSi3N4薄膜により高
抵抗膜を形成しても、上記実施例と同様の効果を得るこ
とができた。下記の第3表に作製した試料のSi3N4薄膜
の膜厚を示す。ここで、試料の作製条件は、反応ガス
が、SiH4ガス:30(ml/min),N2ガス:800(ml/min)であ
り、バリスタ素体上での製膜速度:約50(nm/min)とし
た以外は、全て上記実施例と同一条件とした。
Here, even if a high-resistance film was formed by using a Si 3 N 4 thin film instead of the above-mentioned SiO 2 thin film, the same effect as in the above example could be obtained. Table 3 below shows the film thickness of the prepared Si 3 N 4 thin film. Here, the sample preparation conditions were as follows: the reaction gas was SiH 4 gas: 30 (ml / min), N 2 gas: 800 (ml / min), and the film formation rate on the varistor element: about 50 ( nm / min), except that the conditions were all the same as in the above example.

ここで、試料6は上記実施例の試料1と同一のもので
ある。これらの試料について、上記実施例と同様の衝撃
電流を印加し、素子が耐え得るピーク電流の限界値を測
定した結果を下記の第4表に示す。また、第4表におい
ても、上述した比較用の試料5による測定結果を参考の
ために記載している。
Here, the sample 6 is the same as the sample 1 of the above embodiment. Table 4 shows the results of applying the same impact current to these samples and measuring the limit value of the peak current that the device can withstand. Table 4 also shows, for reference, the measurement results obtained using the above-described sample 5 for comparison.

上記の第4表に示すように、Si3N4薄膜を用いた場合
においても、優れた放電耐量特性を得ることができる。
特に、Si3N4薄膜の場合は、膜厚が2.0μmの素子におい
ても、従来例に比べ十分に特性の向上が認められるもの
である。また、このSi3N4薄膜は、SiH3ガスと、NH3ガス
を用いたプラズマCVD法によっても作製することがで
き、その他に上記実施例と同様に、減圧CVD法や常圧CVD
法等の他の化学気相成長法、あるいはスパッタリング等
の物理的蒸着法によっても、作製可能なことはもちろん
である。
As shown in Table 4 above, even when a Si 3 N 4 thin film is used, excellent discharge capability can be obtained.
In particular, in the case of the Si 3 N 4 thin film, even if the device has a thickness of 2.0 μm, the characteristics are sufficiently improved as compared with the conventional example. Further, this Si 3 N 4 thin film can also be produced by a plasma CVD method using a SiH 3 gas and an NH 3 gas.
Of course, it can also be manufactured by other chemical vapor deposition methods such as a chemical vapor deposition method, or a physical vapor deposition method such as sputtering.

発明の効果 以上本発明によると、耐熱衝撃性、絶縁性に優れたSi
O2薄膜またはSi3N4薄膜をバリスタ素体の側面に均一な
厚みで、かつバリスタ素体との密着性良く形成すること
ができるので、サージ電流印加により強電界やバリスタ
素体の発熱に十分耐え得るすなわち、放電耐量特性に優
れた電圧非直線抵抗体素子を得ることができる。
Effects of the Invention According to the present invention, Si having excellent thermal shock resistance and insulation properties is provided.
An O 2 thin film or Si 3 N 4 thin film can be formed on the side surface of the varistor element with a uniform thickness and good adhesion to the varistor element. It is possible to obtain a voltage non-linear resistor element that can sufficiently withstand, that is, is excellent in discharge withstand characteristics.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の製造方法により作製した電圧非直線抵
抗体素子の断面図、第2図は本発明の製造方法における
薄膜形成方法の一例を示した図である。 1……酸化亜鉛バリスタ素体、2……SiO2薄膜、3……
電極、4……酸化亜鉛バリスタ素体、5……回転可能な
治具、6……反応室、7……放電電極、8……ガス導入
バルブ、9……真空ポンプへのメインバルブ。
FIG. 1 is a cross-sectional view of a voltage non-linear resistor element manufactured by the manufacturing method of the present invention, and FIG. 2 is a view showing an example of a thin film forming method in the manufacturing method of the present invention. 1 ...... zinc oxide varistor element, 2 ...... SiO 2 thin film, 3 ......
Electrode, 4 ... Zinc oxide varistor element, 5 ... Rotable jig, 6 ... Reaction chamber, 7 ... Discharge electrode, 8 ... Gas introduction valve, 9 ... Main valve to vacuum pump.

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01C 7/02 - 7/22──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 6 , DB name) H01C 7/02-7/22

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】酸化亜鉛を主成分とするバリスタ素体の
上、下を挟持して回転させながらCVD法またはスパッタ
リング法により前記バリスタ素体の側面にSiO2薄膜また
はSi3N4薄膜を形成することを特徴とする電圧非直線抵
抗体素子の製造方法。
1. A thin film of SiO 2 or a thin film of Si 3 N 4 is formed on a side surface of a varistor element by a CVD method or a sputtering method while sandwiching and rotating the varistor element mainly composed of zinc oxide. A method for manufacturing a voltage non-linear resistor element.
JP2011336A 1990-01-19 1990-01-19 Method for manufacturing voltage non-linear resistor element Expired - Fee Related JP2800341B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2011336A JP2800341B2 (en) 1990-01-19 1990-01-19 Method for manufacturing voltage non-linear resistor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011336A JP2800341B2 (en) 1990-01-19 1990-01-19 Method for manufacturing voltage non-linear resistor element

Publications (2)

Publication Number Publication Date
JPH03214705A JPH03214705A (en) 1991-09-19
JP2800341B2 true JP2800341B2 (en) 1998-09-21

Family

ID=11775191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011336A Expired - Fee Related JP2800341B2 (en) 1990-01-19 1990-01-19 Method for manufacturing voltage non-linear resistor element

Country Status (1)

Country Link
JP (1) JP2800341B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6019122B2 (en) * 1980-06-17 1985-05-14 松下電器産業株式会社 Manufacturing method of voltage nonlinear resistor
JPS6480002A (en) * 1987-09-21 1989-03-24 Chichibu Cement Kk Nonlinear resistor

Also Published As

Publication number Publication date
JPH03214705A (en) 1991-09-19

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LAPS Cancellation because of no payment of annual fees