JP2799808B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a LOC (lead frame-on-chip) semiconductor device.
On the back of the lead frame body with many leads,
The present invention relates to a semiconductor device having a semiconductor chip mounting portion formed separately so that a large number of leads are arranged in a state of being separated from an upper portion of a circuit surface area of a semiconductor chip.

[0002]

2. Description of the Related Art In recent years, semiconductor devices have become larger in size with higher integration and larger capacity of semiconductor chips, but the resin sealing size has been reduced and the mounting density has been increasing. Accordingly, this type of semiconductor device is disclosed in Japanese Patent Application Laid-Open No. 61-241959, in which an electrically insulating insulating tape having a large number of leads provided with adhesives on both surfaces is provided on a circuit forming surface of a semiconductor chip. One end of the bonding wire is connected to the electrode terminal of the semiconductor chip, and the other end is connected to the lead to form an electrical conduction circuit, and these are sealed with a resin member. LOC (Lead On Chip) structure is adopted.

According to this semiconductor device, since the leads can be freely routed to the electrode terminals of the semiconductor chip without being restricted by the shape of the semiconductor chip, a large-sized semiconductor chip can be sealed. However, in this type of technology, when the insulating tape is bonded to the circuit surface area of the semiconductor chip, there is a problem that the circuit surface area of the semiconductor chip is damaged or a bonding wire is crimped to the wire bonding area of the lead. In such a case, an impact load or a crimping load is applied to the circuit surface area of the semiconductor chip, which has a problem that the circuit surface area of the semiconductor chip is damaged.

In order to solve the above problems,
A large number of leads, which are disclosed in Japanese Patent Application Laid-Open No. 2-246125, are provided above the circuit surface area of the semiconductor chip in a floating state without an insulating tape interposed therebetween, and one end of the semiconductor chip is provided at one end of the semiconductor chip. An electrical conduction circuit is formed with a bonding wire connected to the electrode terminal and the other end connected to the wire bonding area of the lead, and these semiconductor chips, the bonding wire and one end of the lead are molded. A semiconductor device having a structure sealed with a resin and a method for manufacturing the same are proposed.

[0005]

However, in the disclosed prior art semiconductor device, since a large number of leads are arranged in a state of floating on the circuit forming surface of the semiconductor chip, they are integrated with the lead frame. The semiconductor chip is supported by being adhered or sandwiched and fixed to the side end surface of the semiconductor chip at the side surface of the tip bent downwardly below the formed support lead by using an adhesive or the elastic force of the support lead. Therefore, when the semiconductor chip is mounted, there has been a problem that the long-term reliability of the semiconductor device is deteriorated, such as a positional shift of the chip or a non-uniform residual stress caused by pressure contact with the semiconductor chip, thereby damaging the semiconductor chip. Further, since a large number of leads are arranged in a floating state on the circuit forming surface of the semiconductor chip, the wire bonding area at the tip of the lead becomes a free end, so that the lead is shifted or ups and downs occur. There has been a problem that the position of the wire bonding region becomes unstable and the bondability of the wire is reduced. further,
When the semiconductor chip is bonded or sandwiched and fixed, a positioning jig and a jig for pushing and spreading the support lead are required, and there is a problem that the working efficiency is reduced.

An object of the present invention is to provide a semiconductor device which is arranged in a state in which a large number of leads are spaced on the circuit forming surface of the semiconductor chip, semi occurring when mounting the semiconductor chip
Electrode terminals of the conductor chip and the corresponding number of leads
It is an object of the present invention to provide a semiconductor device with high long-term reliability by preventing misalignment and residual stress from being retained, and improving the diffusion efficiency of heat generated by a semiconductor chip.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor device, comprising :
A semiconductor chip having electrode terminals;
A large number of leads connected to the electrode terminals of the chip
Predetermined lead frame body placed adjacent to the pole terminal
And the large number of leads are separated above the semiconductor chip.
Behind the lead frame body so that it is
A semiconductor chip supporting portion joined and supported on a surface, and the semiconductor
A chip, the semiconductor chip support, and the plurality of
And a resin sealing member for sealing one end of the semiconductor chip.
In the body device, the semiconductor chip supporting portion includes a mounting portion for mounting the semiconductor chip at the center, a frame-shaped joining flat portion surrounding the mounting portion, and a through hole for forming a plurality of suspension leads. The semiconductor chip is provided outside the outer edge portion, and the suspension lead at the outer edge portion is bent while leaving the bonding flat portion.
A separate conductor cage formed by setting the mounting surface down, and the conductor cage holds a semiconductor chip.
In the mounted state, adhesive layers are applied to both sides so that the joint leads and many leads are connected together at the joint flat part.
The lead frame is joined and supported on the back surface of the lead frame via the provided insulating tape. The semiconductor device according to claim 2 is the semiconductor device according to claim 1, wherein the lead frame main body is
Consisting of first and second lead groups formed inside the outer frame
Projected from many leads and outer frame in the same plane
It consists of a pair of joining leads,
Wire bonding area at the tip and the end of the bonding lead
Only on the back side including the end area, has an adhesive on one side,
Insulation with through holes that expose the electrode pads of the conductor chip
Adhesive tape, and these are integrally connected.
It is characterized by having.

[0008]

In the semiconductor device according to the first aspect, the joint flat portion of the conductor cage formed separately has a double-sided adhesive.
For bonding leads and many leads via insulating tape
Since they are integrally connected and supported, they are half as in the prior art.
Non-uniform stress is no longer applied to the conductor chip and the semiconductor chip
Of the semiconductor chip due to deformation such as warpage and tilt of the
Prevents damage and joins heat generated by semiconductor chips
Diffusion into bonding leads and many leads through flat parts
You. Further, the degree of freedom in selecting the material of the conductor cage member and the material for surface treatment is increased, and the heat diffusion efficiency of the semiconductor chip is remarkably improved as compared with the related art. Furthermore, the joint flat part
Is connected to the bonding lead via insulating tape with double-sided adhesive.
Because it is integrally joined to the beauty large number of leads, a number
Maintain the initial position of the book lead . Further, when mounting the semiconductor chip, the support jig used in the prior art is not required, so that the mounting operation of the semiconductor chip is facilitated and the working efficiency is improved. A semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, further comprising a single-sided adhesive.
The insulating tape is separated from the joining position of the
It is integrally continuous contact with and covering the lead and a plurality of lead
Because the ends of many leads are restrained,
And ups and downs are improved, and wire bonding
The wire bond is not affected by lead bending
The position of the bonding area is stable, improving bondability
You.

[0009]

Next, the details of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a sectional view showing an outline of an embodiment of the semiconductor device of the present invention, FIG. 2 is a plan view showing an outline of a lead frame body used in the present invention, and FIG. 3 is a semiconductor chip used in the present invention. It is a perspective view which shows the outline | summary of the conductor cage provided with the mounting part. First, a configuration of a semiconductor device for a DRAM according to an embodiment of the present invention will be described.

As shown in FIG. 1, a semiconductor device 10 of this type includes a semiconductor chip 11 in which a plurality of signal, power and ground electrode terminals (patts) are arranged at predetermined positions in an internal surface region, and The lead 12 and the common leads 12a and 12b for power and ground, the insulating tape 13 for connecting the vicinity of the tip of the lead 12 and the common leads 12a and 12b collectively, and the conductor cage 14 on which the semiconductor chip 11 is mounted Lead frame body 16 integrally formed with joining lead portion 15 for joining
The conductor cage 14 having the semiconductor chip mounting portion 18 is used as a constituent member so that a part of the lead of the semiconductor chip 11 is disposed above the internal surface region of the semiconductor chip 11 in a spaced state. .

The semiconductor chip 11 is mounted on the conductor cage 14.
The conductor cage is connected to the joining lead portion 15 and the lead 12 integrally formed on the lead frame main body 16 with an insulating double-sided adhesive tape 17 provided with an adhesive on both sides interposed therebetween. And then thermocompression bonded.

One end of the bonding wire 19 is connected to an electrode terminal of the semiconductor chip 11, and the other end is connected to a number of leads 12 or common leads 12a and 12a.
The electrical conduction circuit is formed by being connected to the wire bonding region 20 of b.

One end of the semiconductor chip 11, the conductive cage 14, and the lead 12 on the wire bonding region 20 side is sealed with resin, and unnecessary portions of the lead exposed from the resin sealing portion 21 are removed. The semiconductor device 10 is formed by forming the leads into a predetermined shape. Next, components of the semiconductor device will be described with reference to FIGS.

According to FIG. 2, the lead frame main body 16 has electrodes formed by arranging metal strips on the inner surface area of the semiconductor chip 11 by a generally known shape processing method such as pressing and / or etching. A first lead group A arranged correspondingly at a position adjacent to the terminal,
A plurality of leads 12 having shared leads 12a and 12b connected to the second lead group B and both end leads of each of the lead groups and parallel to the leading end surface of the leads and spaced apart from each other; Positioning hole 2 for holding lead 12
2 are arranged at appropriate positions, and a required number of anchor holes 24 to which the conductor cage 14 is joined to the outer frame 23.
A continuous lead frame member having a predetermined shape constituted by the joining lead portion 15 provided with the lead is formed.

[0015] Then, the <br/> required portion of the continuous strip material of the lead frame, performs Pd, the plating coating such as Ag, the
It is formed so as to have a required shape in which an insulating tape 13 with a single-sided adhesive for connecting the leading end of each lead and the joining lead 15 collectively is pressed. Therefore, this allows the leading end of each lead 12 and the joining lead 15
: It is connected collectively, the eliminated position variations of and each lead vicissitudes of the leads 12, it is possible to improve the bondability, the anchor holes 24 because they provided the required number of joint leads 15, The anchor
The hole 24 is filled with an adhesive, and the joining of the conductor cage 14 is further strengthened and the joining is stabilized.

Next, as shown in FIG. 3, the conductor cage 14 to be joined to the lead frame body 16 is formed by pressing a predetermined metal strip material and / or etching by a generally known processing method. A semiconductor chip mounting portion 18 is provided at a central portion, and a plurality of suspension leads 2 supporting the mounting portion 18.
An outer edge 27 having a through-hole 26 forming the joint 5, and an adhesive material on both sides of the outer edge 27 that are joined to the joining lead 15 of the lead frame body 16 and the leads of the lead groups A and B. A flat joint 28 to which the insulating tape 18 is adhered is formed, and a tab 29 for holding them and an outer frame 31 of a side rail provided with a positioning hole 30 are formed, and the flat joint 28 is left. The mounting portion 18 is set down at the outer edge portion 27, and a strip formed by connecting the conductor cage 14 to the outer frame 31 of the side rail via the tab 29 is formed.

[0017] The conductive cage 14 constructed in a connected manner.
The semiconductor chip 11 is mounted on the semiconductor chip mounting portion 18 of the strip material, the unnecessary portion of the strip material is removed, and the bonding tape 15 of the lead frame main body 16 is coated with an insulating tape 17 coated with an adhesive on both sides. Joined with interposition. Therefore, since the semiconductor chip 11 is mounted on the down-set semiconductor chip mounting portion 18 of the conductor cage 14, a gap between the circuit surface of the semiconductor chip 11 and the lead frame body 16 can be easily formed, and the mounting work can be performed. Becomes easier. Since the conductor cage 14 is formed separately, the range of choice of the material and surface treatment of the conductor cage 14 is widened, and the entire surface of the back surface of the semiconductor chip 11 is supported. It is significantly improved and stable. Since the leads and the joining lead portions are collectively connected at the joining portion of the conductor cage, the connection between the leads becomes stronger as compared with the related art, and the leads exposed from the resin sealing portion have a predetermined shape. There is no movement of the lead during the forming, and there is no intrusion of an environmental contamination source from the outside along the lead.

Although the embodiments of the present invention have been described above, the feature of the present invention is that a large number of leads are arranged above a circuit surface area of a semiconductor chip in a separated state. The semiconductor chip mounting portion on which the chip is mounted is formed by joining a conductor cage formed separately. Therefore, the present invention is not limited to this embodiment, and it is needless to say that various modifications can be made without departing from the scope of the invention.

[0019]

According to the present invention, in a semiconductor device having a large number of leads spaced apart above a circuit surface area of a semiconductor chip, a conductor cage having a semiconductor chip mounting portion for mounting the semiconductor chip is separately provided. Because it is formed in
The displacement and the residual stress that remains in the semiconductor chip when mounting the semiconductor chip are eliminated, the diffusion efficiency of heat generated by the semiconductor chip is improved, and the long-term reliability of the semiconductor device is improved. Furthermore, when mounting the semiconductor chip used in the prior art, the jig for mounting the semiconductor chip used in the prior art is not required, so that the workability is improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating an outline of a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view showing an outline of a lead frame main body used for carrying out the present invention.

FIG. 3 is a perspective view showing an outline of a conductor cage used for carrying out the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Semiconductor device 11 Semiconductor chip 12 Lead 12a Power supply common lead 12b Grounding common lead 13 Insulating tape 14 Conductor cage 15 Bonding lead part 16 Lead frame main body 17 Double-sided adhesive tape 18 Semiconductor chip mounting part 19 Bonding wire 20 Wire bonding area DESCRIPTION OF SYMBOLS 21 Resin sealing part 22 Positioning hole 23 Outer frame 24 Anchor hole 25 Suspension lead 26 Through hole 27 Outer edge part 28 Joint flat part 29 Tab 30 Positioning hole 31 Outer frame

Claims (2)

(57) [Claims] A plurality of electrode terminals are provided in a surface area inside a circuit.
Semiconductor chip, and one end of which is an electrode of the semiconductor chip
Connect a number of leads connected to the terminal around the electrode terminal
A predetermined lead frame main body arranged adjacent to the
With the book leads separated above the semiconductor chip
Joined and supported on the back of the lead frame body so that it is arranged
Semiconductor chip support portion, the semiconductor chip,
A semiconductor chip support, and one end of the plurality of leads
And a resin sealing member for sealing the side.
The semiconductor chip supporting portion includes a mounting portion for mounting the semiconductor chip at the center thereof, and a frame-shaped joining flat portion surrounding the mounting portion is formed outside of an outer edge portion having a through hole forming a plurality of suspension leads. At the outer edge portion , leaving the joining flat portion .
A separate conductor cage formed by bending the suspension leads and down-setting the semiconductor chip mounting surface , and
The conductor cage is mounted with a semiconductor chip,
The joint flat portion and the large number of leads are collectively connected at the joint flat portion, and are configured to be joined and supported on the back side of the lead frame via an insulating tape provided with an adhesive layer on both surfaces. Characteristic semiconductor device. 2. The lead frame body is provided inside an outer frame.
A large number of leads, consisting of first and second lead groups formed in
A pair of joints projecting from the card and outer frame in the same plane as this
And a lead at the tip of each lead group.
Remove the ear bonding area and the tip area of the bonding lead.
Includes adhesive on one side only, including the back side
Insulating tape with a through hole through which the electrode pad is exposed
It is specially characterized that they are attached and connected integrally.
2. The semiconductor device according to claim 1, wherein: