JP2792082B2 - Disc recording signal demodulator - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk storage device such as a magnetic disk and an optical disk, and more particularly to a device for reading and demodulating a recording signal.

[Conventional technology]

FIG. 3 shows a general configuration of a conventional magnetic recording signal demodulator, and FIG. 4 shows a modulation method of MFM (modified FM).
An example of the operation of the same device when using is shown. Hereinafter, the function of the conventional demodulator will be described with reference to FIGS. 3 and 4. FIG.

A signal read from a magnetic disk (not shown) by the read head 1 is amplified by the read amplifier 2 and applied to the peak detection circuit 10 as a read signal shown in FIG. The peak detection circuit 10 outputs a pulse corresponding to the peak position of the readout waveform, that is, a peak detection pulse as shown in FIG. In the MFM method, since the timing pulse is also included in the peak detection pulse, only the data pulse in the peak detection pulse is extracted by the demodulation circuit 13 including the comparator 11 and the phase locked oscillator 12. That is, the peak detection pulse is supplied to the phase locked oscillator 12, and the MFM as shown in FIG.
An output synchronized with the phase of the peak appearing at the bit boundary of the data sequence “00” of the original data sequence to be modulated is obtained.
This output is supplied to the comparator 11. In the comparator 11, a data window having a half width of the bit interval is opened as shown in FIG. 4D, and "1" is separated / demodulated from the input data shown in FIG. Then, an output as shown in FIG. 4 (e) is obtained from the comparator 11.

In the above-described magnetic recording apparatus, as the linear recording density on the magnetic disk, that is, the magnetization reversal density increases, the interval between read pulses decreases, and in the read signal,
A pattern peak shift and a decrease in signal strength due to the waveform interference occur. For this reason, the peak position is shifted from the original position, and the margin of the position and width of the window pulse is reduced. In addition, since the signal strength decreases, the S / N (signal / noise) characteristics deteriorate.

In the demodulation device, the demodulation error rate due to the pattern peak shift is determined by the width of the data window. In other words, the peak shift margin in the conventional demodulator for obtaining a predetermined demodulation error rate has been a limitation in increasing the recording density of the magnetic disk.

Therefore, conventionally, this pattern peak shift is equalized by a waveform equalization using a transversal filter including a delay element, a multiplier, an adder, and the like, and a pre-compensation in which a write signal to the magnetic disk is corrected in advance A countermeasure, such as performing write compensation, has been taken.

However, when the waveform is transmitted by the transversal filter, there is a problem that the ease of adjustment, the temperature stability, and the stability over time are poor due to the characteristics of the analog filter. That is, in the transversal filter,
Although processing is performed digitally in the time axis direction, the processing in the amplitude direction remains analog, so there is a problem in stability and it is easily affected by noise. Furthermore, since a multiplier for obtaining a desired characteristic is also configured by an analog circuit,
Adjusting and maintaining the gain is problematic. Also, the pre-compensation has a problem that the S / N characteristics are further deteriorated, so that there is a limit in actual application, and a sufficient effect cannot be obtained.
That is, when used at a recording density at which a large pre-compensation must be applied, even if the peak returns to a desired position, the reproduction amplitude is greatly reduced due to the waveform interference, and the S / N characteristic is deteriorated.

That is, when the original waveform is a waveform as shown in FIG. 5 (a) and a peak shift due to interference occurs outward as shown by an arrow A in FIG. 5 (b), this peak shift is corrected. For this purpose, it is necessary to shift the writing position so that the peaks of the original waveform approach each other as shown by the arrow B in FIG. 9C, that is, to perform pre-compensation. By this pre-compensation, the peak shift of the output waveform is corrected as shown in FIG. 3D, but the reproduction amplitude is greatly reduced due to an increase in interference.

[Problems to be solved by the invention]

In contrast to these methods, a partial response method that actively uses waveform interference, as shown in Hirose Inose and Hiroshi Miyagawa, "Progress in PGM Communication," Sanbo Publishing, published in 1974, pp. 76-100. There is. As an effective decoding method for a signal recorded by this partial response method, a Viterbi algorithm, which is one of the maximum likelihood decoding methods, is used. A decoding gain of ~ 3dB is obtained. However,
Although this Viterbi decoding method has an application example in the field of information communication, it is difficult to apply to a magnetic disk, an optical disk, or the like that requires a simple structure due to the complicated hardware.

That is, in the Viterbi decoding method, for example, it is necessary to calculate the posterior probability of the “surviving pulse” in real time, and further perform multiplication or logarithmic addition for comparison, which makes the configuration very difficult.

As described above, in order to realize high-density recording on a recording medium such as a magnetic disk or an optical disk, a demodulator having a larger margin for a pattern peak shift than the above-described conventional demodulator is required. Also, FDD (floppy disk
In a storage device such as a drive, which is mainly used for consumer products, it is essential that the hardware scale is small and the configuration is simple.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a demodulation device having good characteristics in a disk recording device that performs high recording density with small-scale hardware.

[Means for solving the problem]

In order to achieve the above object, a disk recording signal demodulation apparatus according to the present invention includes a head for reading a recording signal recorded on a disk storage medium, and a digital conversion of an analog signal read from the head at a predetermined sampling period. An analog-to-digital converter, a shift register for sequentially shifting digitally converted signals in synchronization with the sampling period, storage means in which maximum likelihood demodulated data corresponding to a recording signal is recorded in advance, Conversion means for generating an address for the storage means from the data stored in the register, and outputting demodulated data of the storage means corresponding to the address obtained by the conversion means in synchronization with the sampling period. It is characterized by.

[Action]

The operation of the present invention will be specifically described with reference to FIG.

In the present invention, for example, the peak of a reproduced recording signal (see FIG. 1B) corresponding to the input data shown in FIG. A phase-synchronized sampling clock is generated by, for example, a phase-locked oscillator, and the recording signal is converted into a digital signal according to the sampling clock. Then, the digital signal is sequentially shifted in the shift register in synchronization with the sampling period as shown in FIG. 9C, thereby developing a two-dimensional sequence pattern. 1-bit demodulated data having the maximum posterior probability is output from the digital signal sequence by pattern matching. The demodulated data is stored in the RO
Stored in M (read only memory), the most probable original input bit sequence centered on one bit of demodulated data is the statistical data of superimposed noise for all possible recording signal waveforms. It is chosen from the characteristic nature. Therefore,
If the sampling and the analog-to-digital conversion are performed with sufficient accuracy, the demodulation according to the present invention will be the maximum likelihood demodulation.

That is, the demodulation device of the present invention converts the read recording signal into a digital signal, and outputs the maximum likelihood demodulation result by pattern matching using the digitized signal.

Next, a basic concept of a demodulation method using pattern matching, which is a feature of the present invention, will be described.

As shown in the example of FIG. 1, the width of the sample points required for one-bit demodulation is at most 1 before and after the number of quantization bits and the number of sample points are sufficiently large to obtain a predetermined demodulation accuracy. The width of a bit. This is because the range over which the change in the readout waveform depending on the presence or absence of a peak at the position of one bit to be demodulated is determined by, for example, a linear shape and a half-value width approximated by a Lorentzian shape. This does not contribute to demodulation accuracy.

Therefore, considering the contribution of the peaks before and after the sampling region to the sampling region, this region is at most a few bits even if the influence of the waveform interference is significant with respect to the quantization roughness. Therefore, a waveform serving as a template for pattern matching for demodulating a certain 1-bit is represented by a demodulated 1-bit.
A few bits before and after (k bits) are added to the bits (2k
+1) All possible bit patterns for bits, that is, a waveform created by ^{22 k + 1} bit patterns may be used. In the MFM modulation, a waveform in which the sign is inverted is generated, and therefore, ^{22k + 2} bit patterns are required for actual processing. Then, pattern matching between m × n-bit data created by virtually sampling these 2 2 ^{k + 2} waveforms and the data of the above-described shift register may be performed.

One bit is demodulated by this pattern matching. That is, the processing method in this embodiment is 1
In order to improve the accuracy of bit demodulation, waveform interference by several bits before and after is used.

In the present invention, there is no margin for the magnitude of the peak shift with respect to the average phase of the signal, as in the Viterbi demodulation method for a signal recorded by the partial response method. The problem here is the deterioration of the S / N due to the decrease of the signal strength due to the waveform interference described with reference to FIG.

The conventional demodulation based on peak detection within a window is a very excellent demodulation method such as a large noise margin at a low density, although it has a limitation of a window margin. When the density is increased, the noise margin is reduced according to the restriction of the window margin, and the bit error rate at the time of demodulation is increased.

In such a high-density region, the first problem is to show the conditions of sampling and A / D conversion so that the method of the present invention has a merit on the bit error rate over the conventional method. Is based on the premise that there is a method of demodulating the original bit data by pattern matching from the data that has been quantized and stored in the shift register. In other words, the pattern matching technique determines the necessary quantization conditions.

As described above, in the method of the present invention, pattern matching is performed based on the condition of the maximum posterior probability. For example,
In magnetic recording, a read waveform in the vicinity of one bit to be demodulated is a waveform in which disturbances such as thermal noise and recording medium noise are superimposed on an original waveform determined by a relationship with a preceding and following bit pattern. That is, the present method uses the statistical properties of such disturbances to select the maximum likelihood pattern as the original bit pattern of the original waveform to which the noise-superimposed waveform is applied, and outputs a 1-bit value to be demodulated. Things. Here, the disturbance is generalized and treated as Gaussian noise. For Gaussian noise,
It is sufficient to select a bit pattern having a sample value having the smallest difference from the sample value of the read waveform. That is,
The minimum distance of the sample value is the maximum likelihood condition.

When performing pattern matching on n sample points,
If noise is treated independently at each sample point, n sample value sequences can be treated as coordinates in an n-dimensional orthogonal space. In this case, the maximum likelihood condition is the minimum distance in this n-dimensional space.

〔Example〕

Hereinafter, the features of the present invention will be specifically described based on embodiments with reference to the drawings.

FIG. 2 is a block diagram showing a disk storage / demodulation device according to an embodiment of the present invention. In this embodiment, a magnetic disk storage / demodulation device will be described as an example.

Information recorded on a recording medium such as a magnetic disk based on the input data shown in FIG. 1 (a) is read by a read head 1 and amplified by a read amplifier 2 to a predetermined signal strength. The signals are sent to a digital converter (shown as an A / D converter) 3 and a phase locked oscillator 8. In the phase locked oscillator 8, a peak is once detected in an analog manner from a read waveform as shown in FIG. 1B, and a pulse is generated at the peak position. Further, the phase-locked oscillator 8 has a frequency that is an integral multiple of the frequency of the pulse generated at the peak position, and generates a sampling clock SC synchronized with the average phase of the pulse. Then, the sampling clock SC is supplied to the analog / digital converter 3 as a self-clock based on the read waveform, as in the conventional example. It is assumed that the phase-locked oscillator 8 has a built-in circuit corresponding to the peak detection circuit 10 in FIG.

The input waveform shown in FIG. 1 (b) is sampled in the analog / digital converter 3 in synchronization with the sampling clock SC, that is, at a frequency that is an integral multiple of the bit rate, and is quantized to m bits. The data is sent to the shift register 4.

Here, assuming that the response speed of the phase locked oscillator 8 is sufficiently slow within a range that can be followed, the sampling clock SC becomes
Regardless of the aforementioned peak shift and noise, it can be considered that the phase is synchronized with the average phase of the readout waveform shown in FIG. Therefore, pattern matching of a readout waveform for maximum likelihood demodulation can be performed based on a sample value of a relative position with respect to the clock position and the cycle.

Next, storage of read waveform data in the shift register 4 will be described.

The data quantized by m bits in accordance with the sampling clock SC described above is sequentially forwarded rightward in FIGS. 2 and 1 (c) in the n-stage shift register 4 for each sampling. Therefore, m × n bits of data are always stored on the shift register 4.

Note that the downward arrow in FIG. 1 (b) indicates the sampling timing and the sampled value. In the example of the figure, a fixed section in the time axis direction is divided into n, and the sample value at each point is m bits. Are stored in the corresponding bits of the shift register 4 as the data of

Then, the above-mentioned readout waveform (see FIG. 1B)
When the sample value at the point of the peak average phase reaches the center of the n-stage shift register 4, pattern matching is performed.

FIG. 1 (c) shows an example in which n = 7, that is, a case where a seven-stage shift register 4 is used.
5 shows the state of the shift register 4 at the timing of demodulating the second input data "1" from the left in the input data string "1100100" shown in FIG.

By the way, pattern matching based on the maximum likelihood condition is performed on n sample value sequences quantized to m bits. Ideally, everything that this m × n bit can take,
That is, the maximum likelihood demodulation result may be ^assigned to 2 ^mkh .
This is because in the circuit shown in FIG.
This is equivalent to extracting the demodulation result directly from the maximum likelihood decoding table 6 without using the data conversion as an address and performing the address conversion. In this case, it is naturally expected that the demodulation accuracy will be higher as m and n are larger. However, when hardware is actually configured, the available ROM capacity is required to be m × n ≦ 20 for consumer products, with a limit of 1 Mbit. If the value of m × n required to satisfy the requirement related to the bit error rate exceeds this, pattern matching and transparent demodulation using m × n (> 20) bits are performed using random logic. To the extent possible
It is necessary to reduce the addresses for accessing the ROM.

The address conversion is performed by the address conversion unit of the address conversion / control signal detection circuit 5 shown in FIG. The necessity of address conversion depends on the size of m × n. However, it is desirable that the capacity of the maximum likelihood decoding table 6 is small, so that it is considered a little. For example, among the values of m × n, if the probability of adopting the value is equal to or less than a predetermined bit error rate, it is not necessary to assign an address. And the like, and a method of minimizing the number of bits of the final address can be considered.

The address conversion unit of the address conversion / control signal detection circuit 5 detects the sync field recorded on the recording medium from the value of the shift register 4. Note that the sync field is for synchronizing demodulation, and is written with data that generates pulses at regular intervals during reproduction. When the sync field is detected, a sync field detection signal is sent to the control circuit 9, and the control circuit 9 refers to the output timing of the phase locked oscillator 8 and according to the sync field detection signal, the address conversion / control signal detection circuit 5 , The decoding timing of the maximum likelihood decoding table 6 and the gate serial / parallel converter 7 is determined.

Further, the address conversion / control signal detection circuit 5 generates an address of the maximum likelihood decoding table 6 from the value of the shift register 4 in synchronization with the decoding timing. The maximum likelihood decoding table 6 is composed of a ROM, and 1-bit demodulated data can give the above address in the original input bit sequence centered on 1-bit demodulated data as shown in FIG. Selected from the most probable and stored.
Gate serial / parallel converter 7 (gate
The gate section of the S / P converter) takes in the demodulated data according to the decoding timing, and the serial / parallel converter converts the demodulated data into a parallel signal having a predetermined number of bits and outputs the parallel signal.

〔The invention's effect〕

As described above, in the present invention, a two-dimensional series pattern is developed by converting the reproduction signal from the head from analog to digital and then sequentially shifting the shift register. Then, the maximum likelihood, that is, the most probable 1-bit demodulated data is output from the digital signal sequence using a storage unit such as a ROM in which the maximum likelihood demodulated data corresponding to the recording signal is recorded in advance.
Thus, maximum likelihood demodulation can be realized with a simple configuration.

[Brief description of the drawings]

FIG. 1 is a schematic view for explaining the operation of the disk storage / demodulation device of the present invention, FIG. 2 is a block diagram of the disk storage / demodulation device of the embodiment of the present invention, and FIG. 3 is a conventional magnetic recording signal demodulation device. FIG. 4 is a waveform diagram showing an operation example of the same device when MFM is used as a modulation method, and FIG. 5 is a waveform diagram for explaining peak shift correction. 1: read head, 2: read amplifier 3: A / D converter, 4: shift register 5: address conversion / control signal detection circuit 6: maximum likelihood decoding table 7: gate / S / P converter 8: phase synchronous oscillator , 9: Control circuit 10: Peak detection circuit, 11: Comparator 12: Phase locked oscillator, 13: Demodulation circuit

Claims (1)

(57) [Claims] 1. A head for reading a recording signal recorded on a disk storage medium, an analog / digital converter for converting an analog signal read from the head into a digital signal at a predetermined sampling period, and a digitally converted signal And a shift register for sequentially shifting the maximum likelihood demodulated data corresponding to a recording signal in advance, and an address for the storage unit from data accumulated in the shift register. A demodulation device for generating a disc recording signal, the demodulation device outputting demodulated data in the storage unit corresponding to an address obtained by the conversion unit in synchronization with the sampling period.