JP2788371B2 - Phase correction circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to all recording and reproducing apparatuses using a head drum, and more particularly to a phase correction circuit for all recording and reproducing apparatuses using a head drum.

[0002]

2. Description of the Related Art Generally, in all recording and reproducing apparatuses using a head drum, such as a rotary digital audio recorder and a video tape recorder, a recording signal formed on a track of a tape is cut into sections by a helical scanning method instead of a continuous signal form. Since the recording is performed in the recorded state, the trace start point of the head coincides with the trace start point of the track. Therefore, the following drum phase servo is required. That is, in order to make the head trace start point equal to the start point of the track on which the signal is recorded, a magnet is attached to the head drum as shown in FIG. 1 and the position is detected by a pulse generator. The pulse of the pulse generator PG, which should position the head at the trace start point at the moment when the magnet is detected by the pulse generator, serves as a reference for track formation during recording. In the standard format of a digital audio tape recorder, the trace start point is located at about 0.6 mm above the lower part of the tape. However, unless the predetermined reference is set, the track will not move even if the drum rotates at normal speed during recording. There is a case where the tape is not formed at the center and is shifted to the upper and lower tiers or cut out of the tape.

[0003]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a phase correction circuit for generating a tacho pulse to set a reference of a recording position of a head with respect to a tape and compensating for a phase difference between a head, a magnet and a pulse generation period. That is.

[0004]

In order to achieve the above-mentioned object, a phase correction circuit according to the present invention is provided in a data recording and sanitizing apparatus having a head switching control section and a drum motor pulse generating section. A first means for converting an analog pulse signal generated when the magnet is detected from the unit into a logic signal; and a tacho pulse in accordance with the state of the logic signal generated from the first means and a predetermined control signal to generate a tach pulse. A second means for controlling the generation of a head switching signal and a third means for controlling the second means in accordance with the state of the tach pulse fed back and adjusting the tach pulse width arbitrarily. .

[0005]

According to the present invention, the drum phase servo accuracy can be improved by setting the recording standard of the head with respect to the tape and correcting the phase difference between the head, the magnet and the pulse generator.

[0006]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a phase correction circuit according to the present invention. FIG. 1 shows the start and end points of the tracing of the head drum and the tape. FIG. 2 shows a phase correction circuit according to one embodiment of the present invention.

In FIG. 2, a phase correction circuit according to the present invention detects a position of a magnet attached to a head drum to generate an analog pulse signal DTP in a predetermined state, and converts the analog pulse signal DTP to a predetermined level. An amplifier 2 that amplifies the output of the first comparator 3, a first comparator 3 that compares the output of the amplifier supplied to the non-inverting terminal with a predetermined reference voltage to generate a logic signal DTPL, First inverter 4 for inputting the output and inverting the output
And the output of the first inverter 4 supplied to the input terminal S

[0008]

(Equation 1)

An S / R flip-flop 8 for generating a tach pulse TP according to the state of a predetermined signal applied to another input terminal R, a second inverter 7 for inputting the tach pulse TP and inverting and outputting the same, The switch SW connected to one end of a switch SW that is turned on / off according to the state of the inverted tach pulse TP output from the second inverter 7
And a pulse width adjusting unit 10 for correcting the width of the tacho pulse TP in accordance with the state of the pulse signal. And a second comparator 6 for outputting the result to another input terminal R of the S / R flip-flop 8 as compared with the second comparator 6.

FIGS. 3A to 3G are operation waveform diagrams of respective parts in FIG.
3A shows a pulse generator output DTP waveform, FIG. 3B shows a logic signal DTPL waveform output from the first comparator 3, and FIG. 3C shows an output of the first inverter 4.

[0011]

(Equation 2)

FIG. 3D shows a switch waveform, FIG. 3E shows an output waveform of the pulse width adjusting unit 10, FIG. 3F shows an output waveform of the second comparator 6, and FIG. G in FIG. 3 shows the waveform of the tacho pulse TP.

FIGS. 4A to 4D are timing charts showing the relationship between the tacho pulse and the head switching pulse in the normal mode.

FIG. 4A is a waveform diagram of the pulse generator 1 output DTP, FIG. 4B is a waveform diagram of the tacho pulse TP, FIG. 4C is a waveform diagram of the head switching pulse SWH, and FIG. D indicates the waveform of the recording signal.

FIGS. 5A to 5D are timing charts showing the relationship between the tacho pulse and the head switching pulse in the FF / REW (fast forward / rewind) search mode.

FIG. 5A shows the DTP waveform of the pulse generator 1 output, FIG. 5B shows the tach pulse TP waveform, and FIG. 5C shows the head switching pulse SWH waveform.
D in the figure indicates a reproduced signal waveform.

The present invention will be described in detail based on the above configuration.

A detection signal DT as shown in FIG.
P occurs. The detection signal DTP is applied to the non-inverting terminal of the first comparator 3 after being amplified through the amplifier 2 for a predetermined time. At this time, the first comparator 3 generates a logic signal DTPL as shown in FIG. 3B as a result of comparing the amplified signal applied to the non-inverting terminal with a predetermined reference voltage. The logic signal DT
The circuit 100 for generating the PL can be regarded as a configuration of a monostable multivibrator for controlling generation of a tach pulse. The logic signal DTPL is inverted through the first inverter 4 as shown in FIG. 3C and then applied to the input terminal S of the S / R flip-flop 8.

Therefore, at the time T1 when the rising edge of the logic signal DTPL is detected, the logic signal is input from the first inverter 4 through the input terminal S.

[0020]

(Equation 3)

The tach pulse TP generated from the S / R flip-flop 8 to which the inverted output DTPL is inputted is inverted through the second inverter 7 and the switch SW is turned off. As a result, the voltage applied to the inverting terminal of the second comparator 6 is gradually increased by the RC time constant as shown in FIG. 3E, and if the inverting terminal applied voltage exceeds a predetermined reference voltage Vref, the S / R The output of the second comparator 6 applied to the other input terminal R of the flip-flop 8 is inverted. Therefore, the tach pulse TP generated from the S / R flip-flop 8 is switched to the reset state, and the switch SW is switched to the on state. The switch SW is switched to the ON state, and serves to bypass the charged electrons in the capacitor C of the pulse width adjusting unit 10 if they are emitted. As a result, the voltage applied to the inverting terminal of the second comparator 6 drops sharply at the time T2 in FIG. 3D as shown in FIG. 3E and the output of the second comparator 6 is again inverted and Repeat the process.

The head switching control section 11 generates a head switching signal based on the above-mentioned tacho pulse TP. A process of generating a head switching pulse signal SWH of, for example, a rotary digital audio tape recorder will be described below.

First, in the case of the normal mode, the falling edge of the tacho signal TP and the head switching pulse signal SWH when the drum motor speed is 2000 rpm as shown in FIGS.
At the time when the falling edge of the signal coincides with the start time of the signal processing signal recording.

In the case of the FF / REW search mode, the drum rotation speed is 700 to 3300 rpm as shown in FIGS.
A head switching signal for variable rotation of m is output. At this time, the rising edge of the tacho signal coincides with the falling edge of the head switching signal SWH.

Here, the head switching signal SWH rises when the number of pulses (24 ± α) of the frequency generator FG (not shown) of the motor is counted and counted. At this time, the counted number of FC pulses differs depending on the type of motor.

On the other hand, in the process of synchronizing the phase of the output of the pulse generator of the drum with the servo reference frequency of 33.3 Hz obtained by dividing the master clock, the trace start point coincides with the point at which the signal is recorded and reproduced. This must be taken into account since there is a difference in the attachment position of the magnet (interval between the magnets of the head) for each case.

Also, when there is a limit in mechanically adjusting the phase with precision like the digital audio tape recorder described above, the width of the output of the pulse generator is electrically changed so that the head, the pulse generator and the magnet are changed. The phase correction between them can be freely performed.

[0028]

As described above, the reference of the recording position of the head with respect to the tape is set, and the phase difference between the head, the magnet and the pulse generator is corrected. Also, it has an excellent effect on recording and reproducing images.

[Brief description of the drawings]

FIG. 1 shows a relationship between a head drum and a trace start and end point of a tape.

FIG. 2 shows a phase correction circuit according to one embodiment of the present invention.

FIGS. 3A to 3G are timing charts for explaining the operation of the circuit shown in FIG. 2;

FIGS. 4A to 4D are timing charts showing a relationship between a tach pulse and a switching head pulse in a normal mode.

FIGS. 5A to 5D are timing charts showing a relationship between a tach pulse and a switching head pulse in an FF / REW search mode.

[Description of Signs] 1 pulse generator 2 amplifier 3 first comparator 4 first inverter 6 second comparator 7 second inverter 8 S / R flip-flop 10 pulse width adjustment unit 11 head switching control unit TP tacho pulse DTP detection signal

Claims (4)

(57) [Claims] 1. A data recording / reproducing apparatus comprising a head switching control section and a drum motor pulse generation section, wherein first means for converting an analog pulse signal generated upon detection of a magnet from the drum motor pulse generation section into a logic signal, Second means for generating a tacho pulse in accordance with the state of the logic signal and the predetermined control signal generated from the first means to control the generation of a head switching signal of the head switching control section; According to the second
3. A phase correction circuit comprising: third means for controlling a means to arbitrarily adjust a tacho pulse width. 2. An amplifier for amplifying the analog pulse signal at a predetermined level and outputting the amplified signal, and a logic signal generated by comparing an output of the amplifying unit supplied to a non-inverting terminal with a predetermined reference voltage. 2. The phase correction circuit according to claim 1, further comprising: a first comparator configured to input the output of the first comparator, and a first inverter configured to invert and output the first comparator output. 3. An SR in which the second means has one input terminal connected to the first means and the other input terminal connected to the third means.
2. The phase correction circuit according to claim 1, comprising a flip-flop. 4. A second inverter in which the third means inputs and inverts the tach pulse and outputs the inverted signal, a switch which is turned on / off in accordance with a state of the inverted tach pulse output from the second inverter, and a variable resistor. A connection point of a capacitor is connected to one end of the switch, a pulse width adjustment unit for correcting the tacho pulse width according to the on / off state of the switch, and a non-inverting input of the pulse width adjustment unit output input to an inversion terminal. 2. The phase correction circuit according to claim 1, further comprising a second comparator for comparing the result with a predetermined reference voltage input to a terminal and outputting the result to the second means.