JP2782758B2 - Semiconductor integrated circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit with a high breakdown voltage.

[Conventional technology]

As an example of a conventional semiconductor integrated circuit, a lateral thyristor is shown in FIG. FIG. 1A is a plan view, and FIG. 1B is a cross-sectional view along the line CC. In the figure, 1
Is a dielectric insulating isolation substrate, 2 is a polycrystalline semiconductor support region, 3
Is an insulating film, 4 is an N-type conductive single crystal semiconductor region, 5 is N ⁺
A buried diffusion region, 6 is a P-type diffusion region, 7 is a P-type diffusion region as a gate diffusion region 7, and 8 is an N-type diffusion region as a cathode diffusion region. Reference numeral 9 denotes an insulating film on which an anode electrode 10, a gate electrode 11, and a cathode electrode 12 connected to the respective diffusion regions are formed.

[Problems to be solved by the invention]

The above-mentioned conventional lateral thyristor has a gate electrode
In order to insulate the gate electrode 11 and the cathode electrode 12, a gap D shown in FIG. 3A exists between the two. The junction end at the main surface of the junction with the type single crystal semiconductor device region 4 is exposed. This gap D is usually several to several tens of microns.
m, the space D reduces the spread of the space charge region between the gate and cathode electrodes, and the breakdown voltage of the space charge region decreases. In addition, it becomes a channel path from the anode, which causes a problem that the breakdown voltage of the element, the yield, and the reliability are reduced.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor integrated circuit which solves such a problem of a decrease in breakdown voltage at a PN junction of the semiconductor integrated circuit and has improved breakdown voltage, yield, and reliability.

[Means for solving the problem]

The semiconductor integrated circuit of the present invention has a first impurity region of the opposite conductivity type therein so as to be surrounded by the semiconductor region of one conductivity type, and further includes a first impurity region of the one conductivity type inside the first impurity region. A second electrode electrically connected to the second impurity region, the second electrode covering the entire region of a PN junction formed along the periphery of the first impurity region. A first electrode formed on an insulating film formed on a surface of the semiconductor region and electrically connected to the first impurity region is formed on a second insulating film formed on the second electrode. The first impurity region is extended to extend outside the first impurity region.

Further, the semiconductor integrated circuit of the present invention has a first impurity region of a reverse conductivity type therein so as to be surrounded by a semiconductor region of one conductivity type, and further has a first impurity region of the one conductivity type inside the first impurity region. A first electrode having a second impurity region and electrically connected to the first impurity region covers an entire region of a PN junction formed along a periphery of the first impurity region. A second electrode formed on an insulating film formed on a surface of the semiconductor region and electrically connected to the second impurity region is formed on a second insulating film formed on the first electrode. And extends to the outside of the first impurity region.

[Action]

In the above-described configuration, the PN junction end of the first impurity region is prevented from being exposed by either the second electrode or the first electrode, and the withstand voltage at the PN junction end when a potential is applied to one of the electrodes is reduced. improves.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment in which the present invention is applied to a lateral thyristor. FIG. 1 (a) is a plan view, and FIG. 1 (b) is a cross-sectional view along the line AA. It is. In the figure, 1
Is a dielectric insulating isolation substrate, 2 is a polycrystalline semiconductor support region, 3
Is an insulating film, and 4 is an N-type conductive single crystal semiconductor region.
In this single crystal semiconductor device region 4, an N ⁺ buried diffusion region 5 is formed along the insulating film 3, and a P-type diffusion region 6 serving as an anode diffusion region and a gate diffusion region 7 serving as a gate diffusion region 7 are formed on the main surface. A P-type diffusion region and an N-type diffusion region 8 as a cathode diffusion region are respectively formed.

Then, a first insulating film 9 is formed on this main surface, and an anode electrode 10, a gate electrode 11, and a cathode electrode 12 connected to the respective diffusion regions through contact holes provided therein are formed. . Here, the cathode electrode 12 is formed in a planar shape so as to surround the gate electrode 11, and is formed so as to cover the entire exposed end of the PN junction of the gate diffusion region 7 via the insulating film 9.

The gate electrode 10 has an interlayer insulating film 13 formed thereon.
Are electrically connected to the gate wiring 14 through the through holes provided in the gate wiring 14.

According to this configuration, the gate electrode 11 and the cathode electrode 12
Will cover the entire exposed end of the PN junction of the gate diffusion region 7 via the insulating film 9, and reduce the withstand voltage when a negative potential is applied to the gate electrode 11 or the cathode electrode 12 with respect to the anode electrode 10. Several to several tens of volts can be improved by the field plate effect. In addition, since a gap between the gate electrode 11 and the cathode electrode 12 at the PN junction of the gate diffusion region 7 can be eliminated, a channel path from the anode can be cut off, thereby improving the withstand voltage yield and the reliability of the device. can do.

Second Embodiment FIG. 2 shows a second embodiment of the present invention. FIG. 2A is a plan view, and FIG. 2B is a cross-sectional view along the line BB. The same parts as those in FIG. 1 are denoted by the same reference numerals.

In this embodiment, the gate electrode 11 is formed in a planar shape surrounding the cathode electrode 12, and the entire exposed end of the PN junction of the gate diffusion region 7 is covered with the gate electrode 11 and the cathode electrode 12 via the insulating film 9. ing. The cathode electrode 12 is connected to the cathode wiring through a through hole provided in the interlayer insulating film 13.
Electrical connection to 15.

Also in this embodiment, by covering the entire exposed end of the PN junction of the gate diffusion region 7 with the gate electrode 11 and the cathode electrode 12, a negative potential is applied to the gate electrode 11 or the cathode electrode 12 with respect to the anode electrode 10. It is possible to improve the withstand voltage when it is performed. Further, the channel path from the anode can be cut off, and the device withstand voltage yield and reliability can be improved. Therefore, according to the first and second embodiments, the cathode of the lateral thyristor can be improved. A cathode electrode connected to the diffusion region is formed along the gate diffusion region, and the cathode electrode covers the PN junction end of the gate diffusion region, thereby preventing the PN junction end of the gate diffusion region from being exposed. Then, the withstand voltage when a negative potential is applied to the cathode electrode or the gate electrode with respect to the anode electrode is improved. Also,
A gap between the gate electrode and the cathode electrode is eliminated, a channel path from the anode is cut off, and the withstand voltage of the element is improved. Thereby, it is possible to improve the withstand voltage, the yield, and the reliability of the element.

A similar effect can be obtained by forming a gate electrode connected to the gate diffusion region along the gate diffusion region and covering the PN junction end of the gate diffusion region with the gate electrode.

〔The invention's effect〕

As described above, according to the present invention, the second electrode or the first electrode is formed so as to cover the entire area of the PN junction around the first impurity region, and the first electrode or the second electrode is 2
Is insulated and separated from the second electrode or the first electrode via the insulating film, so that the first and second electrodes are not short-circuited and the entire region of the PN junction around the first impurity region is formed by the first electrode. Alternatively, the PN junction can be covered with the second electrode, and the withstand voltage at the PN junction can be improved.

[Brief description of the drawings]

1 (a) is a plan view of a first embodiment of the present invention, FIG. 1 (b) is a sectional view taken along line AA of FIG. 1 (a), and FIG. FIG. 2 (b) is a cross-sectional view taken along the line BB of FIG. 2 (a), FIG. 3 (a) is a plan view of an example of a conventional structure, and FIG. CC in Fig. 3 (a)
It is sectional drawing which follows a line. 1 ... Dielectric separation substrate, 2 ... Polycrystalline semiconductor support region,
3 ... insulating film, 4 ... single crystal semiconductor region, 5 ... N ⁺ buried diffusion region, 6 ... anode diffusion region, 7 ... gate diffusion region, 8 ... cathode diffusion region, 9 ... insulating film ,Ten……
Anode electrode, 11 gate electrode, 12 cathode electrode, 13 interlayer insulating film, 14 gate wiring, 15 cathode wiring.

Claims (2)

(57) [Claims] A first impurity region having an opposite conductivity type therein so as to be surrounded by a semiconductor region having one conductivity type; and a second impurity region having a first conductivity type inside the first impurity region. A second electrode that has a region and is electrically connected to the second impurity region such that the second electrode covers the entire region of the PN junction formed along the periphery of the first impurity region. A first electrode formed on an insulating film formed on a surface and electrically connected to the first impurity region extends on a second insulating film formed on the second electrode A semiconductor integrated circuit extending to the outside of the first impurity region. 2. A semiconductor device according to claim 1, further comprising a first impurity region of a reverse conductivity type inside thereof surrounded by a semiconductor region of one conductivity type, and a second impurity of one conductivity type inside said first impurity region. A first electrode that has a region and is electrically connected to the first impurity region such that the first electrode covers the entire region of the PN junction formed along the periphery of the first impurity region. A second electrode formed on the insulating film formed on the surface and electrically connected to the second impurity region extends on the second insulating film formed on the first electrode A semiconductor integrated circuit extending to the outside of the first impurity region.