JP2776466B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JP2776466B2
JP2776466B2 JP63060551A JP6055188A JP2776466B2 JP 2776466 B2 JP2776466 B2 JP 2776466B2 JP 63060551 A JP63060551 A JP 63060551A JP 6055188 A JP6055188 A JP 6055188A JP 2776466 B2 JP2776466 B2 JP 2776466B2
Authority
JP
Japan
Prior art keywords
resin
cavity
pots
pot
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63060551A
Other languages
Japanese (ja)
Other versions
JPH01235340A (en
Inventor
重晴 角田
準一 佐伯
愛三 金田
勇 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63060551A priority Critical patent/JP2776466B2/en
Priority to US07/184,790 priority patent/US4946633A/en
Priority to KR1019880004718A priority patent/KR920001029B1/en
Priority to DE3814257A priority patent/DE3814257C2/en
Publication of JPH01235340A publication Critical patent/JPH01235340A/en
Application granted granted Critical
Publication of JP2776466B2 publication Critical patent/JP2776466B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/02Transfer moulding, i.e. transferring the required volume of moulding material by a plunger from a "shot" cavity into a mould cavity
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/17Component parts, details or accessories; Auxiliary operations
    • B29C45/26Moulds
    • B29C45/27Sprue channels ; Runner channels or runner nozzles
    • B29C45/2701Details not specific to hot or cold runner channels
    • B29C45/2708Gates
    • B29C2045/2712Serial gates for moulding articles in successively filled serial mould cavities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、レジンモールド半導体製造装置の製造方法
に係り、特に、生産効率と製品品質の高信頼化に好適な
モールド金型を用いて製造する半導体装置の製造方法に
関するものである。
Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a resin mold semiconductor manufacturing apparatus, and more particularly to a method for manufacturing a resin mold semiconductor using a mold suitable for high production efficiency and high reliability of product quality. The present invention relates to a method for manufacturing a semiconductor device.

〔従来の技術〕[Conventional technology]

従来のレジンモールド半導体装置は、特開昭61−2923
30号に記載のように金型内に補助ランナーを介して互い
に連通した複数個のポットを設け、各ポットに対向接続
した1対の主ランナーの先に製品キャビティをそれぞれ
1個具備する方式の金型を使用して製造していた。ま
た、実開昭56−154047号に記載する装置では、1つのポ
ットから一方向にランナーを伸ばし、ランナーと直角方
向に対をなした複数個のキャビティを配置する構造の金
型を使用して製造していた。
A conventional resin mold semiconductor device is disclosed in JP-A-61-2923.
As described in No. 30, a plurality of pots communicating with each other via an auxiliary runner are provided in a mold, and one product cavity is provided at a tip of a pair of main runners connected to each pot. It was manufactured using a mold. In the apparatus described in Japanese Utility Model Application Laid-Open No. 56-154047, a mold is used in which a runner is extended from one pot in one direction, and a plurality of cavities paired in a direction perpendicular to the runner is arranged. Had been manufactured.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

前述の複数個のポットを設けた従来技術では、ポット
間の連通通路(補助ランナー)により各ポットに投入さ
れるタブレット(樹脂のペレット)重量がばらついても
金型流路内の圧力を均一にできるという点では優れてい
るが、補助ランナーには隣接する両側のポットよりレジ
ンが移送されるため、レジン流動中にボイドを巻き込
み、初期のタブレット重量ばらつきが大きい場合には、
キャビティ内にボイドが流入する恐れがあり、ボイド除
去対策の点については十分な配慮がなされていなかっ
た。各ランナーに接続されるキャビティが1個程度の場
合は、比較的問題が少ないとしても、直列に多数個接続
される場合は特にこのボイド除去対策が必要不可欠の課
題である。
In the prior art in which a plurality of pots are provided, even if the weight of tablets (resin pellets) put into each pot varies due to the communication passage (auxiliary runner) between the pots, the pressure in the mold flow path is made uniform. Although it is excellent in that it can be done, resin is transferred from the adjacent pots to the auxiliary runner, so voids are involved during resin flow, and if the initial tablet weight variation is large,
There is a possibility that voids may flow into the cavity, and sufficient consideration has not been given to measures for removing voids. When the number of cavities connected to each runner is about one, even if there is relatively little problem, especially when many cavities are connected in series, this void removal measure is an indispensable subject.

一方、もう一つの従来技術は、1つのポットから一方
向に伸ばしたランナーに複数個のキャビティを並列に配
置する構造となっていた。そのため、レジンは1つのポ
ットから長いランナーを経て多数のキャビティ内に流入
するのでランナー内のレジン流量は非常に大きなものと
なり流動抵抗により圧力損失が増大するという問題があ
った。一方、レジン歩留りを向上させるためにランナー
断面積を小さくすると流動抵抗はさらに大きくなるた
め、レジンを移送時にキャビティ部へ充填しきれず、ボ
イドなどの内部欠陥を発生しやすくなる。したがって、
ランナー断面はかなり広い形状とせざるを得ずレジン歩
留りの向上には限界があった。
On the other hand, another prior art has a structure in which a plurality of cavities are arranged in parallel on a runner extending in one direction from one pot. Therefore, the resin flows from one pot through a long runner into a large number of cavities, so that the flow rate of the resin in the runner becomes very large, and there is a problem that pressure loss increases due to flow resistance. On the other hand, if the cross-sectional area of the runner is reduced in order to improve the resin yield, the flow resistance is further increased, so that the resin cannot be completely filled into the cavity at the time of transfer, and internal defects such as voids are easily generated. Therefore,
The runner cross section had to be considerably wide, and there was a limit in improving the resin yield.

本発明の目的は、上記従来技術の問題を解消し、生産
効率と製品品質の向上とが図れる改良された金型を使用
する半導体装置の製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device using an improved mold, which solves the above-mentioned problems of the prior art and improves production efficiency and product quality.

〔課題を解決するための手段〕 上記目的は、樹脂を供給する複数個のポットと、ポッ
ト間を相互に連通する連通路であってエアベント機構と
なる所定の間隙を形成した連通路と、各ポットに対応さ
せて配置した複数個のキャビティを直列に接続したキャ
ビティ列とを用い、キャビティ内にリードフレームの一
部と半導体素子とを設置し、ポットに樹脂に投入し、プ
ランジャで押圧し、連通路を介してポット間に樹脂を流
通させて連通路内もしくは樹脂内の気体をこの間隙から
排出すると共に、ポットからの樹脂を直列に接続されて
キャビティ列を構成する一方のキャビティから他方のキ
ャビティへ供給することを特徴とする半導体装置の製造
方法によって達成される。
[Means for Solving the Problems] The above-described object is to provide a plurality of pots for supplying resin, a communication path which is a communication path for mutually communicating between the pots and forms a predetermined gap serving as an air vent mechanism, Using a row of cavities in which a plurality of cavities arranged corresponding to the pot are connected in series, a part of the lead frame and a semiconductor element are installed in the cavities, put into a pot into a resin, and pressed with a plunger, The resin is circulated between the pots through the communication passage to discharge the gas in the communication passage or the resin from this gap, and the resin from the pot is connected in series to form the cavity row from one cavity to the other. The present invention is attained by a method of manufacturing a semiconductor device, characterized in that the semiconductor device is supplied to a cavity.

そして好ましくは前記樹脂は、前記キャビティを介し
て他のキャビティへ供給され、また前記樹脂は、前記キ
ャビティ間の流路に設けられたエアベント機構を介して
前記流路内もしくは樹脂内の気体を流路外に排出させ
て、前記キャビティから他のキャビティへ供給されるこ
とを特徴とする。
Preferably, the resin is supplied to another cavity through the cavity, and the resin flows gas in the flow path or the resin through an air vent mechanism provided in a flow path between the cavities. It is discharged outside the road and supplied from the cavity to another cavity.

そして、更に好ましくは、上記ゲートを介して直列に
複数個のキャビティが接続された末端のキャビティの先
にダミーキャビティ、つまり半導体チップを挿入しない
空のキャビティを設けることであり、これにより一層ボ
イドの発生を防止することができる。なお、上記エアベ
ントとは、連結通路及びゲートを構成する上型と下型と
の合せ目に、ボイド発生の原因となるレジン流路内の空
気を含むガスを流路外に排出もしくは逃がすための間隙
(もしくはスリット)を設けることであり、これにより
レジン流路内のガスを容易に流路外空隙に排出すること
ができる。
More preferably, a dummy cavity, that is, an empty cavity into which a semiconductor chip is not inserted, is provided at the end of the terminal cavity to which a plurality of cavities are connected in series via the gate. Generation can be prevented. The air vent is used to discharge or escape gas containing air in the resin flow path that causes voids at the joint between the upper die and the lower die that form the connection path and the gate. This is to provide a gap (or a slit), whereby the gas in the resin flow path can be easily discharged to the space outside the flow path.

〔作用〕[Action]

上記した手段によれば、ポット連結通路を設けたこと
によるレジン歩留りの低下は、レジンが一方のキャビテ
ィを介して他方のキャビティへ供給されるようにキャビ
ティ数を増加させることで打ち消され逆に大幅なレジン
歩留りの向上が図れる。また、各ポットに投入されたタ
ブレットの重量が大幅にばらついても連結通路を通して
移動し、各ポットでのレジン量ならびに圧力が均等化さ
れるのでポット間での圧力差は生じない。また、本発明
においては特に連結通路でレジン流動巻き込みにより生
ずるボイドやキャビティ流入中に生ずるボイドは各部に
設けられたエアベイントさらにダミーキャビティにより
レジンの流路外へ排出される。したがって、樹脂防止半
導体の生産効率と製品品質の大幅な向上を達成できる。
According to the above-described means, the reduction in resin yield due to the provision of the pot connection passage is counteracted by increasing the number of cavities so that the resin is supplied to one cavity through the other cavity, and conversely is greatly reduced. The resin yield can be improved. Further, even if the weight of the tablets put into the pots greatly varies, the tablets move through the connecting passages, and the resin amount and the pressure in the pots are equalized, so that there is no pressure difference between the pots. Further, in the present invention, in particular, voids generated by the resin flowing into the connecting passage and voids generated during the inflow of the cavity are discharged to the outside of the resin flow path by air vents and dummy cavities provided in each part. Therefore, the production efficiency and product quality of the resin-preventing semiconductor can be significantly improved.

〔実施例〕〔Example〕

以下、本発明の一実施例を図面を用いて説明する。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

実施例 1 第1図は、本発明の製造方法に使用する金型の装置構
成を示す。第1図はモールド金型の下型の平面図であ
る。1はモールド金型の下型、2はレジンを押圧供給す
るための複数個のポット、3はこれら各ポット2に設け
たランナーである。ランナー3の先端には第1ゲート4
が設けてあり、この第1ゲート4に第1キャビティ5が
配置されている。また、第1キャビティ5の下流側には
第2ゲート6がありこれに接続して第2キャビティ7が
あり、次に第3ゲート8を経て第3キャビティ9が接続
される。エアベント10は各ポット間の連結流路11および
第1ゲート4、第2ゲート6、第3ゲート8に接続し金
型外部まで設けている。これにより、レジン流動時に生
ずるボイドをキャビティ外に排出除去できる。第2図
は、リードフレーム12を上型13と下型1との間に挿設し
た状態における第1図のA−A断面を示している。リー
ドフレーム12には、チップ14とこれを接続するための金
線15があり封止すべき電気部品を構成している。
Example 1 FIG. 1 shows a device configuration of a mold used in the manufacturing method of the present invention. FIG. 1 is a plan view of a lower mold of a mold. Reference numeral 1 denotes a lower mold of a mold, 2 denotes a plurality of pots for pressing and supplying the resin, and 3 denotes a runner provided in each of the pots 2. The first gate 4 is provided at the tip of the runner 3.
Are provided, and the first cavity 5 is disposed in the first gate 4. On the downstream side of the first cavity 5, there is a second gate 6, which is connected to the second cavity 7, and then the third cavity 9 is connected via the third gate 8. The air vent 10 is connected to the connection flow path 11 between the pots, the first gate 4, the second gate 6, and the third gate 8, and is provided outside the mold. Thus, voids generated when the resin flows can be discharged and removed to the outside of the cavity. FIG. 2 shows a cross section taken along the line AA of FIG. 1 in a state where the lead frame 12 is inserted between the upper die 13 and the lower die 1. The lead frame 12 has a chip 14 and a gold wire 15 for connecting the chip 14 to constitute an electric component to be sealed.

実施例 2 第3図は、本発明の第2の実施例に係るモールド金型
の下型の平面図を示す。ここでは、第3キャビティ9の
下流にダミーキャビティ16を設けている。これにより、
レジン流動先端に多数含まれるボイドをキャビティ外へ
流出させることができる。
Embodiment 2 FIG. 3 is a plan view of a lower mold of a mold according to a second embodiment of the present invention. Here, a dummy cavity 16 is provided downstream of the third cavity 9. This allows
A large number of voids contained in the resin flow tip can flow out of the cavity.

第4図は第1図及び第3図の実施例を用いて成形した
時のボイド発生の状況を従来の金型と対比して示した特
性曲線図である。この図から、従来の金型に比較して、
本発明の第1図に示したエアベントを設けた構造のもの
は(実施例1)、ボイド低減効果が大きく、さらに、ダ
ミーキャビティを付加した第3図の構造のものは(実施
例2)、より一層のボイド低減効果があることが明らか
となった。これにより高品質の製品を得ることができ
る。
FIG. 4 is a characteristic curve diagram showing the state of void generation when molded using the embodiment of FIGS. 1 and 3 in comparison with a conventional mold. From this figure, compared to the conventional mold,
The structure of the present invention having the air vent shown in FIG. 1 (Example 1) has a large void reduction effect, and the structure of FIG. 3 having a dummy cavity added thereto (Example 2). It became clear that there was a further effect of reducing voids. Thereby, a high quality product can be obtained.

〔発明の効果〕〔The invention's effect〕

本発明によれば、レジン流動時に生ずるボイドを効率
よく金型流路外へ排出することができ成形不良の少ない
高品質の製品を得ることができる。
ADVANTAGE OF THE INVENTION According to this invention, the void which generate | occur | produces at the time of resin flow can be efficiently discharged | emitted out of a metal mold | die channel, and a high quality product with few molding defects can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の第1の実施例の下型平面図、第2図は
下型を閉じた状態での第1図A−A線断面図、第3図は
第2の実施例の下型平面図、第4図はボイドの発生状況
を示した特性曲線図である。 図において、 1……下型、2……ポット 3……ランナー、4……第1ゲート 5……第1キャビティ、6……第2ゲート 7……第2キャビティ、8……第3ゲート 9……第3キャビティ、10……エアベント 11……ポット連結流路、12……リードフレーム 13……上型、16……ダミーキャビティ
FIG. 1 is a plan view of a lower mold of the first embodiment of the present invention, FIG. 2 is a sectional view taken along the line AA of FIG. 1 in a state where the lower mold is closed, and FIG. FIG. 4 is a characteristic curve diagram showing the state of occurrence of voids. In the figure, 1 ... lower mold, 2 ... pot 3 ... runner, 4 ... first gate 5 ... first cavity, 6 ... second gate 7 ... second cavity, 8 ... third gate 9: Third cavity, 10: Air vent 11: Pot connection channel, 12: Lead frame 13: Upper mold, 16: Dummy cavity

───────────────────────────────────────────────────── フロントページの続き (72)発明者 金田 愛三 神奈川県横浜市戸塚区吉田町292番地 株式会社日立製作所生産技術研究所内 (72)発明者 吉田 勇 神奈川県横浜市戸塚区吉田町292番地 株式会社日立製作所生産技術研究所内 (56)参考文献 特開 昭61−292330(JP,A) 特開 昭56−94635(JP,A) 特開 昭60−76129(JP,A) 実開 昭62−157143(JP,U) 実開 昭51−2167(JP,U) (58)調査した分野(Int.Cl.6,DB名) H01L 21/00──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Aizo Kaneda 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi, Ltd. Production Technology Laboratory Co., Ltd. (72) Isamu Yoshida 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi, Ltd. Production Engineering Laboratory (56) References JP-A-61-292330 (JP, A) JP-A-56-94635 (JP, A) JP-A-60-76129 (JP, A) -157143 (JP, U) Actually open 51-2167 (JP, U) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 21/00

Claims (4)

(57)【特許請求の範囲】半導体装置の製造方法(57) [Claims] Method of manufacturing semiconductor device 【請求項1】樹脂を供給する複数個のポットと、ポット
間を相互に連通する連通路であってエアベント機構とな
る所定の間隙を形成した連通路と、各ポットに対応させ
て配置した複数個のキャビティを直列に接続したキャビ
ティ列とを用い、キャビティ内にリードフレームの一部
と半導体素子とを設置し、ポットに樹脂に投入し、プラ
ンジャで押圧し、連通路を介してポット間に樹脂を流通
させて連通路内もしくは樹脂内の気体をこの間隙から排
出すると共に、ポットからの樹脂を直列に接続されてキ
ャビティ列を構成する一方のキャビティから他方のキャ
ビティへ供給することを特徴とする半導体装置の製造方
法。
1. A plurality of pots for supplying a resin, a communication path for communicating between the pots, the communication path forming a predetermined gap serving as an air vent mechanism, and a plurality of pots arranged corresponding to each pot. Using a row of cavities connected in series, a part of the lead frame and the semiconductor element are placed in the cavities, poured into resin in a pot, pressed with a plunger, and placed between the pots through a communication passage. The resin is circulated and the gas in the communication passage or the resin is exhausted from this gap, and the resin from the pot is supplied in series from one cavity forming a row of cavities connected in series to the other cavity. Semiconductor device manufacturing method.
【請求項2】樹脂は、直列に接続されてキャビティ列を
構成する一方のキャビティから他方のキャビティへの流
路に形成したエアベント機構となる所定の間隙を介して
流路内もしくは樹脂内の気体を排出しながら供給される
ことを特徴とする請求項1記載の半導体装置の製造方
法。
2. A resin in a flow path or a resin through a predetermined gap serving as an air vent mechanism formed in a flow path from one cavity forming a row of cavities to the other cavity forming a row of cavities connected in series. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is supplied while discharging.
【請求項3】エアベット機構となる間隙をスリットで構
成してなる請求項1もしくは2記載の半導体装置の製造
方法。
3. The method of manufacturing a semiconductor device according to claim 1, wherein a gap serving as an air bet mechanism is constituted by a slit.
【請求項4】樹脂を供給する複数個のポットと、ポット
間を相互に連通する連通路であってエアベント機構とな
る所定の間隙を形成した連通路と、各ポットに対応させ
て配置した複数個のキャビティを直列に接続したキャビ
ティ列を連通路に接続したものとを用い、キャビティ内
にリードフレームの一部と半導体素子とを設置し、ポッ
トに樹脂を投入し、プランジャで押圧し、連通路を介し
てポット間に樹脂を流通させて連通路内もしくは樹脂内
の気体をこの間隙から排出し、ポットからの樹脂をこの
連通路を介して直列に接続されてキャビティ列を構成す
る一方のキャビティから他方のキャビティへ供給するこ
とを特徴とする半導体装置の製造方法。
4. A plurality of pots for supplying resin, a plurality of communication passages communicating between the pots, the communication passages forming a predetermined gap serving as an air vent mechanism, and a plurality of pots arranged corresponding to each pot. Using a series of cavities connected in series with a series of cavities connected to a communication path, a part of a lead frame and a semiconductor element are installed in the cavities, resin is poured into a pot, and the pot is pressed with a plunger. The resin is circulated between the pots through the passage to discharge the gas in the communication passage or the resin from the gap, and the resin from the pot is connected in series through the communication passage to form one of the cavity rows. A method for manufacturing a semiconductor device, comprising supplying from a cavity to another cavity.
JP63060551A 1987-04-27 1988-03-16 Method for manufacturing semiconductor device Expired - Lifetime JP2776466B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP63060551A JP2776466B2 (en) 1988-03-16 1988-03-16 Method for manufacturing semiconductor device
US07/184,790 US4946633A (en) 1987-04-27 1988-04-22 Method of producing semiconductor devices
KR1019880004718A KR920001029B1 (en) 1987-04-27 1988-04-25 Method and apparatus in manufacturing of semiconductor elements
DE3814257A DE3814257C2 (en) 1987-04-27 1988-04-27 Casting mold for the production of semiconductor elements encapsulated in synthetic resin

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63060551A JP2776466B2 (en) 1988-03-16 1988-03-16 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH01235340A JPH01235340A (en) 1989-09-20
JP2776466B2 true JP2776466B2 (en) 1998-07-16

Family

ID=13145537

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63060551A Expired - Lifetime JP2776466B2 (en) 1987-04-27 1988-03-16 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2776466B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0423590U (en) * 1990-06-21 1992-02-26

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS512167U (en) * 1974-06-21 1976-01-09
JPS5694635A (en) * 1979-12-27 1981-07-31 Toshiba Corp Metal-mold device for sealing by resin
JPS6076129A (en) * 1983-10-03 1985-04-30 Nec Corp Resin-sealing device for semiconductor integrated circuit
JPS61292330A (en) * 1985-06-20 1986-12-23 Toshiba Corp Semiconductor resin sealing device
JPH0340579Y2 (en) * 1986-03-26 1991-08-27

Also Published As

Publication number Publication date
JPH01235340A (en) 1989-09-20

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