JP2773821B2 - Contour compensation circuit - Google Patents

Description

The present invention relates to a contour compensation circuit for adding a contour signal formed from an input video signal to the input video signal and outputting the result.
For example, it is applied to video equipment such as a video tape recorder (VTR). SUMMARY OF THE INVENTION The present invention is directed to a contour compensating circuit for adding a contour signal formed from an input video signal to the input video signal and outputting the added signal, wherein the level of the signal level of the contour signal increases as the absolute value increases. By performing nonlinear processing for reducing the input / output gain on the contour signal by a nonlinear processing circuit, natural contour compensation can be performed even on an image having a low contrast or an image having a high contrast. . [Prior Art] Generally, in video equipment such as a VTR, a contour signal for enhancing a contour of an image is formed from an input video signal using a transversal filter, a band-pass filter, or the like, and is added to the input video signal. , To increase the resolution of the image. Conventionally, various kinds of signal processing such as contour compensation processing for a video signal are performed by an analog signal processing system as an analog video signal, or a digital signal processing system is performed by digitizing a video signal. [Problems to be Solved by the Invention] In the conventional contour compensation circuit, a contour signal that is linearly proportional to the signal level of the input video signal is formed by a transversal filter, a bandpass filter, or the like, and a linear operation is performed. Since the contour compensation was performed by the analog signal processing system or digital signal processing system, the compensation amount was small in the low contrast part, and it was possible to sufficiently obtain the compensation effects such as enhancement of the sharpness of the image and improvement of the apparent contrast. In addition, there is a problem that the compensation amount is too large in a portion having a high contrast, resulting in an unnatural image. In particular, when the video signal is digitized and contour compensation processing is performed by a digital signal processing system, the influence of the insufficient compensation for the low contrast portion and the overcompensation for the high contrast portion tend to be remarkable. Therefore, the present invention has been made in view of the above-described conventional problems,
In a contour compensation circuit that adds a contour signal formed from an input video signal to the input video signal and outputs the resultant signal, the contour signal is subjected to non-linear processing and is added to the input video signal. An object of the present invention is to provide a contour compensating circuit having a novel configuration capable of performing natural contour compensation even for a high image. [Means for Solving the Problems] In order to solve the conventional problems as described above, the present invention provides a digital contour signal represented by 2's complement and having positive and negative values from an input video signal. A contour signal forming circuit to be formed; an absolute value converting circuit for converting the digital contour signal represented by the two's complement into a digital contour signal represented by code data and absolute value data; A plurality of level comparison circuits each provided with a different reference level to which value data is supplied, and selecting different coefficient data for each predetermined level range of the absolute value data based on outputs of the plurality of level comparison circuits. A coefficient selection circuit for outputting, and a non-linear operation circuit for performing a non-linear operation on the absolute value data based on the coefficient data selected by the coefficient selection circuit. It is characterized in that contour compensation is performed on an input video signal based on the output of the non-linear operation circuit. [Operation] The contour compensation circuit according to the present invention converts a digital contour signal represented by two's complement into a digital contour signal represented by code data and absolute value data, and then adjusts the level of the contour signal by nonlinear calculation. I do. Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the embodiment shown in the block diagram of FIG. 1, an input video signal (Sin) is supplied from a signal input terminal 1 to an analog-to-digital (A / D) conversion circuit 2, and the A / D conversion circuit 2 The digital data is supplied to the contour signal forming circuit 3 and the signal adding circuit 4 as video data (Din). The contour signal forming circuit 3 is configured to output the video data (Din)
From the input video signal (Sin), the video data of the contour portion of the image is extracted as a contour signal, and the signal level of the contour signal is represented by 2's complement contour data (Da
p) is supplied to an absolute value conversion circuit 11 constituting the nonlinear processing circuit 10. As shown in FIG. 2, the absolute value conversion circuit 11 includes (n + 1) exclusive OR circuits EXOR ₍₀₎ and EXOR equal to the number of bits of the contour data (Dap). ₍₁₎
~ EXOR _(n-1) , EXOR _(n) and one adder ADD. EXOR ₍₀₎ , EXOR _{(1) to} EXOR
_(n-1) and EXOR _(n) are the bits (B ₍₀₎ , B _{(1) to} B _(n-1) , B _(n) ) and the sign bit (Sign Bit) of the contour data (Dap). )
Is supplied to the above-mentioned addition circuit ADD. The addition circuit ADD is provided with the exclusive OR circuit EXOR ₍₀₎ , E
Logic "1" indicated by the sign bit (Sign Bit) in the least significant bit (LSB) of the value indicated by exclusive OR output by XOR _{(1) to} EXOR _(n-1) and EXOR _(n) Alternatively, by adding a logical “0”, the signal level of the contour signal is changed to a sign bit (Sign Bit) and absolute value data (ABS ₍₀ ),
_{ABS (1) ~ABS (n-} 1), the ABS _(n)) contour data signed absolute value representation showing at (Dabs), to convert the two's complement representation of the contour data (Dap). The absolute value display contour data (Dabs) obtained by the absolute value conversion circuit 11 is represented by the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n-1) , ABS _{(n -1)} . ₎ ) Is three comparison circuits
12, 13 and 14 and the multiplication circuit 18, and the sign bit (Sign Bit) is supplied to the addition circuit 4. The comparison circuits 12, 13, and 14 are provided with comparison data “x ₀ ”, “x ₁ ”, and “X ₂ ” having different values, respectively. The comparison data “x ₀ ”, “x ₁ ”, and “x ₁ ” the absolute value data and x _{2 "(ABS (0), ABS (} 1) ~ABS (n-1), ABS (n)) compared to the value" x "represented by. Here, the comparison data “x ₀ ”,
“X ₁ ” and “x ₂ ” are set so that 0 <x ₀ <x ₁ <x ₂ . The comparison outputs obtained by the comparison circuits 12, 13, and 14 are supplied to the encoder 15. Above encoder 15
Is a value "x" indicated by the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n-1) , ABS _(n) ) from the comparison output by the comparison circuits 12, 13, and 14. but, (1) 0 <x < x o (2) x o <x <x 1 (3) x 1 <x <x 2 (4) x 2 <2 bits of control indicating whether the range of x throat The data is formed and supplied to two coefficient selection circuits 16 and 17. The coefficient selection circuit 16 has four types of coefficients “a ₀ ”, “a ₁ ”, “a ₂ ”, and “0” as primary (gain) coefficients of the input / output function f (x) of the nonlinear processing circuit 10. Is given.
The coefficient selection circuit 16 uses the 2-bit control data supplied from the encoder 15 to control the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n-1) , ABS _(n) ). In accordance with the range (1) to (4) of the value “x” indicated by, the above four types of coefficients “a ₀ ”, “a ₁ ”, “a ₂ ”, and “0” are represented by (1) 0 < x <x _o : a ₀ (2) x _o <x <x ₁ : a ₁ (3) x ₁ <x <x ₂ : a ₂ (4) x ₂ <x: 0 Supply to circuit 18. The multiplication circuit 18 calculates the value “x” indicated by the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n−1) , ABS _(n) ) supplied from the absolute value conversion circuit 11. Is multiplied by the coefficient “a ₀ ”, “a ₁ ”, “a ₂ ”, or “0” selectively supplied from the coefficient selection circuit 16, and the multiplication calculation force is supplied to the addition circuit 19. The coefficient selection circuit 17 includes the nonlinear processing circuit.
Four types of coefficients “−a ₀ c”, “b ₁ ”, “b ₂ ”, and “b ₃ ” are provided as zero-order (offset) coefficients of the ten input / output functions f (x). The coefficient selection circuit 17 uses the 2-bit control data supplied from the encoder 15 to control the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n-1) , ABS _(n-1) .
_(n) ) The four types of coefficients “−a ₀ c”, “b ₁ ”, “b ₂ ”,
"B _3" and (1) 0 <x <x o: -a 0 c (2) x o <x <x 1: b 1 (3) x 1 <x <x 2: b 2 (4) x 2 <x: supplying selected and to the adder circuit 19 as b _3. The adder circuit 19 adds the above four kinds of coefficients “−a ₀ c”, “b ₁ ”, “b ₂ ” or “b ₃ ” supplied from the coefficient selection circuit 17 to the multiplication calculation force by the multiplication circuit 18. The sum is supplied to the underflow detection circuit 20 and to the addition circuit 4 via the switch circuit 21. The underflow detection circuit 20 controls the switching of the switch circuit 21 by detecting that the addition result by the addition circuit 19 becomes negative. The switch circuit 21 is given a constant “0” and receives the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(1)
(n-1) , ABS _(n) ), when the value "x" in the range of 0 <x <c is selected, the constant "0" is selected. When the value is in the other range, the addition circuit is selected. Select the addition output by 19. For the contour data (Dap) formed by the contour signal forming circuit 3, the non-linear processing circuit 10 generates absolute value data (ABS ₍ ABS) of the contour data (Dabs) of the absolute value display obtained by the absolute value converting circuit 11. ₀₎ , ABS _{(1) to} ABS _{( n-1)} , ABS _(n) ), f (x) = 0c in the range of 0 <x <c according to the range of the value "x". _{<x <x o f (x} ) = a 0 (x-c) in the range of x _o <x <x ₁ in the range _{f (x) = a 1 x} + b 1 x 1 <x <f in the range of x ₂ In the range of (x) = a ₂ x + b ₂ x ₂ <x, the non-linear characteristic f (x) that satisfies f (x) = b ₃ is given by the multiplier circuit 18, the adder circuit and the switch circuit 21, and the sign bit ( Sign
By adding (Bit), non-linear processing is performed as shown in FIG. That is, in the nonlinear processing circuit 10, the value "x" of the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n-1) , ABS _(n) ) of the contour data (Dabs) increases. , Nonlinear processing is performed to reduce the input / output gain stepwise. The adding circuit 4 to which the contour data (Dabs') subjected to the nonlinear processing by the nonlinear processing circuit 10 is supplied.
Adds the contour data (Dabs') to the input video data (Din) supplied from the A / D conversion circuit 2 to form contour-compensated video data (Dout). The video data (Dout) obtained by the addition circuit 4 is digital
The signal is converted into an analog signal by an analog (D / A) conversion circuit 5 and output from a signal output terminal 6 as a video signal (Sout) subjected to contour compensation processing. Here, if the contour signal is also represented by 2's complement, the absolute value is the same and the values other than the sign bit are different for different levels of positive and negative, so that the level comparison circuit and the like are required twice. However, in the contour compensation circuit of this embodiment, the contour signal represented by two's complement is temporarily converted into code data and absolute value data, and the non-linear operation is performed by the non-linear operation circuit. The circuit size of the encoder has been reduced. Also, regarding the contour signal formed from the input video signal,
The nonlinear processing is performed by the nonlinear processing circuit 10 so that the input / output gain is reduced stepwise as the value “x” obtained by converting the signal level into an absolute value increases, so that a low-contrast portion is obtained. , The sharpness and the apparent contrast can be improved by increasing the amount of contour compensation.
Natural contour compensation can be performed by reducing the contour compensation amount. Moreover, in this embodiment, the absolute value data (ABS ₍₀₎ , ABS _{(1) to} ABS _(n-1) , ABS _(n) ) of the contour data (Dabs) is very small in the range of 0 <x <c. The contour signal is regarded as noise, and by clipping the contour signal to zero level with f (x) = 0, image quality degradation due to noise can be suppressed. [Effect of the Invention] In the contour compensation circuit according to the present invention, a contour signal represented by a two's complement is temporarily converted into code data and absolute value data, and a non-linear operation for adjusting the level of the contour signal is performed by the non-linear operation circuit. By doing so, the circuit scale of the level comparison circuit and the encoder can be reduced, and the circuit configuration can be simplified, and the contour signal that has been subjected to nonlinear processing by the nonlinear processing circuit is added to the input video signal. Therefore, natural contour compensation can be performed on an image having a low contrast or an image having a high contrast.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing a specific configuration of an absolute value conversion circuit constituting the above embodiment. FIG. 3 is an input / output characteristic diagram for explaining the operation of the above embodiment. 1 ... Signal input terminal 2 ... A / D conversion circuit 3 ... Contour signal formation circuit 4 ... Signal addition circuit 5 ... D / A conversion circuit 6 ... Signal output terminal 10 ... Non-linear processing circuit 11 ... Absolute value conversion circuit 12, 13, 14 Comparison circuit 15 Encoder 16, 17 Coefficient selection circuit 18 Multiplication circuit 19 Addition circuit

Claims (1)

(57) [Claims] A contour signal forming circuit for forming a digital contour signal having positive and negative values represented by two's complement from the input video signal, and converting the digital contour signal represented by two's complement into code data and absolute value data An absolute value conversion circuit for converting the signal into a digital contour signal represented by: a plurality of level comparison circuits provided with different reference levels to which absolute value data is supplied from the absolute value circuit; and the plurality of level comparison circuits A coefficient selection circuit that selects and outputs different coefficient data for each predetermined level range of the absolute value data based on the output of the absolute value data. A non-linear operation circuit for performing non-linear operation by performing contour compensation on an input video signal based on the code data and an output of the non-linear operation circuit. That outline compensation circuit.