JP2773722B2 - Multilayer printed wiring board and method of manufacturing the same - Google Patents

Multilayer printed wiring board and method of manufacturing the same

Info

Publication number
JP2773722B2
JP2773722B2 JP34376195A JP34376195A JP2773722B2 JP 2773722 B2 JP2773722 B2 JP 2773722B2 JP 34376195 A JP34376195 A JP 34376195A JP 34376195 A JP34376195 A JP 34376195A JP 2773722 B2 JP2773722 B2 JP 2773722B2
Authority
JP
Japan
Prior art keywords
hole
wiring board
printed wiring
resin layer
insulating resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP34376195A
Other languages
Japanese (ja)
Other versions
JPH09186456A (en
Inventor
聡 磯田
寿郎 岡村
博義 横山
康弘 岩崎
健志郎 福里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi AIC Inc
Original Assignee
Hitachi AIC Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Hitachi AIC Inc filed Critical Hitachi AIC Inc
Priority to JP34376195A priority Critical patent/JP2773722B2/en
Priority to US08/768,426 priority patent/US5826330A/en
Publication of JPH09186456A publication Critical patent/JPH09186456A/en
Application granted granted Critical
Publication of JP2773722B2 publication Critical patent/JP2773722B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、アディティブ法に
よって製造する多層印刷配線板およびその製造方法に関
し、特に層間を接続する非貫通接続穴(I.V.H)の
構造およびその製造方法に関する。
The present invention relates to a multilayer printed wiring board manufactured by an additive method and a method of manufacturing the same, and more particularly, to a structure of a non-through connection hole (IVH) connecting between layers and a method of manufacturing the same.

【0002】[0002]

【従来の技術】図4は従来の多層印刷配線板の製造方法
を示す断面図で、同図に基づいて多層印刷配線板の製造
方法を説明する。まず、同図(a)に示すように、上下
2枚の銅張積層板21,22の一方の銅張積層板21に
ドリルによって穴23を穿孔し、電気めっきにより導体
部24と非貫通接続穴を構成する接続導体部25を形成
して両面板26,26とする。次に、同図(b)に示す
ように、これら両面板26,26の対向する側の一方の
導体部24にエッチングにより内層回路27,27を形
成する。そして、同図(c)に示すように、両面板2
6,26の内層回路27,27間にプリプレグとしての
ガラスクロス樹脂含浸布28を挟み、加熱加圧プレスで
熱圧着する。しかる後、ドリルで貫通穴29を穿孔し、
電気めっきにより導体部30とスルーホールを構成する
接続導体部31を形成する。さらに、同図(d)に示す
ように、エッチングで外層回路32を形成することによ
って、層間を接続する非貫通接続穴を備えた多層印刷配
線板が形成される。
2. Description of the Related Art FIG. 4 is a sectional view showing a conventional method for manufacturing a multilayer printed wiring board. The method for manufacturing a multilayer printed wiring board will be described with reference to FIG. First, as shown in FIG. 3A, a hole 23 is drilled in one of the upper and lower two copper-clad laminates 21 and 22 by a drill, and non-penetrating connection with the conductor 24 is performed by electroplating. The connection conductor portion 25 that forms the hole is formed as the double-sided plates 26, 26. Next, as shown in FIG. 3B, inner layer circuits 27, 27 are formed on one conductor portion 24 on the opposite side of the double-sided plates 26, 26 by etching. Then, as shown in FIG.
A glass cloth resin impregnated cloth 28 as a prepreg is sandwiched between the inner layer circuits 27, 27 of the first and second circuits 26, 26, and thermocompression-bonded by a heating and pressing press. Then, drill a through hole 29 with a drill,
A connection conductor portion 31 forming a through hole with the conductor portion 30 is formed by electroplating. Further, as shown in FIG. 3D, by forming the outer layer circuit 32 by etching, a multilayer printed wiring board having non-through connection holes for connecting the layers is formed.

【0003】図5は従来の別の多層印刷配線板の断面図
で、この例では、両面に内層回路2を形成した銅張積層
板1の両側にプライマー層3、絶縁樹脂層4および接着
剤5を形成し、めっきレジスト8を介して外層回路11
を形成したのちに、ドリルにより非貫通穴6を凹設し、
そこに電気めっきで非貫通接続穴を構成する接続導体部
9を形成する。
FIG. 5 is a cross-sectional view of another conventional multilayer printed wiring board. In this example, a primer layer 3, an insulating resin layer 4 and an adhesive are provided on both sides of a copper-clad laminate 1 having an inner layer circuit 2 formed on both sides. 5 is formed, and the outer layer circuit 11 is formed via the plating resist 8.
After forming, a non-through hole 6 is recessed by a drill,
The connection conductor 9 constituting the non-through connection hole is formed by electroplating there.

【0004】[0004]

【発明が解決しようとする課題】上述した第1の従来例
では、両面板26,26どうしを張り合わせる構造とし
ているので、めっき工程は個々の銅張積層板21,22
で1回づつ計2回行い、両面板の張り合わせをして貫通
穴7を穿孔後に1回行うため、合計3回のめっきを行う
必要があり、このために製造コストが高かった。また、
第2の従来例では、ドリルの穿孔深さを制御しなければ
ならいため、穿孔のための作業時間が余計にかかり量産
に適さない。また、僅かな製造誤差によって導通が不確
実になるおそれがある。
In the above-mentioned first conventional example, the double-sided plates 26, 26 are bonded to each other, so that the plating process is performed on the individual copper-clad laminates 21, 22.
In this case, plating is performed twice in total, and the double-sided boards are bonded together and the through-hole 7 is performed once after the perforation. Therefore, plating has to be performed three times in total, and the manufacturing cost is high. Also,
In the second conventional example, since the drilling depth of the drill has to be controlled, the work time for drilling is extra, which is not suitable for mass production. Also, conduction may become uncertain due to a slight manufacturing error.

【0005】本発明は上記した従来の問題を解決するた
めになされたもので、その目的とするところは、製造コ
ストの低減と量産性の向上および品質の向上を図った多
層印刷配線板およびその製造方法を提供することにあ
る。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to provide a multilayer printed wiring board and a multi-layer printed wiring board which can reduce manufacturing costs, improve mass productivity and improve quality. It is to provide a manufacturing method.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
に、本発明に係る多層印刷配線板は、触媒入り銅張積層
板の表面に形成した内層回路と、この内層回路を覆うよ
うに前記銅張積層板の表面に積層した触媒入り絶縁樹脂
層と、この絶縁樹脂層のみに凹設した非貫通穴と、この
非貫通穴および前記絶縁樹脂層に形成した導体接続部お
よび外層回路とを備えた多層印刷配線板であって、前記
非貫通穴を短パルスCOレーザによって穿孔すること
により、穴の壁面を凹凸が4〜15μmの間隔とした
面に形成したものである。したがって、非貫通穴の壁面
と導体接続部との密着性が向上する。
In order to achieve this object, a multilayer printed wiring board according to the present invention comprises an inner layer circuit formed on the surface of a copper clad laminate containing a catalyst, and an inner layer circuit covering the inner layer circuit. A catalyst-containing insulating resin layer laminated on the surface of the copper-clad laminate, a non-through hole recessed only in the insulating resin layer, and a conductor connection portion and an outer layer circuit formed in the non-through hole and the insulating resin layer. A multilayer printed wiring board comprising a non-through hole formed by drilling the non-through hole with a short pulse CO 2 laser to form a wall surface of the hole with a rough surface having an interval of 4 to 15 μm . Therefore, the adhesion between the wall surface of the non-through hole and the conductor connection portion is improved.

【0007】[0007]

【発明の実施の形態】以下、本発明の実施の形態を図に
基づいて説明する。図1は本発明に係る多層印刷配線板
の製造方法を説明する図である。同図(a)において、
1はめっき触媒入りガラスエポキシ銅張積層板であっ
て、先ず、この銅張積層板1の両面にエッチングによっ
て内層回路2を形成する。次に、同図(b)に示すよう
に、銅張積層板1の両面にプライマー層3を介して絶縁
樹脂と充填材からなる絶縁樹脂層4を積層し、絶縁樹脂
層4の表面に接着剤5を塗布する。このようにプライマ
ー層3によって絶縁樹脂層4と銅張積層板1との密着性
が向上する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram illustrating a method for manufacturing a multilayer printed wiring board according to the present invention. In FIG.
Reference numeral 1 denotes a glass epoxy copper-clad laminate containing a plating catalyst. First, an inner layer circuit 2 is formed on both surfaces of the copper-clad laminate 1 by etching. Next, as shown in FIG. 1B, an insulating resin layer 4 made of an insulating resin and a filler is laminated on both surfaces of the copper-clad laminate 1 with a primer layer 3 interposed therebetween, and adhered to the surface of the insulating resin layer 4. Apply agent 5. Thus, the adhesion between the insulating resin layer 4 and the copper clad laminate 1 is improved by the primer layer 3.

【0008】そして、同図(c)に示すように、短時間
に高いエネルギーで絶縁樹脂層4を炭化することなく切
削することができる周波数10 〜10 Hzの範囲の
短パルスCOレーザを一方の絶縁樹脂層4の上方から
内層回路2に向かって照射すると、短パルスCOレー
ザが内層回路2を貫通しないので、短パルスCOレー
ザによって接着剤5および絶縁樹脂層4のみに非貫通穴
6が凹設される。また、ドリルによって貫通穴7を穿設
する。さらに、同図(d)に示すように、絶縁樹脂層4
の貫通穴7の穿設部分にスミア処理およびシーダ処理を
行ったのちに、外層回路11と逆のパターンのめっきレ
ジスト層8を施す。しかる後、無電解銅めっきによって
非貫通穴6の壁面に導体接続部9を析出して非貫通接続
穴を形成するとともに、貫通穴7の壁面に導体接続部1
0を析出して貫通接続穴を形成し、かつこれら導体接続
部9,10に導通する外層回路11を形成する。
Then, as shown in FIG. 1C, a short-pulse CO 2 laser having a frequency in the range of 10 4 to 10 8 Hz that can cut the insulating resin layer 4 with high energy in a short time without carbonizing. When irradiated toward the inner layer circuit 2 from above of one of the insulating resin layer 4, since the short pulse CO 2 laser does not penetrate the inner layer circuit 2, non only the adhesive 5 and the insulating resin layer 4 by the short pulse CO 2 laser A through-hole 6 is provided. Further, a through hole 7 is formed by a drill. Further, as shown in FIG.
After performing a smear process and a seeder process on a portion where the through hole 7 is formed, a plating resist layer 8 having a pattern opposite to that of the outer layer circuit 11 is applied. Thereafter, a conductor connection portion 9 is deposited on the wall surface of the non-through hole 6 by electroless copper plating to form a non-through connection hole, and the conductor connection portion 1 is formed on the wall surface of the through hole 7.
0 is formed to form a through connection hole, and an outer layer circuit 11 which is electrically connected to the conductor connection portions 9 and 10 is formed.

【0009】このように非貫通穴6を、銅張積層板1に
絶縁樹脂層4を積層した後、貫通穴7と同時に形成する
方法としたので、接続導体部9,10および外層回路1
1とを一度の無電解めっきによって形成することがで
き、このためコストの低減を図ることができる。また、
絶縁樹脂層4をめっき触媒入りとし、接続導体部9,1
0および外層回路11を無電解めっきで形成したことに
より、電解めっきで形成するときと比較して、めっき液
に浸漬させる工程が省略でき、コストの低減を図ること
ができる。
Since the non-through holes 6 are formed simultaneously with the through holes 7 after the insulating resin layer 4 is laminated on the copper clad laminate 1, the connection conductors 9, 10 and the outer layer circuit 1 are formed.
1 and 1 can be formed by a single electroless plating, so that the cost can be reduced. Also,
The insulating resin layer 4 contains a plating catalyst, and the connection conductor portions 9 and 1
Since the 0 and the outer layer circuit 11 are formed by electroless plating, a step of immersion in a plating solution can be omitted as compared with the case of forming by electroless plating, and cost can be reduced.

【0010】また、短パルスCO2 レーザ光によって非
貫通穴6を凹設したので、非貫通穴6の壁面6aが図2
に示すように極微的に見て凹凸状の粗面に形成される。
一般に、レーザ光によって非貫通穴6を凹設するときに
は、内層回路2の表面2aに絶縁樹脂層4の樹脂が残存
し易く、このため接続導体部9と内層回路2との密着力
が低く、外部から衝撃等が加わると、接続導体部9と内
層回路2との間に応力が発生して、接続導体部9が内層
回路2から剥離して導通不良が発生する。上述したよう
に、非貫通穴6の壁面6aが凹凸状の粗面に形成される
ことにより、接続導体部9と非貫通穴6の壁面6aとの
密着性が向上して、接続導体部9と内層回路2との間に
発生する応力が緩和される。このため接続導体部9の内
層回路2からの剥離による導通不良が防止される。
Since the non-through hole 6 is recessed by the short pulse CO 2 laser beam, the wall surface 6a of the non-through hole 6 is
As shown in (1), when viewed microscopically, it is formed on an uneven rough surface.
Generally, when the non-through hole 6 is recessed by the laser beam, the resin of the insulating resin layer 4 is likely to remain on the surface 2a of the inner layer circuit 2, so that the adhesion between the connection conductor 9 and the inner layer circuit 2 is low. When an impact or the like is applied from the outside, stress is generated between the connection conductor portion 9 and the inner layer circuit 2, and the connection conductor portion 9 peels off from the inner layer circuit 2 to cause conduction failure. As described above, since the wall surface 6a of the non-through hole 6 is formed in a rough surface with irregularities, the adhesion between the connection conductor 9 and the wall surface 6a of the non-through hole 6 is improved, and the connection conductor 9 And the stress generated between the inner layer circuit 2 and the inner layer circuit 2 are alleviated. For this reason, conduction failure due to the separation of the connection conductor portion 9 from the inner layer circuit 2 is prevented.

【0011】この場合、接続導体部9と非貫通穴6の壁
面6aとの密着力は、壁面6aの凹凸の間隔に密接に関
係し、実験の結果から密着性を向上させるためには、凹
凸を4〜15μmの間隔に形成することが望ましいこと
がわかった。一方、この凹凸の間隔は、短パルスCO2
レーザの発振波長に密接に関係し、発振波長の1/2の
間隔で凹凸が形成されることがわかっている。したがっ
て、密着性を向上させるための凹凸の間隔を4〜15μ
mとするためには、発振波長が8〜30μmの範囲の短
パルスCO2 レーザを使用するのが望ましく、本実施の
形態では、発振波長10.6μmのものを使用し、略
5.3μmの間隔の凹凸が形成されている。
In this case, the adhesion between the connecting conductor 9 and the wall surface 6a of the non-through hole 6 is closely related to the distance between the irregularities on the wall surface 6a. Was formed at intervals of 4 to 15 μm. On the other hand, the interval between the irregularities is a short pulse CO 2
It is known that the irregularities are closely related to the oscillation wavelength of the laser and are formed at intervals of 1/2 of the oscillation wavelength. Therefore, the interval between the irregularities for improving the adhesion is 4 to 15 μm.
In order to set m, it is desirable to use a short pulse CO 2 laser having an oscillation wavelength in the range of 8 to 30 μm. In this embodiment, a laser having an oscillation wavelength of 10.6 μm is used. The unevenness of the interval is formed.

【0012】表1は本発明の非貫通接続穴と、図5で説
明した従来の非貫通接続穴との熱衝撃を与えたときの比
較結果である。この表から明らかなように、非貫通穴6
の壁面6aを凹凸を有する粗面とした本発明の非貫通接
続穴の方が信頼性が高いことがわかる。なお、この表
は、米国軍用基準である「MIL−STD−202E,
107D」に基づく熱衝撃試験を1000サイクル行
い、その基準は、品質規格「MIL−P−55110
C」によるものである。また、サンプルはJIS C5
012 両面プリン板用複合テストパターンにおいて、
試料Dを1層、2層に形成した多層板を作成し、1層〜
2層間距離80μm、めっき厚さ30μmとしたもので
ある。サンプル数は1000個で、非貫通接続穴の初期
抵抗値に対して、1000サイクル後で10%を越えた
サンプルをNGとして計数したものである。
Table 1 shows a comparison result between the non-through connection hole of the present invention and the conventional non-through connection hole described with reference to FIG. As is clear from this table, the non-through hole 6
It can be seen that the non-penetrating connection hole of the present invention in which the wall surface 6a of FIG. This table is based on the U.S. military standard "MIL-STD-202E,
The thermal shock test based on “107D” is performed for 1000 cycles, and the standard is the quality standard “MIL-P-55110”
C ". The sample is JIS C5
012 In the composite test pattern for double-sided pudding board,
A multilayer board in which the sample D is formed in one layer or two layers is prepared, and
The distance between the two layers was 80 μm and the plating thickness was 30 μm. The number of samples was 1,000, and samples exceeding 10% after 1000 cycles with respect to the initial resistance value of the non-through connection hole were counted as NG.

【0013】[0013]

【表1】 [Table 1]

【0014】また、従来のように内層回路2と外層回路
11との間に、レーザ光が乱反射するプリプレグとして
のガラスクロス樹脂含浸布が介在していないので、レー
ザ光による非貫通穴6の形成が良好に行われ、このため
非貫通穴6の壁面6aには、接続導体部9と非貫通穴6
の壁面6aとの密着性を向上させるための凹凸が形成さ
れる。
Further, since there is no glass cloth resin impregnated cloth as a prepreg that reflects laser light irregularly between the inner layer circuit 2 and the outer layer circuit 11 as in the prior art, the non-through hole 6 is formed by laser light. The connection conductor portion 9 and the non-through hole 6
Irregularities for improving adhesion to the wall surface 6a are formed.

【0015】図3は本発明の第2の実施の形態を示す一
部を拡大した断面図である。この第2の実施の形態で
は、同心円状に環状に形成した小径の非貫通穴15aと
大径の非貫通穴15bとを短パルスCO2 レーザで形成
し、これら非貫通穴15a,15bに無電解銅めっきに
より接続導体部16a,16bを析出して非貫通穴接続
部を形成する。図6は大径の非貫通穴15bの外径Rと
同じに形成された従来の非貫通穴6を示すもので、この
従来の非貫通穴6と、上述した第2の実施の形態の同心
円上に形成した非貫通穴15a,15bとの穴の外周長
を比較すると、第2の実施の形態の方が大きい。
FIG. 3 is a partially enlarged sectional view showing a second embodiment of the present invention. In the second embodiment, a small-diameter non-through hole 15a and a large-diameter non-through hole 15b formed concentrically and annularly are formed by a short-pulse CO 2 laser, and the non-through holes 15a and 15b The connection conductor portions 16a and 16b are deposited by electrolytic copper plating to form a non-through hole connection portion. FIG. 6 shows a conventional non-through hole 6 formed to be the same as the outer diameter R of the large-diameter non-through hole 15b. The conventional non-through hole 6 and the concentric circle of the second embodiment described above. Comparing the outer peripheral lengths of the non-through holes 15a and 15b formed above, the second embodiment is larger.

【0016】このため、第2の実施の形態における大径
の非貫通穴15bと、従来の非貫通穴6との底面積が同
じにもかかわらず、第2の実施の形態の非貫通接続穴の
方が壁面の表面積が大きくなり、これによって接続のた
めの導通抵抗が小さくなる。表2は第2の実施の形態の
非貫通接続穴と図6に示した従来の非貫通接続穴との導
通抵抗を比較したもので、本発明の非貫通接続穴の方が
導通抵抗が低いことがわかる。なお、サンプルはJIS
C5012 両面プリン板用複合テストパターンにお
いて、試料Dを1層、2層に形成した多層板を作成した
ものである。ただし、ライン幅を0.1mm、ランド径
2mmに変更し、1層〜2層間距離80μm、めっき厚
さ30μmとしたものである。
Therefore, despite the fact that the large-diameter non-through hole 15b in the second embodiment and the conventional non-through hole 6 have the same bottom area, the non-through connection hole in the second embodiment does not. In this case, the surface area of the wall surface becomes larger, so that the conduction resistance for connection becomes smaller. Table 2 shows a comparison of conduction resistance between the non-through connection hole of the second embodiment and the conventional non-through connection hole shown in FIG. 6, and the non-through connection hole of the present invention has lower conduction resistance. You can see that. The sample is JIS
C5012 In the composite test pattern for a double-sided pudding board, a multilayer board was prepared in which the sample D was formed in one layer and two layers. However, the line width was changed to 0.1 mm, the land diameter was changed to 2 mm, the distance between the first and second layers was 80 μm, and the plating thickness was 30 μm.

【0017】[0017]

【表2】 [Table 2]

【0018】このような同心円状に環状に形成した非貫
通穴15a,15bを従来のようにドリルあるいはルー
ター加工によって形成すると加工コストが高くなるが、
第2の実施の形態のように短パルスCO2 レーザで形成
するときには、非貫通穴15a,15bの穴形状を有す
るマスクを用いて短パルスCO2 レーザを照射すればよ
いので、加工が容易で、加工コストの上昇を防止でき
る。
If such non-through holes 15a and 15b formed concentrically in an annular shape are formed by drilling or router processing as in the prior art, the processing cost increases.
When forming the short pulse CO 2 laser as in the second embodiment, non-through hole 15a, since the short pulse CO 2 laser with a mask having a hole shape of 15b may be irradiated, the processing is easy In addition, an increase in processing cost can be prevented.

【0019】なお、この第2の実施の形態では、非貫通
穴15a,15bを同心円状に形成したが、これに限定
されず、断面を矩形や星形としてもよく、要は非貫通穴
の底面積を増加させることなく、穴の外周長を長くし
て、穴の壁面の表面積を増大させるような形状とすれば
よい。
In the second embodiment, the non-through holes 15a and 15b are formed concentrically. However, the present invention is not limited to this, and the cross section may be rectangular or star-shaped. The shape may be such that the outer peripheral length of the hole is increased and the surface area of the wall surface of the hole is increased without increasing the bottom area.

【0020】[0020]

【実施例】スミア処理は、38℃の無水クロム酸950
g/lを使用して18分間行う。粗化は、NaF10g
/l,CrO315g/l,H2SO4400ml/lの
3成分からなる36℃の粗化液を使用して5分間行う。
EXAMPLE Smear treatment was performed using chromic anhydride 950 at 38 ° C.
Perform for 18 minutes using g / l. Roughening is NaF10g
/ L, 15 g / l of CrO 3 , 400 ml / l of H 2 SO 4 , using a roughening solution at 36 ° C consisting of three components for 5 minutes.

【0021】[0021]

【発明の効果】以上説明したように本発明によれば、触
媒入り銅張積層板の表面に形成した内層回路と、この内
層回路を覆うように前記銅張積層板の表面に積層した触
媒入り絶縁樹脂層と、この絶縁樹脂層のみに凹設した非
貫通穴と、この非貫通穴および前記絶縁樹脂層に形成し
た導体接続部および外層回路とを備えた多層印刷配線板
であって、前記非貫通穴を短パルスCOレーザによっ
て穿孔することにより、非貫通穴の壁面を凹凸が4〜1
5μmの間隔とした粗面に形成したことにより、貫通穴
の壁面と導体接続部との密着性が向上し、外部からの衝
撃に対しても剥離して導通不良となるようなことがな
く、このため信頼性が向上する。
As described above, according to the present invention, an inner layer circuit formed on the surface of a copper clad laminate containing a catalyst, and a catalyst containing a catalyst laminated on the surface of the copper clad laminate so as to cover the inner layer circuit are provided. An insulating resin layer, a non-through hole recessed only in the insulating resin layer, a multilayer printed wiring board including a conductor connection portion and an outer layer circuit formed in the non-through hole and the insulating resin layer, By piercing the non-through hole with a short pulse CO 2 laser, the wall surface of the non-through hole has irregularities of 4-1
By being formed on the rough surface with a spacing of 5 μm, the adhesion between the wall surface of the through-hole and the conductor connection portion is improved, and there is no possibility of peeling even with an external impact and causing conduction failure, Therefore, reliability is improved.

【0022】また、本発明によれば、レーザ光を短パル
スCO2 レーザとしたので、非貫通穴の壁面を微細な凹
凸に形成することができるとともに、非貫通穴の断面形
状を断面積に対して断面の外周の長さを大きくすること
ができるので、貫通穴の壁面と導体接続部との密着性が
向上し、外部からの衝撃に対しても剥離して導通不良と
なるようなことがなく、このため信頼性が向上する。
Further, according to the present invention, since the laser light is a short-pulse CO 2 laser, the wall surface of the non-through hole can be formed with fine irregularities, and the cross-sectional shape of the non-through hole can be reduced to a cross-sectional area. On the other hand, the outer circumference of the cross section can be increased, so that the adhesion between the wall surface of the through-hole and the conductor connection part is improved, and it can be separated from external shocks and lead to poor conduction. And thus the reliability is improved.

【0023】また、本発明によれば、非貫通穴を、穴の
底面積に対して穴の外周長を長くする断面形状となるよ
うにレーザによって穿孔し、非貫通穴の壁面の表面積を
増大させたことにより、加工が容易で加工コストを抑え
ることができるにもかかわらず、非貫通接続穴の導通抵
抗を小さくすることができる。
According to the present invention, the non-through hole is drilled by a laser so as to have a cross-sectional shape in which the outer peripheral length of the hole is longer than the bottom area of the hole, so that the surface area of the wall surface of the non-through hole is increased. By doing so, it is possible to reduce the conduction resistance of the non-penetrating connection hole, although the processing is easy and the processing cost can be suppressed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明に係る多層印刷配線板の製造方法を説
明する断面図である。
FIG. 1 is a cross-sectional view illustrating a method for manufacturing a multilayer printed wiring board according to the present invention.

【図2】 本発明に係る多層印刷配線板の非貫通穴を短
パルスCO2 レーザで形成したときの非貫通穴の内壁の
顕微鏡写真であって、(a)は300倍の倍率で撮影
し、(b)は2000倍の倍率で撮影したものである。
FIG. 2 is a micrograph of the inner wall of the non-through hole when the non-through hole of the multilayer printed wiring board according to the present invention is formed by a short pulse CO 2 laser, and (a) is taken at a magnification of 300 times. , (B) are taken at a magnification of 2000 times.

【図3】 本発明に係る多層印刷配線板の第2の実施の
形態における要部を拡大した断面図である。
FIG. 3 is an enlarged sectional view of a main part of a multilayer printed wiring board according to a second embodiment of the present invention.

【図4】 従来の多層印刷配線板の製造方法を説明する
断面図である。
FIG. 4 is a cross-sectional view illustrating a conventional method for manufacturing a multilayer printed wiring board.

【図5】 従来の多層印刷配線板の第2の例の断面図で
ある。
FIG. 5 is a sectional view of a second example of a conventional multilayer printed wiring board.

【図6】 従来の多層印刷配線板の要部を拡大した断面
図である。
FIG. 6 is an enlarged sectional view of a main part of a conventional multilayer printed wiring board.

【符号の説明】[Explanation of symbols]

1…銅張積層板、2…内層回路、3…プライマー層、4
…触媒入り絶縁樹脂層、5…接着剤、6,15a,15
b…非貫通穴、6a…内壁、7…貫通穴、8…めっきレ
ジスト層、9,10,16a,16b…接続導体部、1
1…外層回路。
DESCRIPTION OF SYMBOLS 1 ... Copper-clad laminate, 2 ... Inner circuit, 3 ... Primer layer, 4
... Catalyst-containing insulating resin layer, 5 ... Adhesive, 6,15a, 15
b: non-through hole, 6a: inner wall, 7: through hole, 8: plating resist layer, 9, 10, 16a, 16b: connecting conductor, 1
1 ... Outer layer circuit.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 岩崎 康弘 栃木県芳賀郡二宮町大字久下田1065 日 立エーアイシー株式会社内 (72)発明者 福里 健志郎 栃木県芳賀郡二宮町大字久下田1065 日 立エーアイシー株式会社内 (56)参考文献 特開 平5−198953(JP,A) 特公 昭47−15664(JP,B1) 特表 平2−500891(JP,A) 日本プリント回路工業会編「プリント 回路技術便覧」(昭62−2−28)日刊工 業新聞社P.362−366 (58)調査した分野(Int.Cl.6,DB名) H05K 3/46 H05K 3/00 B23K 26/00 - 26/18──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yasuhiro Iwasaki 1065 Kusita, Ninomiya-cho, Haga-gun, Tochigi Prefecture Inside AIC Co., Ltd. (56) References JP-A-5-198953 (JP, A) JP-B-47-15664 (JP, B1) JP-T2-508891 (JP, A) Printed by the Japan Printed Circuit Industry Association Circuit Technology Handbook "(Showa 62-2-28), Nikkan Kogyo Shimbun P. 362-366 (58) Fields surveyed (Int.Cl. 6 , DB name) H05K 3/46 H05K 3/00 B23K 26/00-26/18

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 触媒入り銅張積層板の表面に形成した内
層回路と、この内層回路を覆うように前記銅張積層板の
表面に積層した触媒入り絶縁樹脂層と、この絶縁樹脂層
のみに凹設した非貫通穴と、この非貫通穴および前記絶
縁樹脂層に形成した導体接続部および外層回路とを備え
た多層印刷配線板であって、前記非貫通穴を短パルスC
レーザによって穿孔することにより、穴の壁面を
凸が4〜15μmの間隔とした粗面に形成したことを特
徴とする多層印刷配線板。
An inner circuit formed on the surface of a copper clad laminate containing a catalyst, an insulating resin layer containing a catalyst laminated on the surface of the copper clad laminate so as to cover the inner circuit, and only the insulating resin layer A multilayer printed wiring board comprising: a recessed non-through hole; and a conductor connection portion and an outer layer circuit formed in the non-through hole and the insulating resin layer.
By drilling with O 2 laser, the wall surface of the hole is concave
A multilayer printed wiring board, wherein the projections are formed on a rough surface having an interval of 4 to 15 μm .
【請求項2】 触媒入り銅張積層板の表面に形成した内
層回路と、この内層回路を覆うように前記銅張積層板の
表面に積層した触媒入り絶縁樹脂層と、この絶縁樹脂層
のみに凹設した非貫通穴と、この非貫通穴および前記絶
縁樹脂層に形成した導体接続部および外層回路とを備え
た多層印刷配線板であって、前記非貫通穴を、穴の低面
積に対して穴の外周長を長くする断面形状となるように
レーザによって穿孔し、非貫通穴の壁面の表面積を増大
させたことを特徴とする各層印刷配線板の製造方法。
2. A method according to claim 1, wherein said catalyst-coated copper-clad laminate is formed on a surface thereof.
Layer circuit and the copper clad laminate so as to cover the inner layer circuit.
A catalyst-containing insulating resin layer laminated on the surface and this insulating resin layer
A non-through hole recessed only in the
A conductor connection portion formed on the edge resin layer and an outer layer circuit are provided.
Multilayer printed wiring board, wherein the non-through hole is formed by a low surface of the hole.
So that the cross-sectional shape increases the perimeter of the hole with respect to the product
Laser drilling increases surface area of non-through hole wall
A method for manufacturing a printed wiring board of each layer, characterized in that it is performed.
JP34376195A 1995-12-28 1995-12-28 Multilayer printed wiring board and method of manufacturing the same Expired - Fee Related JP2773722B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP34376195A JP2773722B2 (en) 1995-12-28 1995-12-28 Multilayer printed wiring board and method of manufacturing the same
US08/768,426 US5826330A (en) 1995-12-28 1996-12-18 Method of manufacturing multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34376195A JP2773722B2 (en) 1995-12-28 1995-12-28 Multilayer printed wiring board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH09186456A JPH09186456A (en) 1997-07-15
JP2773722B2 true JP2773722B2 (en) 1998-07-09

Family

ID=18364040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34376195A Expired - Fee Related JP2773722B2 (en) 1995-12-28 1995-12-28 Multilayer printed wiring board and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2773722B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000015015A1 (en) 1998-09-03 2000-03-16 Ibiden Co., Ltd. Multilayer printed wiring board and method for manufacturing the same
CN108401092B (en) * 2017-02-04 2024-03-15 宁波舜宇光电信息有限公司 Camera module, molded circuit board assembly thereof, circuit board and application

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
日本プリント回路工業会編「プリント回路技術便覧」(昭62−2−28)日刊工業新聞社P.362−366

Also Published As

Publication number Publication date
JPH09186456A (en) 1997-07-15

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