JP2765576B2 - Electronic clock - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electric
The present invention relates to a configuration of a power supply unit in an electronic timepiece using energy as an energy source. In particular, the present invention relates to an improvement in a power supply unit of an electronic timepiece having a power supply in which the discharge characteristics of the power supply are not flat and the voltage changes as the discharge proceeds.

[0002]

2. Description of the Related Art A conventional electronic timepiece using electric energy as an energy source, such as a quartz timepiece, uses a power supply having a flat discharge characteristic such as a silver battery in a power supply unit. This
Ri, I had the energy of the power to take full advantage.

[0003] However, silver batteries are expensive, and the batteries themselves are expensive.
The drawback was that the product had a long life .

[0004] In recent years, alkaline manganese batteries and the like have been used as a solution to these problems , and a solar battery is used as a power source in terms of the life of the battery itself.
Watches using high-capacity capacitors as secondary batteries have also been proposed.

[0005]

In the above technique, the alkaline manganese battery does not have a flat discharge characteristic and has a large amount of energy even after the operation of the watch is stopped. It cannot be said that there is. or,
In the case of using a high-capacity capacitor as a secondary battery, the duration of time until the clock stops is naturally determined by the discharge characteristics of the capacitor, which is a major problem for practical use. Was.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional drawbacks and to make full use of the electric energy of the power supply even if a power supply that waits for non-flat discharge characteristics is used.

[0007]

[Means for Solving the Problems ] To solve the above-mentioned problems.
Therefore, the present invention is based on externally applied energy.
Electronic timepiece with a built-in power generation means
The first battery charged by the power generation means via the rectification means.
Capacitor from the first condenser
And a second capacitor for charging the second capacitor.
A clock circuit that uses the terminal voltage of the sensor as a power supply voltage;
Detection for detecting the terminal voltage of the first or second capacitor
Means and energy stored in the first capacitor
And based on the detection voltage of the detection means.
The terminal voltage of the second capacitor exceeds a certain voltage.
And a boosting means for controlling the pressure within a range that does not exist.
Is the difference between the first capacitor and the boosting capacitor.
Switching connection repeatedly at a predetermined clock timing
Charging the second capacitor by
It is characterized by. According to the present invention, provided from outside
A second power generator with built-in power generation means for generating power based on energy
There is a clock circuit that uses the terminal voltage of the capacitor as the power supply voltage.
In electronic timepieces, the first condenser is
More charged through the rectifying means, the second capacitor
Energy is charged from the condenser 1 and the detecting means
Detects the terminal voltage of the first or second capacitor,
The boosting means includes a first capacitor and a boosting capacitor.
Connection is repeatedly switched at a predetermined clock timing
By charging the second capacitor
Boosts the energy charged in the first capacitor
And the second capacitor based on the detection voltage of the detection means.
The control is performed so that the terminal voltage of the sensor does not exceed a certain voltage.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings according to an embodiment.

In this embodiment, a solar power generation mechanism is used.
This is a timepiece that uses an electric double layer capacitor that is a high-capacity capacitor as a secondary battery using batteries .

FIG. 1 shows the discharge characteristics of the electric double layer capacitor, and FIG. 2 is a block diagram of an embodiment according to the present invention. FIG. 3 is a circuit diagram of a conventional system.
You. In FIG. 3, power generation by the solar battery 1
The power is charged to the electric double layer capacitor 12 and
When charged up, the limiter switch 13 closes and
The charging of the capacitor 12 is stopped. Clock body 14 is a saw
The battery 11 or the condenser 12 operates as a power supply. The diode 15 is a backflow prevention diode that prevents current from flowing into the solar battery when the generated electromotive voltage of the solar battery 11 becomes equal to or lower than the charging voltage of the capacitor 4.

The discharge characteristics of the capacitor 12 after the solar battery 11 is no longer exposed to light when the capacitor 12 is fully charged are shown by the solid line V _SS2 and the broken line in FIG.
V _SS ' ₁ . The vertical axis is the voltage of the condenser 12,
The horizontal axis is time. Condenser in this embodiment
Has a rated voltage of 1.8V. In addition , the clock stop operation
The pressure is 0.9V. At this time , the operation of the watch is
It will stop at t ₂ hours after no light hits Lee .

[0012] Figure 2 is a block diagram of one embodiment according to the present invention, light is irradiated occurs solar battery 1
The electric power is transferred to the electric double layer through the backflow prevention diode 3.
The capacitor 4 is charged. At this time, the solar battery
When the generated electromotive voltage ( _VSS1 ) of -1 exceeds the rated voltage,
The miter circuit 2 works to stop charging the capacitor 4.
For example, the rated voltage is the rated voltage of the capacitor 4.
Ri, the limiter circuit is composed of a constant voltage diode, FIG.
Between mid-V _DD -V _SS1 is energized When equal to or greater than the rated voltage charging
Current bypass or _switch between V _{DD and} V _SS1
And has a configuration to bypass the charging current by detecting a reference voltage .

The electric power charged in the condenser 4 is multi-stage.
Optimum boosting is performed by boosting charging circuit 5 and capacitor
-6. A detailed description of this operation will be described later.
The capacitor 6 serves as a power supply for a voltage detection circuit 7 for detecting the voltage V _SS ′ ₁ of the capacitor 4, a control circuit 8 for causing the boost charging circuit to perform optimal boost charging based on the voltage detection output, and a clock circuit 9. I have.

[0014] The next operation of the present embodiment, with reference to FIG. 1
This will be described in detail. Here, the broken line in FIG.
Shows the absolute value of the voltage V _SS ' ₁ of the capacitor 4 and the solid line
Indicates the absolute value of the voltage V _SS2 of the capacitor 6 . Conde
After the sensor 4 is fully charged , the solar battery 1
Explain when you are no longer hit. Electricity of condenser 4
When the voltage | V _SS ' ₁ | is equal to or higher than 1.2 V , the capacitor 4 and the capacitor 6 have the same voltage as the booster charging circuit 5.
Works.

The voltage | V _SS ' ₁ | of the capacitor 4 is equal to 1.2.
When the voltage is between V and 0.8 V, the voltage is doubled by the boosting charging circuit 5
To charge the capacitor 6. In the section of Figure 1t ₁ ~t ₃
is there. Therefore, the voltage of the capacitor 6 at this time | _VSS2
| It is a 1.8V~1.2V. Voltage of condenser 4
When | V _SS ' ₁ | is 0.8V to 0.6V, the boost charging circuit 5
Is boosted to twice Ri good is charged in the condenser 6. FIG.
In a period of t ₃ ~t _4. The condenser at this time
6 of the voltage | V _SS2 | becomes 1.6V~1.2V. Conde
Voltage of Nsa 4 | V _{SS '1} | When there is less than or equal to 0.6V, the step-up charge
Charge the capacitor 6 by boosting it three times by the electric circuit 5
You. A t ₄ later in FIG. 1.

[0016] As explained above, the boost charging means according to the present embodiment, the voltage of the capacitor 6 as the actual power of the timepiece | V _SS2 | the operation stop voltage 0.9V or more
The clock operable time is shown in FIG.
It is extended from t ₂ hours to t ₅ hours Te. Also, conden
Speaking of the voltage of the circuit 4, it was between 0.9V and 1.8V
Although it could not be used, according to the present embodiment, 0.3 V
To 1.8V, and the energy stored in the condenser 4
We use energy effectively .

[0017] Next, the multi-stage step-up charging circuit in the present embodiment
6, specific embodiments of the voltage detection circuit 7 and the control circuit 8 will be described.

FIG . 4 shows a basic form of the multi-stage boost charging circuit 6.
FIG. 5 specifically shows the operation.
(A) is a step-up operation, and (B) is a charging operation. FIG. 4, FIG.
The condensers 4 and 6 of FIG. 5 are those of FIG.
The circuits 21 and 22 are auxiliary capacitors for boosting. Ma
And, T _r1 through T _r7 in FIG. 4 is a FET, and performs a boosting
Plays the role of a switch. In FIG.
Not performed, the V _{SS '1} and V _SS2 to the same potential, and T _r3
The T _r4 is ON, the other may be set to OFF.

[0019] shows this state is FIG. 5 (A), the
Is an operation in t ₀ ~t ₁ in Figure 1. In addition, the t ₁ ~t ₃
In order to perform the 1.5-time boost charging , the voltage T _r1 at the time of boosting ,
T _r3, T _r6 ON and OFF the others, charging time T _r2, T _r4, T
Turn on _r5 and _Tr7 and _turn off others.

[0020] carried out in the same manner as in t _3, t ₄ at 2-fold step-up charge
In order, the other is ON the boosting time _{T r1, T r3, T r5} , T r7
OFF , when charging, the same operation as when charging at 1.5 times boosting
Rows that have, in order to further carry out the t ₄ ~t ₅ o'clock triple boosting is
At the time of boosting, the same operation as during boosting at the time of double boost charging is performed.
There, turning OFF the other ON the T _r2, T _r4, T _r6 at the time of charging. When each FET is controlled as described above, the state shown in FIG. 5 is obtained, and each boosting charge becomes possible.

The above-described multi-stage assembling specifically realized by an electronic circuit
One embodiment of the pressure charging circuit 5 is shown in FIG. Figure 6
Condenser 4,6,21,22 Te and the FET-T _r1 ~T
_r7 is the same as in FIG. Where T _r5 , T _r6 , T
_r7 is a P-channel FET because the current flows in both directions
And an N-channel FET. Also, φ _CL
Is a boost charge clock, and the logic level of the signal is "L"
At this time, boosting is performed, and at "H", charging is performed. Follow
Thus, the circuit repeats boost charging in accordance with the cycle of φ _CL .

AmpN , Amp1.5, Amp2, Amp
Reference numeral 3 denotes a signal indicating a boosting factor.
No boost, 1.5 times boost, 2 times boost, 3 times boost ,
The signal is formed by the control circuit 8. Also, 61 to 64
A known logic gates, T _r1 by these gates
The ON and OFF timings of the FETs up to Tr7 are _generated , and the operation described with reference to FIGS. 4 and 5 is performed.

[0023] next , FIG. 7 shows a specific example of the voltage detection circuit 7.
You. SP 'is a sampling signal and a circuit when "H"
Operates, and when "L", the circuit
Fix the state. The inside of the broken line is a known constant voltage circuit. , That
Output voltage is V _REG It is expressed as Also R ₁ , R _Two Is a resistance
Yes, | V _SS ' ₁ With the maximum voltage of 1.8 V

(Equation 1) Is set to satisfy. r ₁ , r ₂ , r ₃ , R
Are also resistors, and | V _SS ' ₁ | is 0.6 V,
The potential of the | V _M | tap at 1.8 V and 1.2 V is set to be the same.

[0024] The three-tap potentials, one by transmission gates 71 is selected (V _REGT), con
It is compared with the V _M in separator 72. Comparator 72
, Rather than tap the potential V _M is selected if a low potential
"H" is output, and when the opposite is true and SP 'is "L"
It is configured to output the "L", the output Co
mp is sent to the control circuit 8.

[0025] T _1.5, T _2, T _3, the transmission gate
A signal for selecting a signal, which is formed by the control circuit 8 and is "H".
The transmission gate to ON. Configuration above
By comparing V _M and V _REGT , the result (Comp)
And the transmission selection signals (T _1.5 , T ₂ , T ₃ )
V _{SS '1} in state becomes possible to determine whether to present in any of the t ₀ ~t ₅ of FIG. This determination is made by a control circuit 8 described later.
Perform at

FIG. 8 shows a specific example of the control circuit 8, and FIG.
Is a timing chart. Timing chart
Is doubled from the 1.5x boost control state on the left side of the wavy line
A transition to the boost control state is shown, and the movement of each signal when shifting from the double boost state to the state without boost is shown on the right side of the wavy line X. 8, 91, 9
Reference numeral 4 denotes a D-type flip-flop for latching data at the falling edge of CL, reference numeral 92 denotes a master latch which holds data when the CL is "L", reference numeral 93 denotes a 2-bit binary counter, and others are known gates.

Here, on the left side of the wavy line of the timing chart,
Next, the operation of this control circuit will be described. First , sample
The state before the switching pulse SP becomes “H” is the boost ratio.
1.5, the transmission gate selection signal is T _1.5
"H", and the state of each
Is stored in the binary counter 93. Now, simultaneously with the output of the sampling pulse SP, Reset
A signal is issued and the binary counter 93 is reset, and T ₃
Returns to the initial state in which is set to “H”. Thereafter, until the comparator output Comp becomes “L” due to the CP pulse,
T ₃ , T ₂ , and T _1.5 are selected.

Now, the voltage of the large-capacity capacitor 4 | V _SS ' ₁ |
There will have to allow between 0.6V~0.8V (t ₃ in FIG. 1
t during _4), as can be seen from the description of Figure 7, T ₂ is "H"
When the potential of V _M and V _REGT are reversed, Comp becomes
It becomes "L". Therefore , this determines the range of V _SS ' ₁
it can. Because the detected voltage of T ₃ is 0.6V, the T ₂
Since the detection voltage is 0.8V, the comparator
If the output is inverted , | V _SS ' ₁ | becomes 0.6V to 0.8V
It can be specified that Also, | V _SS ' ₁ |
When the voltage is 1.2 V or more, T _1.5 is “H” and Comp is also
It remains at "H". When Comp becomes "L", subsequent CP pulses are prohibited, and the state of the transmission gate selection signal is stored in the binary counter 93.

When | V _SS ' ₁ | is 1.2 V or more
Is that _T1.5 is "H" and Comp remains "H"
You. Therefore, when the CP pulse ends, the binary
Depending on the contents of the counter and the output of Comp , how many times the voltage should be boosted can be determined. The decision is made by the D-type flip-flop 94, the master latch 92, and some gates, and the operation is performed at the fall of SP.

[0030] According to the present embodiment as described above, when
T ₅ hours t ₂ hours 1 uptime in total or
Stretched out. In terms of the voltage of the capacitor 4,
The one that could only be used between 0.9V and 1.8V
According to the embodiment can use from 0.3V to 1.8V, con
It is clear that the energy stored in Denser 4 is being used effectively.

[0031] , In the present embodiment, the booster in FIG.
5, 1.5 times, 2.0 times, and 3.0 times booster
Means, which is connected to an electric signal by the voltage detection unit 12.
The present invention is limited to these three types.
Not only one kind but also many kinds
Various magnifications are also conceivable.

In this embodiment, the voltage is detected by a capacitor.
-4 voltage is detected (1.8 , 1.2 , 0.8 , 0.8).
6V) detects the voltage of the capacitor 6 (1.8V,
1.2V) to determine the boost state compared to the contents of the booster 5
A method of course is also possible. This method requires less detection voltage.
There is a merit that there is no need. The power generation unit 1 is a saw.
Anything can be used as long as it generates electricity , not just a battery . In addition, as described above, the effects of the present invention are not lost even when a normal battery is formed by combining 1 and 2.

In FIG. 1, the clock stops when V _SS '1 is between 0.3 V and 0 V , and the oscillation circuit of the clock stops the oscillation. When the oscillation stops, the clock signal for boosting stops being generated, so that the boosting operation also stops. If the solar cell 1 and the charging circuit are connected in this state, even if light is irradiated on the solar cell, current flows only into the charging circuit and the oscillation circuit oscillates immediately .
Can not Rukoto, as a result, the step-up circuit and clock is required because it does not operate. In order to solve such a problem, when the oscillation of the oscillation circuit stops, the connection between the solar cell and the charging circuit may be disconnected, and the solar cell and the oscillation circuit may be directly connected.

A specific example will be described with reference to the example of FIG.

In FIG. 10, reference numeral 102 denotes a clock circuit. The limiter circuit 2 in FIG. 2 is removed for simplification of description, and the multi-stage booster circuit 5, the voltage detection circuit 7, and the control circuit 8 are simplified as a booster circuit 119 and a logic circuit 118.

The power supply control will be described below with reference to FIG.
You. First, the secondary battery 103 (condenser) is in a low voltage state
(0.3 V or less).

Assuming that the oscillation signal 123 of the oscillation circuit 108 is oscillating, the oscillation stop detection circuit 117 detects the stop, the control signal 113 becomes L, the transmission gate 114 is turned on, and the transmission gates 115 and 10 are turned on.
5 becomes OFF.

[0038] Therefore, the power supply of the oscillation circuit 108 120
Are turned off with the boosted power supply 121 by the booster circuit 119 and turned on with the solar cell side power supply 122.
When light is applied to the oscillation circuit 108, the oscillation stop detection circuit 11
7. An oscillating voltage is supplied to the logic circuit 118 to start oscillating. When oscillation starts, the boost clock required for boost
124 is generated, and the booster circuit 119
, And a high voltage is generated in the boost power supply 121.

On the other hand, since the transmission gate 114 is turned OFF and the transmission gates 115 and 105 are turned ON by the start of oscillation, the clock circuit 10
In the second power supply system, the solar battery 101 charges the secondary battery 103
Then , the clock circuit 102 operates by the high voltage obtained by boosting the secondary battery 103 . That is, even if the voltage of the secondary battery is low, the watch operates immediately.

[0040]

As described above , according to the present invention,
Power generators that generate electricity based on energy provided from outside
The terminal voltage of the second capacitor is set as the power supply voltage
In an electronic timepiece having a clock circuit,
The sensor is charged by the power generation means through the rectification means,
Energy from condenser 2 and condenser 1
Is charged, and the detecting means is connected to the first or second capacitor.
The terminal voltage is detected, and the boosting means boosts the voltage with the first capacitor.
The connection with the capacitor for the voltage
To the second capacitor by repeatedly switching
Charging the first capacitor by charging
Energy, and based on the detection voltage of the detection means.
And the terminal voltage of the second capacitor does not exceed a certain voltage.
Wait for non-flat discharge characteristics
Even if a power supply is used, the electric energy of the power supply is sufficient
Can be used. That is, its electrical et an electronic timepiece having a power supply with a large discharge characteristics of the variation of the voltage
Energy loss can be minimized, in other words, electrical energy can be used very effectively . This
For example, by using a capacitor as a power source for a watch with a solar battery that does not require battery replacement, it is possible to dramatically extend the duration thereof. In addition, alkaline manganese batteries and lithium batteries
Such a battery of Umm battery can be utilized also energy loss is also reduced.

[Brief description of the drawings]

[1] Effect illustration by discharge electric characteristics and the present invention of a capacitor.

FIG. 2 is a block diagram of an embodiment according to the present invention.

FIG. 3 is a diagram showing a conventional example.

FIG. 4 is a diagram showing a basic form of a multi-stage booster circuit.

FIGS. 5A to 5D are diagrams showing specific examples of the operation in FIG. 4; 5 (B) to 5 (D), (A) shows a boosting operation, and (B) shows a charging operation.

FIG. 6 illustrates an embodiment as an electronic circuit.

FIG. 7 is a diagram showing a specific example of a voltage detection circuit.

FIG. 8 is a diagram showing a specific example of a control circuit.

FIG. 9 is a timing chart of a control circuit.

FIG. 10 is a block diagram showing an application example of the present invention.

[Explanation of symbols]

1 solar battery 2 Limiter circuit 4 Condenser 5 boost means 9 Clock body

Claims (1)

(57) [Claims] A generator that generates electricity based on externally provided energy
An electronic timepiece having a built-in power supply means , wherein the first timepiece is charged by the power generation means via a rectification means.
A capacitor and a second capacitor charged with energy from the first capacitor.
When the terminal voltage of the second capacitor and the terminal voltage of the second capacitor are used as the power supply voltage
And a terminal circuit for detecting a terminal voltage of the first or second capacitor.
Detecting means, and boosting the energy charged in the first capacitor.
And based on the detection voltage of the detection means,
Range where the terminal voltage of capacitor 2 does not exceed a certain voltage
And a step-up means for controlling the connection between the first condenser and the step-up condenser.
Switching repeatedly at a predetermined clock timing
That the second capacitor is charged.
Electronic clock