JP2757522B2 - Recording mode discrimination circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the above order.

A. Industrial application fields B. Summary of the invention C. Conventional technology D. Problems to be solved by the invention E. Means to solve the problems F. Function G. Embodiment G1 Overall configuration of one embodiment (Fig. 1) G2 Configuration of main part of one embodiment (Fig. 2) G3 Operation of one embodiment (Figs. 1 and 2) H. Effects of the invention A. Industrial application field The present invention relates to a recording mode discriminating circuit suitable for a VTR compatible with a plurality of recording modes.

B. Summary of the Invention The present invention relates to a recording mode discriminating circuit corresponding to a reproduction signal of a high quality and a standard recording mode in which a carrier frequency of an FM luminance signal is high and low, and a predetermined upper band frequency of a high image quality mode. A large-current discharge control circuit and a small-current charge / discharge control circuit, respectively responsive to the presence or absence of each signal component of a predetermined carrier frequency in the standard mode, and a capacitor commonly connected to both control circuits. By discriminating the recording mode of the reproduction signal based on the terminal voltage, the use of a capacitor is minimized, and it is easy to implement an IC, and the recording mode can be accurately and quickly determined.

C. Conventional technology Conventionally, a VTR has a plurality of recording methods corresponding to a standard mode and a high image quality mode.In the high image quality mode, the carrier frequency of the FM luminance signal is shifted to a higher frequency than the standard mode. By adopting a so-called high-band system in which the frequency shift is enlarged, a high-quality reproduced image can be obtained.

In the case of the 8 mm system VTR, the FM luminance signal YFM of each mode as shown in Table 1 below is converted to the low-frequency conversion chroma signal CL, FM.
The audio signal AFM and the like are recorded on a magnetic tape in a frequency arrangement as shown in FIGS. 3A and 3B.

In the reproducing system, a recording mode discriminating circuit is used for automatically discriminating and reproducing a plurality of recording modes as described above.

A conventional VTR compatible with a plurality of recording modes is configured, for example, as shown in FIG. 4. In FIG. 4, (10) denotes a luminance signal reproducing system,
A reproduction RF signal from the magnetic head (1) is supplied to a high-pass filter (3) and a low-pass filter (4) for so-called Y / C separation via a reproduction amplifier (2), and is subjected to low-pass conversion. The chroma signal CL is supplied to the color signal processing system (5), and the FM luminance signal YFM is supplied to the input terminal (10
i).

This FM luminance signal YFM is used in the high image quality mode and the standard mode.
It is supplied to the RF band processing circuits (11h) and (11n) in common.
The band processing circuits (11h) and (11n) include limiters (12b) and (12n) for preventing inversion and band filters (13h) and (13n).
n) are connected in cascade, and an appropriate band process such as peaking is performed so that both side bands of the FM signal are balanced with the magnetic head (1) as a whole. Limiter (12
h) and (12n) are configured as soft limiter or double limiter type, and the outputs of bandpass filters (13h) and (13n) are
The signal is supplied to the FM demodulator (14) via the changeover switch S1.

The output of the demodulator (14) is supplied to the de-emphasis circuits (16h) and (16n) through the low-pass filters (15h) and (15n) in the high image quality mode and the standard mode. The frequency characteristics of the low-pass filters (15h) and (15n) correspond to the frequency arrangements shown in FIGS.
It is set to be flat and 3MHz flat so that a horizontal resolution of about 430 lines and 270 lines can be obtained. De-emphasis circuit (16
h) and (16n) are output from the noise low-pass circuits (17h) and (17n) including comb filters, respectively.
And the changeover switch S2, and is led out to the output terminal (10o).

Reference numeral (20) denotes a recording mode discrimination circuit, to which an input terminal (20i) is supplied with an FM luminance signal YFM from a high-pass filter (3) via a limiter (6). Bandpass filters (21h) and (21n) for the high image quality mode and the standard mode are commonly connected to the input terminal (20i). The center frequencies of the two band-pass filters (21h) and (21n) are set to the sync tip frequencies fsh and fsn in the high image quality mode and the standard mode, for example, as shown in Table 1 above.

fsh = 5.7MHz fsn = 4.2MHz Connect to both band filters (21h) and (21n), respectively, and connect the detection circuits (22h) and (22n) and the hold circuit (23h).
h) and (23n) are connected. Hold circuit (23h), (2
3n) is supplied to a comparator (24).
The output of 4) is supplied as a control signal to the changeover switches S1 and S2 via the terminal (20o).

FM luminance signal Y supplied to the recording mode determination circuit (20)
When FM is a signal in the high image quality mode, normally, the output of the hold circuit (23h) becomes larger than the output of the hold circuit (23n), and the output of the comparator (24) becomes the “high” level.

Conversely, when the FM luminance signal YFM is a signal in the standard mode, the output of the hold circuit (23n) is normally larger than the output of the hold circuit (23h), and the output of the comparator (24) is “low”. Level.

With such a determination output, the switches S1 and S2 are switched to predetermined positions according to the recording mode.

D. Problems to be Solved by the Invention Meanwhile, the frequency and level of the luminance signal greatly change in relation to the picture pattern of the original video, and the frequency spectrum of the FM luminance signal YFM also changes correspondingly.

Therefore, for example, as shown in FIG. 3, even if the carrier frequency corresponding to the 50% white level is f50h = 70 MHz, the frequency fy of the original luminance signal becomes When the expression (1) is satisfied, the frequency of the m-th lower band may be close to the sync tip frequency fsn in the standard mode, as shown in FIG. In FIG. 5, m = 2 is exemplified.

m · fy {f50h−fsn} (1) In such a case, the mode discriminating circuit (20) as shown in FIG. 4 described above converts the reproduction signal in the high image quality mode as shown in FIG. There is a possibility that the signal is erroneously determined to be a reproduction signal.

In order to solve such a problem of erroneous determination, the present applicant has already disclosed in Japanese Patent Application No. 63-75517 (Japanese Patent Application Laid-Open No. 1-246975) that a signal component exists near the sync chip frequency fsn in the standard mode. In this case, a mode discriminating circuit is provided for discriminating whether or not the reproduced signal is in the high image quality mode based on the presence or absence of the m-th upper band, thereby preventing erroneous discrimination.

As shown in FIG. 6, in the mode discriminating circuit (20A), the center frequency fuh of the bandpass filter (21A) for the high image quality mode is set as expressed by the following equation (2).

fuh = f50h + m · fy ≒ 2 · f50h−fsn ‥‥ (2) Therefore, this frequency fuh is symmetric with respect to the standard mode sync tip frequency fsn with respect to the carrier frequency f50h of the high image quality mode signal corresponding to the 50% white level. That is, in the above numerical example, the following is set.

fuh = 9.8 MHz Further, the pass band width of the band-pass filter (21A) is set relatively wide in order to cope with a change in the picture of the original video. The other configuration is the mode discriminating circuit (20) shown in FIG.
Is the same as

As shown in FIG. 5, in the FM luminance signal in the high image quality mode, when the m-order lower sideband exists near the sync tip frequency fsn in the standard mode, the carrier is set to the center of symmetry, and m
There is a next upper band wave.

Therefore, the mode discrimination circuit (20A) in FIG. 6 discriminates the recording mode as shown in the following Table 2.

However, in the mode discriminating circuit (20A) of FIG. 6, the hold circuits (23h) and (23n) have:
For example, a relatively large-capacity electrolytic capacitor of about 10 μF is used, and there is a problem that it is difficult to make an IC.

The load resistance of each of the detection circuits (22h) and (22n) is set to be relatively large, for example, about 10 KΩ in order to suppress current consumption. For this reason, there is a problem that the discharge time constant becomes large and the determination is slow.

In view of the foregoing, an object of the present invention is to provide a recording mode discriminating circuit which can be easily integrated into an IC and can discriminate a recording mode accurately and quickly.

E. Means for Solving the Problems The present invention provides a recording mode discriminating circuit corresponding to reproduction signals in first and second recording modes in which a carrier frequency of a luminance signal YFM in a frequency modulation format becomes high or low. A first bandpass filter (31h) having a predetermined upper band frequency fuh in the first recording mode as a center frequency, and a second bandpass filter (31h) having a predetermined carrier frequency fsn in the second recording mode as a center frequency. 31n), a discharge control means (33h) for flowing in or cutting off a current Ih of a first predetermined value according to the presence or absence of the output of the first bandpass filter when a reproduction signal is supplied; A charge / discharge control means (33n) for flowing or inflowing a current In having a second predetermined value smaller than the first predetermined value in accordance with the presence or absence of the output of the bandpass filter; With the connected capacitor (34) Provided is a recording mode discriminating circuit so as to determine the recording mode of the reproduction signal based on the terminal voltage V34 of the capacitor.

F. Operation According to such a configuration, it is easy to implement the IC, and the recording mode is accurately and promptly determined.

G. Embodiment An embodiment of the recording mode discriminating circuit according to the present invention will be described below with reference to FIGS. 1 and 2.

G1 Overall Configuration of One Embodiment FIG. 1 shows the overall configuration of one embodiment of the present invention. In FIG. 1, parts corresponding to those in FIG. 4 are denoted by the same reference numerals, and redundant description will be omitted.

In FIG. 1, reference numeral (30) denotes a recording mode discriminating circuit, to which an input terminal (30i) is supplied with an FM luminance signal YFM from a high-pass filter (3) via a limiter (6). Bandpass filters (31h) and (31n) for the high image quality mode and the standard mode are commonly connected to the input terminal (30i). The center frequencies of the two band filters (31h) and (31n) are, as in the conventional example of FIG. 6 of the present applicant, the upper band frequency fuh in the high image quality mode and the sync chip frequency in the standard mode as follows. Set to fsn respectively.

fuh = 9.8MHz fsn = 4.2MHz The detection circuit (32n) and the charge / discharge control circuit (33n) are connected in cascade with the bandpass filter (31n) in the standard mode.
The discharge control circuit (33h) is connected in cascade to the band filter (31h) for the high image quality mode.

A capacitor (34) is commonly connected to the discharge control circuit (33h) and the charge / discharge control circuit (33n), and the terminal voltage of the capacitor (34) is controlled via the buffer amplifier (35) and the output terminal (30o). The signals are supplied to the changeover switches S1 and S2.

In this embodiment, for example, 0.1
A ceramic capacitor having a relatively small capacity of about μF is used.

 Other configurations are the same as those in FIG.

G2 Configuration of Main Part of One Embodiment FIG. 2 shows a specific configuration of the detection circuit (32n), the discharge control circuit (33h), and the charge / discharge control circuit (33n).

In FIG. 2, for example, a discharge control circuit (33) to which an upper band component of a high image quality mode of a frequency fuh of 9.8 MHz is supplied.
In h), the transistors Q12 and Q13 are differentially connected using the pnp type transistor Q11 as an emitter current source. For example, a bias voltage V1 of 2.5 V is supplied to the base of the transistor Q12, and a bias slightly higher than the voltage V1 is supplied to the base of the transistor Q13. The collector output of the transistor Q13 is supplied to the base of the pnp type quadruple size transistor Q15 via the base / collector of the npn transistor Q14. The collector of this transistor 15 is directly grounded.

Further, for example, in the detection circuit (32n) and the charge / discharge control circuit (33n) to which the signal component of the sync chip frequency fsn in the standard mode of 4.2 MHz is supplied, both are npn-type transistors.
A resistor is connected between the emitters of Q21 and Q22, and an appropriate bias voltage V1 is supplied to each base of transistors Q21 and Q22 to form a phase inversion circuit. Both transistors Q2
1, the collector output of Q22 is appropriately level-shifted via transistors Q23 to Q26 and supplied to the bases of double size transistors Q27 and Q28, respectively, as detectors.

The collectors of both transistors Q27 and Q28 are cant-mirror connected, a pnp type quadruple size transistor Q31 and
Commonly connected to Q32 base. The collector of the transistor Q32 and the collector of the npn-type double size transistor Q33 are connected.
h) is connected to the emitter of a pnp-type quadruple-sized transistor Q15, and a capacitor (3
4) Connected to. In this embodiment, the resistance value of the resistor Rt is set relatively low, for example, about several hundred Ω.

The emitter of the transistor Q33 is connected to the transistors Q27 and Q28
Are connected to the collector of a double size transistor Q5 as a current source. This transistor Q5
Is connected to the base of a transistor Q0 connected in series with the constant current source (36). In this embodiment, the current value of the constant current source (36) is set, for example, as follows.

10 = 100 μA An appropriate bias voltage V1 is supplied to the base of the transistor Q33 by the transistors Q41 to Q45 of the bias setting circuit (40).

The terminal voltage V34 of the capacitor (34) is
The level is appropriately converted by the transistors Q51 to Q55 in 5), and is led out to the terminal (30o).

In order to set the lower limit of the terminal voltage V34, the transistor Q is appropriately connected between the voltage Vrg and the capacitor (34).
56 collector-emitter circuits are interposed.

G3 Operation of One Embodiment The operation of the embodiment of FIG. 1 is as follows.

When there is no signal, the transistors Q13 to Q15 of the discharge control circuit (33h) are turned off by the above-described bias setting (see FIG. 2).

Also, transistors Q27 and Q28 as detectors (32n)
Since the base current does not flow through the current mirror, and hence the collector current does not flow, the current mirror connected transistors Q31 and Q32
No collector current flows. On the other hand, transistor Q2
7, since no base current flows through Q28, the base potential of transistor Q33 increases, and transistor Q33 is turned on. Therefore, the collector current of the transistor Q33 flows from the capacitor (34) via the resistor Rt and the point P, and the capacitor (34) is discharged.

FM luminance signal Y supplied to the recording mode determination circuit (30)
When FM is a signal in the standard mode, a signal component of the sync tip frequency fsn as shown in FIG. 3A is supplied to the detection circuit (32n) via the bandpass filter (31n), and the detection output Is supplied to the charge / discharge control circuit (33n). In this case, the capacitor (34) is charged by the current In from the charge / discharge control circuit (33n), and the terminal voltage 34 increases to the predetermined value Vn. This voltage Vn is supplied to the buffer amplifier (35)
, The level is appropriately converted and supplied to the switches S1 and S2, and both switches S1 and S2 are connected to the n side.

Specifically, the transistors Q27 and Q28 in FIG.
The signal component of sn is detected (both-wave rectification), and a collector current flows through both transistors Q27 and Q28 over the entire period of the signal. On the other hand, the transistor Q33
, The transistor Q33 is turned off. For this reason, the current mirror-connected transistor Q3
Transistors Q27 and Q28 transferred via 1 and Q32
Collector current flows out of the point P and passes through the resistor Rt.
Charge the capacitor (34).

Further, the charging current In is restricted by the current source transistor Q5, and in this embodiment, for example, it becomes as follows.

In = 2 · 10 = 200 μA On the other hand, the FM luminance signal YFM is a signal in the high image quality mode, and as shown in FIG. 5, the lower mth-order band component is close to the sync chip frequency fsn in the standard mode. In some cases,
As described above, based on the detection output of the lower sideband component,
The capacitor (34) is about to be charged by the current In from the charge / discharge control circuit (33n).

However, in this case, as described above, the upper band component that exists simultaneously with the carrier as the center of symmetry is supplied to the discharge control circuit (33h) via the band filter (31n). The discharge control circuit (33
h) is turned on, and a current Ih flows from the capacitor (34) toward the discharge control circuit (33h).

Specifically, the signal component of fuh is supplied, for example, at about 0.5 Vp-p, and the transistor Q12 in FIG. 2 is turned off and the transistor Q13 is turned on for each positive half cycle. Accordingly, the transistors Q14 and Q15 are also turned on.

Therefore, the connection midpoint P between the collectors of the transistors Q32 and Q33 of the charge / discharge control circuit (33n) is grounded via the on-resistance of the transistor Q15 every half cycle of the fuh signal component.

As described above, the transistor Q15 is four times as large and has a current driving capability of, for example, 4 mA.

The current In from the charge / discharge control circuit (33n) is restricted by the transistor Q5.

Thereby, the current Ih of both control circuits (33h) and (33n)
And In, a relationship represented by the following equation (3) is established. As a result, the capacitor (34) is discharged, and its terminal voltage V34 falls to a predetermined value Vh.

Ih {n} (3) As described above, in this embodiment, each recording mode is determined as shown in Table 3 below.

As described above in detail, in this embodiment, a single small-capacitance capacitor is used, and the time constant of the charging / discharging circuit is set to a small value. Is determined.

In the above-described embodiment, the present invention is applied to an 8 mm type VT.
The case of applying to R has been described, but what is called VHS, SVHS
The present invention can be similarly applied to each system employing high-band recording, such as the system and the beta and ED beta systems.

H. Effects of the Invention As described in detail above, according to the present invention, a high current that responds to the presence or absence of each signal component of the predetermined upper band frequency in the high image quality mode and the predetermined carrier frequency in the standard mode, respectively. A discharge control circuit and a small current charge / discharge control circuit, and a capacitor commonly connected to both control circuits are provided, and the recording mode of the reproduction signal is determined based on the terminal voltage of the capacitor. The recording mode discrimination circuit that minimizes the use, facilitates IC conversion, and has a high and low carrier frequency of the FM luminance signal and can accurately and promptly discriminate the standard recording mode is obtained. Can be

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a recording mode discriminating circuit according to the present invention, FIG. 2 is a connection diagram showing a specific configuration of a main part of an embodiment of the present invention, and FIG. FIG. 4 is a block diagram showing a configuration example of a conventional recording mode discriminating circuit, FIG. 5 is a diagram showing a frequency spectrum for explaining an operation of the conventional example, FIG. 6 is a block diagram showing the configuration of another conventional example. (10) is a luminance signal reproducing system, (30) is a recording mode discriminating circuit, (31h) and (31n) are bandpass filters, (33h) is a discharge control circuit, (33n) is a charge / discharge control circuit, and (34) is It is a capacitor.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04N 5/91-5/956

Claims (1)

(57) [Claims] 1. A recording mode discriminating circuit corresponding to reproduced signals in first and second recording modes, wherein a carrier frequency of a luminance signal in a frequency modulation format becomes high / low. A first band-pass filter having a center frequency of an upper band frequency; and a second band-pass filter having a center frequency of a predetermined carrier frequency in the second recording mode, and when the reproduction signal is supplied. Discharge control means for flowing or interrupting a current of a first predetermined value in accordance with the presence or absence of the output of the first bandpass filter; and the first control means in accordance with the presence or absence of the output of the second bandpass filter.
And a capacitor commonly connected to the discharge control means and the charge / discharge control means. The charge / discharge control means supplies or discharges a current having a second predetermined value smaller than the predetermined value. A recording mode discriminating circuit for discriminating a recording mode of the reproduction signal.