JP2754672B2 - Gamma correction circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a gamma correction circuit.

[Summary of the Invention]

The present invention provides a digital gamma correction circuit,
By properly using a look-up table and a bit shift, excellent gamma correction characteristics can be obtained with a simple configuration.

[Conventional technology]

A digital video camera can be configured, for example, as shown in FIG.

That is, in the figure, (1) indicates a CCD for photographing, and a color separation filter (not shown) is provided on the light receiving surface of the CCD (1), and the color separation filter is provided from the CCD (1). An image pickup signal having corresponding color signal components in dot sequence
Sv is taken out.

The signal Sv is supplied to an A / D converter (5) through a signal line of a preamplifier (2) → CDS circuit (3) → AGC circuit (4), for example, one sample is converted into a 10-bit digital signal, The digital imaging signal Sv is supplied to the Y / C separation circuit (11) and separated into a luminance signal Sy and a chrominance signal Sc.

Then, the luminance signal Sy is supplied to a gamma correction circuit (12) and, for example, one sample has a characteristic as shown in FIG.
Gamma correction is performed to the luminance signal Sy of 10 bits (since the signal Sy has 10 bits before gamma correction and 8 bits after correction,
Although there is no value indicated by a circle in the figure, it is illustrated for convenience of explanation. In addition, the mark ● indicates the end point of the curve, indicating that the value may exist. The same applies to the other characteristic diagrams and the description thereof).

The gamma-corrected signal Sy is supplied to a D / A converter (15) through an aperture correction circuit (13) and a noise reduction circuit (14) to be converted into an analog luminance signal Sy. (16).

Further, the color signal Sd from the separation circuit (11) is supplied to a processing circuit (21) to extract three primary color signals R, G, and B. These signals R and B are subjected to gamma correction through a white balance circuit (22). One sample is supplied to the circuit (23) and is gamma-corrected into 8-bit signals R and B similarly to the luminance signal Sy.

Then, the gamma-corrected signals RB are supplied to a matrix circuit (24), and the red and blue color difference signals (R
-Y) and (BY) are formed, and these signals (R-
Y) and (BY) are supplied to an NTSC encoder (25) and encoded into a carrier chrominance signal Sc. This signal Sc is supplied to a D / A converter (26) to be converted into an analog signal, and then converted to a terminal (27). ).

The circuits (11) to (11)
(15), (21) to (26) are integrated into one chip. Also,
When this video camera is integrated with a VTR, the signal Sc
Is the sub-carrier frequency subjected to the low frequency conversion.

By the way, in the gamma correction circuits (12) (and (23)), a polygonal line approximation is performed as a method for obtaining the gamma correction characteristics as shown in FIG.

8-bit × 2 ¹⁰ at address ROM, are prepared the data of all points.

Can be considered.

Reference: JP-A-62-289090, etc. [Problems to be Solved by the Invention] However, in the method described above, for example, when an image of a subject whose gradation is smooth and continuous is taken, the reproduction is performed at an approximate change point of the inclination of the broken line. The screen brightness changes unnaturally.

In this respect, the method of (1) does not cause such unnaturalness, but since the capacity of the ROM is increased, it is disadvantageous when the chain line portion is formed into a one-chip IC, and undesirably increases current consumption.

The present invention seeks to solve these problems.

[Means for solving the problem]

Now, considering the gamma correction curve in FIG. 8, the change in the slope of the curve is large in the section where the i-input / output level is small.

ii In the section where the input / output level is large, the amount of change in the slope is small and close to a straight line.

Therefore, the present invention focuses on these points, and performs gamma correction by using a data table in a memory for sections and performing linear approximation for sections.

[Action]

Gamma correction with excellent characteristics is performed by simple hardware.

〔Example〕

In FIG. 1, (31) represents a ROM for data tables, the ROM (31) which has a capacity of 8 bits × 2 address ^9, Its 0 to 511 addresses, for example, a solid line in Figure 2 A As shown in the figure, the values 0 to 192 are written in correspondence with the section of the gamma correction characteristic (the ROM (31) is up to address 511, but as described for the circle, it is assumed that there is 512 addresses). If that data is the value 192).

Then, the 10-bit luminance signal Sy from the separation circuit (11)
9 bits (b _{8 to} b ₀ ) of (b _{9 to} b ₀ ) excluding the MSB are R
OM (31) is supplied as an address signal. Therefore, from the ROM (31), the signals Sq, as shown in FIG.
That is, when the 10-bit signal Sy changes from the value 0 to the value 512, as shown by the solid line in FIG.
A signal Sq of 8 bits which changes according to the gamma correction characteristic is taken out, and when the signal Sy changes from the value 512 to the value 1024, as shown by a broken line in FIG. Sq is taken out. Note that the signal Sq indicated by a broken line is image data due to the fact that the MSB of the signal Sy is not used as an address signal of the ROM (31).

Then, this signal Sq is supplied to the “0” side contact of the switch circuit (32).

Further, among the signals Sy, 9 bits (b ₈ ~ excluding MSB
b ₀ ) is supplied to a multiplying circuit (33) and a constant, for example, a value of 1/8
From the multiplication circuit (33), when the signal Sm as shown by the broken line in FIG. 2B, that is, when the signal Sy changes from the value 0 to the value 512, and when the signal Sy changes from the value 512 to the value 1024, As shown by the broken lines in FIG.
A signal Sm which changes linearly until the signal Sm is extracted.

Then, when this signal Sm is supplied to the addition circuit (34), a constant, for example, a value 192 is added to the addition circuit (34), and the addition circuit (34) shows a solid line in FIG. 2B. When the signal Sy changes from the value 0 to the value 512, and the value 5
From value 192 to value 2 when changing from 12 to value 1024
A signal Ss varying up to 56 is extracted. In this case, the maximum value of 9 bits b ₈ ~b ₀ excluding the MSB of the signal Sy can take is "511", the constant 1/8 is multiplied by the value 511, the constant 192 is added Therefore, the maximum value of the signal Ss is actually "255" (fractions are rounded down), and therefore, the signal Ss can be represented by 8 bits.

The 8-bit signal Ss is supplied to the switch circuit (3
It is supplied to the "1" side contact of 2).

Further, the MSB (bit b ₉ ) of the signal Sy is connected to the switch circuit (3
The switch output Sw is supplied to 2) as a control signal, and the switch output Sw is supplied to the next-stage aperture correction circuit (13).

According to such a configuration, when the 10-bit signal Sy has a value from 0 to 511, its MSB is "0", so that the switch circuit (32) outputs the signal Sq as shown in FIG. It is taken out as the switch output Sw, and the signal Sy is changed from the value 512 to the value 1
Up to 023, since the MSB is “1”, the signal Ss is extracted as the switch output Sw from the switch circuit (32).

Therefore, the output signal Sw of the switch circuit (32)
Is a gamma-corrected 8-bit luminance signal as shown in FIG.
This means that Sy has been subjected to gamma correction and compressed to 8 bits and extracted.

Thus, according to the present invention, the gamma correction of the luminance signal Sy can be performed. In this case, in particular, according to the present invention, the original luminance signal Sy is divided into a section having a large change amount of the slope and a change amount of the change amount. Since the section is divided into smaller sections, and the section uses the ROM (31), and the section is approximated by a straight line to perform gamma correction, the capacity of the ROM (31) is 8
Bit × 2 ⁹ address, i.e., the 1/2. Therefore, it is advantageous when the chain line portion of the video camera is formed into a one-chip IC, and the current consumption can be reduced.

Further, since a section having a large amount of change in the inclination is obtained from the data table of the ROM (31), the luminance change of the reproduction screen does not become unnatural.

Furthermore, in practice, the constant 1/8 in the multiplication circuit (33)
Is performed by shifting 9 bits b _{8 to} b ₀ excluding the MSB of the signal Sy to the LSB side by 3 bits and shifting the lower 3 bits b _{2 to} b ₀ of the original bits b _{8 to} b ₀ after shifting There is no need to provide a multiplication circuit (33) as hardware, since it is sufficient to discard it.

Also, the addition of a constant 192 in the adding circuit (34), 192 = 128 + 64 = 1 × 2 7 + 1 because it is × 2 ^6, the upper bit b _7, b ₆ bits shifted signal Sm for multiplication " It is only necessary to set it to 11 ", and it is not necessary to provide the adder circuit (34) as hardware.

In other words, the bit “1” is placed above the bits b _{8 to} b ₃ of the signal Sy.
If 1 "is arranged, the signal is Ss, and it is not necessary to provide a multiplication circuit (33) and an addition circuit (34) as hardware.
The gamma correction circuit can be configured simply by providing the M (31) and the switch circuit (32), which is very simple. Moreover, that
The capacity of the ROM (31) may be half as described above.

In the example shown in Figure 3, is the capacity of 8 bits × 2 address ⁸ of ROM (31), in that 0 to 255 address, as shown in FIG. 4, the value of the interval from 0 to 160 is written I have. The lower 8 bits b ₇ ~b ₀ signal Sy is supplied as the address signal to the ROM (31).

Further, Sy is multiplied by 1/8 as shown by the broken line in FIG. 4 to obtain a signal Sm, and a constant 128 is added to this signal Sm to obtain a signal Ss
It is said.

Further, the upper two bits b ₉ and b _{8 of} the signal Sy are ORed (3
5), and its OR output is supplied to the switch circuit (32) as its control signal.

Therefore, in this example, the gamma correction of the characteristic indicated by the solid line in FIG. 4 is performed.

Then, in this example, the capacity of the ROM (31) can be further reduced. Also, there is no need to provide a multiplication circuit (33) and an addition circuit (34) as hardware.

In the example shown in FIG. 5, variable knee characteristics are used.

That, ROM (31) is a 8-bit × 2 address ^9, the values of the section as shown in Figure 6 to the 0 to 511 address 0-192
Is written. Then, 9 bit b ₈ ~b ₀ except the MSB signal Sy is supplied as the address signal to the ROM (31).

Further, the signal Sy is multiplied by 1/8 as shown by a broken line in FIG. 6 to be a signal Sm, and the signal Sm is supplied to an addition circuit (34), and the signal Sy is supplied to a detection circuit (36). Signal Sy
Is obtained, and this signal Sa is supplied to the adding circuit (34). However, at this time, the signal Sa increases as the dynamic range of the signal Sy decreases, and its maximum value is set to “128”.

Therefore, as shown by the solid line in FIG. 6, a signal Ss whose slope is constant but becomes larger as the dynamic range of the signal Sy becomes smaller is extracted from the adder circuit (34).

Then, the signal Ss and the signal Sq from the ROM (31) are compared in the level comparison circuit (37), and a comparison output that becomes “0” when Sq ≦ Ss and “1” when Sq> Ss is obtained. The comparison output and the MSB of the signal Sy are supplied to the switch circuit (32) through the OR circuit (35) as control signals.

Therefore, the signal Sw is the luminance signal Sy subjected to the gamma correction and the luminance signal Sy before the original gamma correction.
Since the level of the signal Ss changes according to the dynamic range of, the knee characteristic of the gamma-corrected luminance signal Sy is
It will change according to the dynamic range.

In the above description, instead of the ROM (31), the RAM may be backed up by a battery and used in a non-volatile manner.

〔The invention's effect〕

According to the present invention, the original luminance signal Sy is divided into a section having a large change amount of the slope and a section having a small change amount,
The ROM (31) is used for the section, and the section is approximated by a straight line for gamma correction.
Capacity 8 bits × 2 ⁹ address of 1), i.e., the 1/2. Therefore, the chain line of the video camera is
This is advantageous in that the current consumption is reduced, and the current consumption can be reduced.

Further, since a section having a large amount of change in the inclination is obtained from the data table of the ROM (31), the luminance change of the reproduction screen does not become unnatural.

Furthermore, in actuality, if the bit “11” is arranged above the bits b _{8 to} b ₃ of the signal Sy, it is the signal Ss, and there is no need to provide a multiplication circuit (33) and an addition circuit (34) as hardware. , A ROM (31) and a switch circuit (32), a gamma correction circuit can be constructed, which is very simple. In addition, the capacity of the ROM (31) may be half as described above.

[Brief description of the drawings]

FIGS. 1, 3, and 5 are system diagrams of an example of the present invention, and FIGS. 2, 4, 6 to 8 are diagrams for explanation thereof. (1) is an imaging CCD, (12) and (23) are gamma correction circuits, (31) is a memory, and (32) is a switch circuit.

Claims (1)

(57) [Claims] 1. A memory for converting lower-order n bits (m ≧ n ≧ 1) of an m-bit (m ≧ 2) input video signal into a non-linear video signal, and at least (m−2) from the MSB side of the input video signal. n)
A linear approximation circuit for linearly approximating bits; a switch circuit for selectively extracting an output signal of the memory and an output signal of the linear approximation circuit; and the switch circuit based on at least MSB of the input video signal. A gamma correction circuit for controlling the input signal to extract a gamma-corrected video signal of the input video signal from the switch circuit.