JP2750469B2 - Semiconductor package - Google Patents

Description

The present invention relates to a semiconductor package, and is used for various electronic components and the like.

[Conventional technology]

Semiconductor packages, especially ceramic packages, are IC
It is widely used for the purpose of chemically, electrically and mechanically protecting semiconductors and LSIs from the outside world. Such packages are:
It is mainly composed of a package base substrate (hereinafter referred to as “base substrate”) and a lid, which are made of a raw material,
What is joined via the joining layer which consists of a seal layer is known.

[Problems to be solved by the invention]

By the way, Au-based alloys (for example, Au-Sn alloys) used as a raw material generally have poor wettability, and due to this, a huge void that leads to the generation of leakage after sealing in the raw material. Often occurs. These voids often occur particularly at the four corners of the lid.

The present invention has been made to solve the above problems, and by controlling the width of the bonding layer between the base substrate and the lid, the generation of voids in the raw material that leads to the occurrence of leakage after sealing has been suppressed. It is an object to provide a semiconductor package.

[Means for solving the problem]

The present invention, the present inventor, in order to solve the above problems,
This was made as a result of intensive studies on the relationship between the width of the bonding layer, the thickness of the Au layer of the composite seal layer (hereinafter simply referred to as the seal layer), the fluidity of the raw material, and the occurrence of voids.

The semiconductor package according to the present invention is characterized in that, in a ceramic package in which a base substrate and a lid are sealed via a bonding layer, the width of the bonding layer is 0.4 to 0.9 mm.

Here, the “width” refers to the width of each side when the planar shape of the bonding layer is quadrangular, and refers to the radial width when the planar shape of the bonding layer is circular.

The reason why the width of the bonding layer is set to 0.4 to 0.9 mm is that if the width is less than 0.4 mm, sealing cannot be performed due to a slight displacement at the time of setting the lid, while if it exceeds 0.9 mm, the width is 75% or more of the width of the bonding layer. This is because voids are generated and sealing is incomplete.

The bonding layer is an Au-based raw material, a substrate-side sealing layer formed on the base substrate and the outermost surface layer is made of an Au layer, and a lid-side sealing layer formed on the lid and having an outermost surface layer made of an Au layer. And heating the two outermost surface layers of Au
May be formed by diffusing into the above-mentioned raw material. This Au-based raw material is used because it has a lower melting point and is more excellent in oxidation resistance than an Ag-based material. Further, as the Au-based raw material, usually, Au-Sn
However, the present invention is not limited to this, and Au-Si-based materials can also be used.

The sealing layer improves the bonding with the raw material, and as a result, improves the bonding strength between the base substrate and the lid. This seal layer is usually a composite layer composed of a W layer or a Mo layer formed on the base substrate and the lid, and a Ni plating layer and an Au plating layer sequentially formed thereon.
The thickness of the Au layer as the outermost layer is preferably 2.0 μm or less. If it exceeds this, large voids may be generated and the sealing property may be reduced.

However, when the base substrate is made of a low-temperature fired ceramic such as crystallized glass, an Au layer can be formed directly on the base substrate. When the lid is made of metal, a high-melting point metal such as a W layer can be used. Layers can be omitted.

In the present invention, the term “semiconductor package” broadly refers to a sealed semiconductor component in which a lid is joined to a base substrate having a container shape or the like. In particular, it is applied to a so-called ceramic package on which an IC chip is mounted, and the form of the package is not particularly limited. For example, a pin grid array type, a side blazed type, a flat type, and the like are variously selected according to the purpose and application. .

[Action]

According to the result of the study of the present invention, as shown in FIG.
At the time of sealing a normal semiconductor package, the pressure by the uniform clip 8 (pressure due to the load at the time of sealing) is hardly applied to the entire lid, and as a result, as shown in FIG.
The raw material begins to melt from the center of each side of the lid, which forms the center of the pressure, and spreads out toward the four corners and the outer periphery of the lid. FIG. 5 shows the results obtained by lowering the set temperature immediately before the melting point of Au-Sn and examining how the melting proceeds. A phase change occurs from the center of each side. It indicates that

Then, the raw material such as Au-Sn melted in this way, as shown in FIG. 6, slows down to reach the outermost portion (particularly, the four corners) of the farthest lid, and this portion is slowed down. Voids 6 are likely to be generated. In the plan view of FIG. 6 after peeling, reference numeral 5 denotes a bonding layer, 4 denotes a sealing layer, and 7 denotes a pad.

The presence / absence of voids may be confirmed visually by peeling the lid from the base substrate in this way, but it is also possible to confirm the presence of voids by transmission X-ray without peeling.

As described above, if the width of the bonding layer exceeds 0.9 mm and is larger than necessary, it is difficult to apply a uniform clipping pressure to the whole, and particularly, in the raw material on the four corners, the occurrence of leakage after sealing. Large voids are likely to be generated.

On the other hand, if the width is reduced, the clip pressure is likely to be evenly applied to various parts of the lid, and in this case, the distance to the outer periphery of the lid is also short. Therefore, the molten raw material moves quickly to the outer periphery of the lid, so that it is less susceptible to an increase in the melting point due to the penetration of Au and a decrease in the fluidity of the raw material. Therefore, if the width of the bonding layer is within a predetermined range (0.4 to 0.9 mm), it is possible to suppress the generation of large voids in the raw material which may cause the occurrence of leakage after sealing, and to ensure the sealing.

Further, when the thickness of the Au layer of the seal layer is reduced, the amount of dissolution into the Au-Sn layer can be reduced, so that the Au-Sn
The fluidity of the layer can be ensured. Therefore, since voids are hardly generated, the sealing property is excellent.

Further, in order to prevent the generation of the void, Au-Sn
The amount of the alloy used was increased and the Au-
The fluidity of Sn can also be improved.

〔Example〕

 Hereinafter, the present invention will be described specifically with reference to examples.

Example 1 In this example, the width of the bonding layer was studied.

First, a base substrate 1 and a lid 2 shown in FIG. 1 are prepared. The base substrate 1 is made of a sintered body containing alumina as a main component, and has a ring-shaped three-layer structure [W metallized layer, Ni plated layer (3.0 μm, intermediate layer) and Au plated layer] (1.5 μm, outermost surface layer)]. The lid 2 is made of Kovar, and on the surface thereof, a lid-side sealing layer 42 composed of a Ni plating layer and an Au plating layer formed thereon is formed. An Au—Sn layer 3 is formed on at least a portion corresponding to the outer peripheral portion of the lid 2. Note that an Au-Sn film (foil) may be inserted and arranged at a predetermined position.

The size of the hole diameter inside the base substrate 1 is set to the value shown in the table, and all of them are PKG type manufactured by Nippon Special Ceramics Co., Ltd. (“pin grid array”, test pieces No. 1 to 12). Was. The lid 2 used had a size such that the bonding layer width, that is, the overlap with the base substrate, was a value shown in the table.

Next, the base substrate 1 and the lid 2 are joined with a base material through a brazing material at 280 ° C. for 5 minutes.
And the lid 2 were bonded to each other to produce each IC package.

Next, for the IC packages of the test pieces Nos. 1 to 12, the presence or absence of voids having a size of 75% or more with respect to the width l of the bonding layer of each IC package was examined. It is shown in the table.

According to the results, test pieces No. 1 and No. 2 (l = 0.2,
(0.3 mm), the width of the bonding layer was too small, and the bonding between the base substrate and the lid itself was not successful.

On the other hand, in the test pieces No. 10 to 12 (l = 1.1 to 1.3 mm), large voids were generated so as to lead to the above-mentioned 75% or more of Au-Sn leakage. In addition, test piece No. 9 (l = 1.0m
In m), the reproducibility was poor and an intermediate performance was shown.

On the other hand, in test pieces No. 3 to 8 (l = 0.4 to 0.9 mm), the above-mentioned voids did not occur and the sealing property was sufficient.

Further, the hole diameter of the base substrate and the width of the bonding layer were examined. As a result, when the hole diameter is 15 to 18 mm, the width of the bonding layer is
0% for 0.9mm or less, 20% for 1.0mm and 1.1mm
Met. When the hole diameter is 12.5 to 15 mm, the width of the bonding layer is 1.
The defect rate was 0% at 0 mm or less, and 30% at 1.1 mm and 1.2 mm, respectively. When the hole diameter was as small as 10 to 12.5 mm, the defect rate was 0% even when the width of the bonding layer was 1.1 mm or less.

As described above, the smaller the hole diameter of the base substrate, that is, the smaller the base substrate, the better the performance even when the width of the bonding layer is large. When the width of the bonding layer is 0.9 mm or less, generation of voids can be reliably suppressed from a small hole diameter to a relatively large hole diameter.

Example 2 In this example, the thicknesses of the Au outermost surface layer and the Ni intermediate layer of the seal layer were examined.

First, as a base substrate, "68PG" manufactured by Nippon
A "was used. The lid is 17 × 17 × 0.25mm SEM
An I ALLOY company having a Ni plating layer 3 μm and an Au plating layer 1.5 μm formed on the surface was used. Au-Sn layer is width
1.05 mm, thickness 0.05 mm.

When the thickness of the Ni intermediate layer was about 3 μm, the thickness of the Au layer was about 1.0, 1.5, 2.0, 2.5, and 4.0 μm, respectively, and a package was manufactured in the same manner as in Example 1.
% Of void-generating samples (defective rate) was examined, and the results are shown in FIG. According to this, when the thickness was 2.0 μm or less, the number of defective products was 10% or less and the sealing was good. On the other hand, at 2.5 μm or more, the defective rate was 30 to 40%. This is because the diffusion of Au into the Au-Sn layer, the amount of melting increases,
It is considered that the composition of the Au-Sn layer fluctuated, and as a result, the melting point increased, and the wettability and fluidity decreased.

When the thickness of the Au layer is 2.25 to 2.5 μm, the third
As shown in the figure, when the thickness of the Ni layer was variously changed between 0.5 and 4.0 μm, the defect rate did not change much.

It should be noted that the present invention is not limited to the specific embodiments described above, but may be variously modified within the scope of the present invention in accordance with the purpose and application. That is, various materials can be selected for the base substrate and the lid, and AlN, 42 Alon, and the like can be used instead of the above-mentioned Al ₂ O ₃ type or Kovar. Further, although a multi-layer wiring substrate is usually used as the base substrate, the present invention is not limited to this, and a single layer may be used. This lid does not need to be multilayered like the above-mentioned base substrate, but may be made of a green sheet like the base substrate.

〔The invention's effect〕

In the present invention, by applying a relatively simple means of controlling the width of the bonding layer between the sealing layer and the lid, generation of a huge void that may lead to leakage is eliminated, and the semiconductor is securely sealed. The package can be provided. And this improves the quality of the semiconductor package, and even if it is used for a long time, or even if it is used in a harsh environment, there is little leakage due to peeling at its joints, cracks, etc., and it has excellent airtightness, It will be excellent in durability and reliability.

In particular, even when the thickness of the Au layer in the seal layer is as small as 2.0 μm or less, the generation of the voids can be effectively suppressed.
Therefore, by controlling not only the width of the bonding portion but also the thickness of the Au layer, it is possible to more easily prevent the occurrence of voids.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an explanatory vertical sectional view of an IC package according to an embodiment;
FIG. 2 is an explanatory diagram showing the relationship between the thickness of the Au layer in the seal layer and the number of defective products, FIG. 3 is an explanatory diagram showing the relationship between the thickness of the Ni layer in the seal layer and the number of defective products, FIG. 4 is an explanatory view showing a state in which a clip pressure is applied, FIG. 5 is an explanatory view showing how fusion proceeds during sealing, and FIG. 6 is an explanatory view showing voids generated at corners of an outer peripheral portion. It is a top view. 1; base substrate, 2; lid, 3; raw material, 41; substrate-side sealing layer, 42; lid-side sealing layer, 5; bonding layer, 6; void.

Claims (3)

(57) [Claims] 1. A semiconductor package in which a package base substrate and a lid are sealed via a bonding layer, wherein the width of the bonding layer is 0.4 to 0.9 mm. 2. The bonding layer according to claim 1, wherein the bonding layer includes an Au-based raw material, a substrate-side sealing layer formed on the base substrate and having an outermost surface layer made of an Au layer, and an outermost layer formed on the lid body being an Au layer. 2. The semiconductor package according to claim 1, wherein Au of the both outermost surface layers is formed by being diffused into the raw material by overlapping and heating the lid-side sealing layer made of. 3. The semiconductor package according to claim 2, wherein the thickness of each Au layer of the substrate-side sealing layer and the lid-side sealing layer is 2.0 μm or less.