JP2744230B2 - Image processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Technical field>   The present invention relates to an image processing apparatus for processing image data.
You. <Conventional technology>   Conventionally, high-density color image data is converted or edited
The processing equipment is Cytec's Response 30
0 Series, Crossfield STUDIO-800 Series
And other printing systems are known.   However, these devices are large and require
There was a disadvantage that the processing time was long. <Purpose>   The present invention has been made in view of the above points, and has been developed for image processing.
2D spatial filtering processing with a simple configuration, and
The purpose is to be able to be effective at high speed.
Divide the image into a number of blocks each consisting of m × m pixels
That stores compressed data representing the image of each block
A data memory, and compressed data from the compressed data memory.
Reading means for reading the pressure, and the pressure read by the reading means.
Decodes compressed data and outputs image data every m lines
Decoding means, and m lines decoded by the decoding means
To perform one-dimensional filtering on each of the image data
Processing means and a one-dimensional filtering process by the processing means.
Processed m lines of image data consisting of m × m pixels
Compression means for compressing each block, and the compression means
Storing the compressed data in the compressed data memory
Storage means for storing the compressed data by the reading means.
Reading compressed data from the data memory in the first direction,
Decoding by the decoding means, and
A one-dimensional file in the first direction by the processing means.
Image processed by filtering and one-dimensional filtering
The data is compressed by the compression means, and the data is compressed by the storage means.
The first image data processing stored in the compressed data memory
And whether the compressed data memory is
Compression data in a second direction orthogonal to the first direction.
Data, and decrypted by the decryption means.
The image data is processed by the processing means in the second direction.
One-dimensional filtering and one-dimensional filtering
The processed image data is compressed by the compression means,
A second data stored in the compressed data memory by the storage means.
Of the compressed data memory by the image data processing of
For the image represented by the stored compressed data
An image processing device that performs two-dimensional spatial filtering
To provide. <Example> (Overview)   Generally, the functions of an image processing apparatus include:   The above two editing functions are required. The former is generally
Called a pipeline processor with hardware
This device has a certain high speed with image editing function
Execute for items that require. Depends on the latter CPU
Processing is performed interactively with humans
Execute (may take some time).   In other words, the former pipeline processor
Affine transformation (enlarge / reduce / transfer)
Motion / rotation) and spatial filtering (image enhancement / smoothing)
Etc.) and images such as color conversion processing by look-up table (LUT)
The sequential processing of images is mainly performed.   The latter CPU processing is generally complicated processing and hardware.
Performs processing that cannot be easily converted to air. Here, the image can be any shape
Or copy the cropped image to another location.
Processing, such as correcting part of an image. these
Is generally a creative process created by the operator.
It takes some time and it is acceptable. However
This function needs to be sophisticated.   Performing the above two editing functions with maximum performance
In order to apply it, the system architecture of the editing device
It is necessary to think from. In other words, both processes are fully functional
To enable high-speed execution, configure the system
System and how image data is handled (formmatsu
G), signal flow, function analysis, etc. need to be considered.
You.   As a result of various studies, the system as a color image editing device
The following conclusions can be drawn as
Was. (1) To perform image editing, the image data must be compressed data
Have as. (2) As a compression method, m × m blocks are represented by one code.
Block coding or vector quantization. (3) In order to perform high-definition image editing,
Image data needs to be rewritten.   In (1), high-resolution and high-gradation image editing processing is performed.
Therefore, the image data capacity becomes extremely enormous.
For example, color reading of A41page with 16pel / mm each 8bit / PIXEL
Data capacity of about 48 Mbytes for R, G, and B colors.
You. The above-mentioned image editing is interactive and
Compression of such color image data for high performance
The key technology is to make it easy to edit. others
The block coding or vector quantization method of (2)
Was determined to be optimal.   This means that m × m pixels of the image are one fixed-length code
High compression ratio and image data
Data can be easily edited because its location information is stored.
It is.   If you have image data using such a compression method,
Is required to perform high-resolution image editing as shown in (3).
To the pixel data within m × m of the compression unit
I noticed that I needed to rewrite it. That is, the vector quantity
A set of code data held in m × m units by the childization method
As a result of editing, depending on the editing item,
We need to change it.   Hereinafter, the present invention will be described in detail based on embodiments. (Detailed description of the embodiment)   FIG. 1 shows the structure of an image editing apparatus according to an embodiment of the present invention.
FIG. Image data read by reader 1
(For example, 8bit digital data for each of R, G, B)
Luminance (Y) signal used for NTSC signal after signal conversion
And color difference signals (I, Q). Such a conversion is for example
R, G, B data It can be obtained by the following matrix calculation. Here the transformation mat
The Rixx coefficient matches the reader's color separation characteristics, γ characteristics, etc.
And amended accordingly. Such Y, I, Q signals are compressed by a compressor
Disk memo for image data file compressed by 2
It is stored in the file 3. The image data on the disk is
Read and process / edit on IC memory called Mori5
It is. Here, basic processing is performed by hardware to perform high-speed processing.
Performed by the integrated pipeline processor 4.
You.   On the other hand, the image data on the image memory 5 is
Seed processing is performed and processing and correction are performed. Editing process is CR
Displayed on color CRT 10 by T controller 9 and edited
You can monitor the situation. The edited result is
Molly 5 returns to original image data through decoder 6
The image data is compatible with the printer by the converter 12.
Color signals (yellow, magenta, cyan, black)
And output to the color printer 7. (Compression encoding)   Next, a method for compressing image data will be described.   Dividing into three color signals of luminance and color difference like Y, I, Q
Better preserves spatial frequency of Y signal as luminance data
If this is done, the spatial frequencies of the I and Q signals
To some extent (cut of high frequency components)
Is known to be small.   Therefore, for example, the I and Q signals are m × m blocks (m is an integer).
The color information is represented by the average value of
A data compression method that reduces the amount of data is conceivable. I, Q signal
The block size depends on the required image quality and the allowable memory capacity.
Select a block size such as 2 x 2, 4 x 4, 6 x 6 depending on the amount
It is. For example, if the block size is 4 × 4,
As mentioned above, the memory capacity of A4 1page 48MByte is 16MB for Y signal.
yte (uncompressed) + I, Q signal 2MByte = 18MByte in total, about 2.7
Compression rate.   On the other hand, resolution of Y signal is different from compression of I and Q signals.
A compression method that leaves sufficient data is required.   The first method is a block coding method.   This method calculates the average value of pixel data x in m × m blocks.
, The standard deviation σ is calculated. Next, the shade information for each pixel
Is represented by about several bits. For example, the calculated value of (x −) / σ
Can be realized by requantizing. This compressed data
The format is as shown in Fig. 2 (a).
Following the quasi-deviation, the density information of each pixel is continued.
The order is made to correspond one-to-one with the pixel position in the block.   The second method is a vector quantization method of m × m pixels.
You.   This method averages the pixel data in m × m blocks
, The standard deviation σ and the code representing the image pattern
It expresses and measures the compression of data. This compression
The data format is as shown in FIG.   In the above, resolution data is taken only for the Y signal, and the
This is an example of taking the average data within m × m.
The IQ signal may be encoded in the same format as the Y signal.
I don't know.   Such a compression mode converts one image consisting of N × N pixels into m
Xm small section, and this mxm is fixed to one k-bit
Compressed image data to convert to fixed length code
Is Memory structure consisting of k bits in the depth direction in the address space of
Take the lead. Therefore, the image address information is retained.
Compression method with variable code length such as normal MH, MMH, MR, MMR
Random access such as image search, writing, etc.
It has good access performance and can be said to be optimal for editing work. (Image rotation processing)   Scale and rotate image data based on the above compressed data
If you try, you need to rewrite the compressed data itself
Become.   FIG. 3 is a view for explaining this, and FIG. 3A shows an image data of m × m pixels.
Indicates the delimiter of the compressed data when the data is compressed. m × m
The image data contained in each unit is directly converted into one code.
You. (In the future, this m × m compressed pixel will be referred to as
It will be referred to as a “stick pixel”. ).   Figure 2 shows the result of rotating the image for each block pixel.
Thus, the letter T is cut in this way.
To avoid this, restore the block pixels as shown in Fig.
To restore the original image data, rotate each pixel
It is necessary to compress again as shown in Fig.
You.   At this time, the m × m pixel unit A to be compressed shown in FIG.
After the transfer operation, the image is transformed as shown in A '
Straddle between elementary units.   That is, in order to perform high definition Needs to be converted.   Now consider the case of rotating the image,
When rotating back to image data of
Memory capacity for storing the original image data
The amount becomes extremely large. 48Mb on par with the worst image data
An intermediate buffer of yte data capacity is required.   Also, two-dimensional image conversion and spatial filtering
When processing is performed directly in two dimensions as in the conventional case,
There is a problem that it becomes more complicated than a dimensional processing circuit
Was.   Such decoding → rotation → compression decoding or decoding → space file
Very simple operation of filtering → compression decoding
Examples will be described below.   First, the method of rotation will be described. Generally any angle
The rotation of θ can be realized by the following affine transformation.   here Is the coordinates of the image before rotation, Is the coordinates of the rotated image, and θ is the rotation angle. This two-dimensional
After conversion, the coordinates of the image before rotation Is at the address point of the image data (which can be expressed as an integer)
Is the coordinates of the rotated image Is generally irrational. Therefore high rotation
To do with precision, some non-integer coordinates Address point of data after rotation from data of (Integer) data must be obtained by two-dimensional interpolation
No. Also, the data obtained as a result of rotation as shown in FIG.
A considerable amount of capacity, as it is not trivial to clean in m units
Without the intermediate buffer, recompression becomes difficult. So 2
Equation (1) of the dimensional affine transformation is expressed as follows in the x direction and the y direction.
Into two products.   First one-dimensional x-direction transformation T₁Then:   That is, one-dimensional conversion T₁The value of y does not change,
The width in the direction is reduced by a factor of cosθ. Diagram 4
The rectangle in (a) is a one-dimensional conversion T in the x direction.₁And as in (b)
Be transformed. Next, the one-dimensional conversion T in the second y direction_TwoSo next
Become like   That is, one-dimensional conversion T in the y direction_TwoThen, FIG. 4 (b)
From (c), the value of x does not change and the width in the y direction is 1 /
The image (c) enlarged by cos θ times and rotated by the angle θ is
can get.   As described above, the one-dimensional conversion T in the x direction₁Then, 1 in the x direction
If the line data is read, the coordinates of the converted data will be
Data of the address point of the converted image
Can be obtained by one-dimensional interpolation. That is, in the x direction
Processing on a line-by-line basis is possible. Therefore, one-dimensional change
Exchange T₁Collecting m lines of processing results of
Shrinkage is easily possible. Similarly, one-dimensional conversion T in the y direction_TwoTo
Also, one line of data in the y direction is read out and one line is read.
In-unit processing is possible. However, compressed data is stored
Memory (5 in FIG. 1) in two directions, x-direction and y-direction.
The configuration must be accessible.   Next, compressed data → decoding → rotation → compression encoding or compression
Conversion of data → decoding → spatial filtering → compression coding
Will be described based on the embodiment shown in FIGS.
I will tell.   FIG. 5A shows compressed data → decoding → rotation → compression code.
FIG. 2 is a block diagram of the entire circuit configuration for performing the conversion. Compressed data
The data area is the data area that will be the input data,
Data are stored in two areas 511 and 512.
Have been. The CPU 8 becomes the input data before executing the processing.
Select the data area to be specified by instructing the selector 521.
You. The selector 521 responds to the signal 502 from the CPU 8 to
Address memory 1 and 2 (511 and 512)
Input to the input data side memory address 591 and the data
Connect the input line to the compressed data line 503 on the input side.
One of the address lines is the output data side memory address 59
2 and data line to output compressed data line 501
And both the 511 and 512 address buses and
Disconnect all data buses (high impedance state
Yes) three different states.   Thereafter, 521 stores the compressed data memory 1 in the input data
And the compressed data memory 2 as the output data memory.
The description will proceed assuming that they are connected. Address calculation times
The path 57 connects the main-scanning synchronous clock and the sub-scanning synchronous clock.
The input data address 59 of the input compressed data memory
1 and output compressed data to which the processed data should be output
Output data address 592 to memory and during processing
Outputs the necessary addresses 593, 594 in the intermediate buffer.
You. The compression memory 511 corresponds to the input data address 591
The data is output to the input side compressed data line 503, and the
3 decodes this and passes through selector 522 to intermediate memory 1 or
2 (541 or 542). Selector 522 sets the value of 593
toggle intermediate memories 1 and 2 each time it becomes a multiple of m.
Change over. Selector 523 operates similarly to 522, except that 522
Is connected to the intermediate memory 2 when the
When 522 connects intermediate memory 2, intermediate memory 1
522 and 523 connect the data bus to 541 and 5
It alternates to 42. Also, here m
Let's take the case of = 4 as an example. 591 is an ad
The main scan address and the sub scan address.
Each address of the address is 3 bits counting from the lower bit
Eyes (ie 2_TwoBit) or more bits only
Things. Also, the input side intermediate buffer address 593
Indicates that the sub-scanning address is 3 bits counted from the lower bit.
Only the first bit is input to selectors 522 and 523,
Main scanning addresses are stored in the intermediate memories 1 and 2 (541 and 542).
Only have been entered. Intermediate memories 1 and 2 are
It consists of a line buffer for 4 rasters,
Raster output to one of the intermediate memories through selector 522
Is output. The same intermediate buffer on the input side
The toe address is input, and one of the intermediate memories
The decrypted data is written to the address. On the other hand,
From the same main scanning address of the other intermediate memory, four
Decrypted data one block line before each line buffer
The data is input to the selector 526 through the selector 523. Choice
Unit 526 is preset by CPU8,
Either interpolation processing circuit 57 or spatial filter 58
Select one of them, and output 523. The selector 527 is a selector
As with 526, 57 or 58
Select one and flow to 524. In this case, 526 and 527 are 57 and 5
8 set to choose the same one
It is. The interpolation processing circuit 55 is provided with an intermediate buffer on the output side of the 594.
Decimal number of main scan address (consisting of integer part and decimal part)
Inputs and outputs for each of the four line buffer outputs
To create interpolated data from two consecutive data
And the intermediate corresponding to the address given by the integer part of 594
Output to memory 3 or 4 through selectors 527 and 524
go. The one-dimensional spatial filtering circuit 58 is shown in FIG.
It consists of four one-dimensional spatial filters
One raster corresponds to one raster. For each raster
One-dimensional spatial filtering is performed, and the intermediate memory 3 is also
Or 4 through selectors 527 and 524. Choice
Units 524 and 525 are similar to the selectors 522 and 523 described above.
This is a selector pair for selecting the keys 3 and 4 by toggle. This and
524 and 525 are the output intermediate buffer address 594.
The third bit counted from the lower bit of the sub-scanning address
One bit is input as a selection signal. Intermediate note
The addresses 3 and 4 have the same intermediate buffer address on the output side.
The main scanning address is input, and one of the memories has
Data from interpolation processing circuit or one-dimensional spatial filter
The data from the ring processing circuit is
From the other memory, the interpolated data one block before
Alternatively, the data from the one-dimensional spatial filtering
The compressor 56 in parallel with the 4 rasters through the selector 525
Is output to The compressor 56 receives the data and
When data for 4 pixels is input from each of the rasters,
Output compressed data to selector 521 via output compressed data bus 501
Output. The selector 521 compresses the data on the data bus 501.
Output compressed data address 5 of compressed data memory 2 (512)
Output to the address specified by 92.   Next, the address operation circuit 57 will be described. Fig. 6
As shown in the figure, 57 is a clock switching unit 61, an address calculation unit.
62, comprising output switching units 63 and 66 and counters 64 and 65. Above
Rotate the input side address (x, y) and output side
(X, Y), the relationship of equation (1) holds.
I do. At this time, the rotation operation is divided into two terms as shown in equation (2).
And the address on the way is (X ', Y'),
When decomposed as in equations (3) and (5),
Equations (4) and (6) can be written. Also, the sub scanning
The main scanning clock of the y-th raster is x-th.
When treating pixels as (x, y) pixels, Y ′ = Y ′ (y) = y (4) − X ′ = X ′ (x, y) = xcos θ−ysin θ X '(0,0) = 0 ... (4)- X ′ (0, j + 1) = (j + 1) · (−sin θ) = J · (-sin θ) + 1 · (−sin θ) = X ′ (0, j) + 1 · (−sin θ) (4) − X '(i + 1, j + 1) = X' (0, j + 1) + (i + 1) co
s θ = X '(0, j + 1) + i · cos θ + cos θ = X ′ (i, j + 1) + cos θ (4) − It is.   Therefore, the operation of equation (3), Y ', is the sub-scanning synchronous clock.
Can be calculated simply by counting
No matter how many main scan synchronization clocks are included in the data. Yo
Therefore, the address calculation unit 62, as shown in FIG.
The sub-scan synchronous clock is counted up by the counter 76.
Y ′. In addition, 711 is previously determined by the CPU.
The value of sinθ is set and 731 is set to 0 as the initial value.
Is set. The adder 721 controls the sub-scanning clock.
Each time it is entered, the value stored in 731 and the value stored in 711 are added
And outputs the sum. 731 latches the output value,
Hold as a new value and execute calculation of (4) -expression
You. Next, 732 is set to 0 by the CPU as an initial value.
Adder 722 determines the value held in 732 and the value held in 712.
Is added each time the main scanning clock is input.
Perform calculations. The selector 74 indicates that the sub-scanning clock has entered.
731 output is selected and output only, and 722 output is selected
Power. 732 is the main scanning clock or sub-scanning
When at least one of the clocks is input, the output of the selector 74 is output.
Latch the force and calculate the result of (4)-or (4)-
It is taken as X 'as appropriate.   Next, in equation (6), similarly, X = X (X ′) = X ′ (6) − Y = Y (X ′, Y ′) = X′tanθ + Y ′ / cosθ Y (0,0) = 0 ... (6)- Y (i + 1,0) = (i + 1) tan θ = I · tanθ + tanθ = Y (i, 0) + tanθ (6)-Becomes   In this case, the operation of equation (5) is the main run of equation (3).
The scan sync clock and sub-scan sync clock are interchanged
The same discussion holds true in the same way. So in this case
CPU8 switches between 61, 63 and 66 in advance,
Also, the values set in 711 and 712 are also tanθ and
1 / cos θ. This is shown in FIG. 7 (B).   Also, the compressed data address is input to the input side and the input side.
And intermediate buffer addresses are provided
The buffer is the main run of the compressed data memory in the case of formula (3).
The scanning address and sub-scanning address are assigned to the main scanning
And as the same address on the sub-scanning side,
In the case of execution of the expression (5), the main scan of the compressed data memory
Set the address direction to the address of the intermediate buffer in the sub-scanning direction.
Intermediate buffer in the sub-scanning address direction of the compressed data memory
To be used in correspondence with the address in the main scanning direction.
You. This allows the intermediate buffer to be a raster buffer.
However, in the case of the equations (3) and (5),
Available. In addition, one-dimensional spatial filtering
During execution, the CPU 8 sets 0 to 711 and 1 to 712.
Things.   Next, the interpolation processing circuit 55 will be described. Interpolation times
The path 55 has the decrypted data and the output intermediate buffer address.
Fraction of 594 (2^-1Second place, 2^-2Place and 2^-3Each rank
Tut) and 2 of the integer part⁰4 bits in total
Is entered. The interpolation processing circuit 55 is configured as shown in FIG.
4 sets of 801 parts and other parts 1 of the circuit configured in
Each of the 801 parts, each of the four rasters
Each raster corresponds to one raster and operates in parallel. Fig. 8
Circuit holds two successive data of the decrypted data
811,812 for output and intermediate buffer address on output side
802 part that detects whether the integer part of the source has changed
And the interpolation coefficient from the decimal part of the output side intermediate buffer address
803 that outputs the 802 is the output side intermediate buffer
The least significant bit of the integer part indicates whether the integer part of the dress has changed.
Toe (2⁰Bit in the second digit changes from the previous timing.
It is output by detecting whether it has been converted. 803
Is the output intermediate buffer address of the two consecutive clocks.
From the decimal part, (1−α ′) V (n) + α′V (n−1) (7) Here, V (i) is represented by the decoded data of the i-th clock.
Interpolation coefficients α 'and 1-
α ′ is output. 821 is the output of two consecutive clocks
Enter the decimal part of the side intermediate buffer address, α 'and
This is a lookup table for outputting 1-α '.   (1-α ') V (n) in the equation (7) is converted to 822
In the table, α'V (n-1) is increased to 823
Output each in the table, and use the adder of 83
Will be obtained. Obtained result, output 802 of 84
In synchronization with the intermediate memory 3 through selectors 527 and 524
Or 4 is output.   Next, the one-dimensional spatial filtering circuit shown in FIG.
Will be explained. Corresponding to the i-th pixel of the one-dimensional spatial filter
V ′ (i), and the input of the i-th pixel is V (i).
Then V ′ (i) = β_TwoV (i-2) + β₁V (i-1) + β₀
V (i) + β₁V (i + 1) + β_TwoV (i + 2) It is to realize the relationship. Where β₀, Β₁, Β
_TwoIs a filter coefficient. Before the CPU 8 executes the processing
And β₀, Β₁, Β_TwoIs set. In addition,
It has four latches, each of which has a main scan synchronous clock.
Latch 941 and latch 941
Latching, 942 Latching 941, Latching Value, 94
3 is the value of 942, 944 is the value of 943.
Values are latched. As a result, V (i-2), V
(I−1),..., V (i + 2) are obtained. Also, LUT921 ~
925 is the corresponding filter coefficient (β_Two, Β₁, Β₀) And pair
Ruth that inputs the corresponding image data V and outputs the product
It is a cup table. Adders 931 to 934 are provided for each LUT.
The outputs are sequentially added to obtain V '.   The series of operations has been described above.
Inter-memory 3 and 4 are all smaller than 4 raster raster buffers.
522, 523 and 524, 525
Are switched every four main scanning clocks
In this configuration, the memory for four pixels is made up of four buffers.
Of course, it can be handled.   Also, the selector 526 in FIG.
As shown in FIG. 5B, the output of the selector 523 is set to both 55 and 58.
And select one of 55 and 58 outputs.
Of course, it may be possible.   The compressed data memories 1 and 2 are physically the same.
The input compressed data is read in time-division
Used as data memory, and when writing, output compressed data
It can be used as a memory. Input compressed data
Is read into the intermediate memory at the time of reading. When writing
Contains the input data area other than the data area
Is not output from Equations (3) and (5).
Is.   As described above, rotation processing of compressed pixel data is extremely easy.
It becomes possible.   In this embodiment, the rotation processing has been described.
However, the present invention is of course applicable to other processing such as scaling processing.
You. <Effect>   As described above, according to the present invention, an image is
For images represented by compressed data compressed in elementary units
The two-dimensional spatial filtering process to be performed in the first direction.
A one-dimensional filtering process,
One-dimensional filtering in the second direction.
For each one-dimensional filtering process.
To store the compressed data stored in the compressed data memory.
The direction of each one-dimensional filtering process
What is necessary is just to decode sequentially m lines at a time.
Decode all compressed data to be subjected to ring processing all at once
No need to save, so keep all decoded image data
There is no need to provide a large amount of memory
Simple two-dimensional spatial filtering of images
And can be executed at high speed.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an image processing apparatus according to the present embodiment, FIG. 2 is a diagram showing a block coding and vector quantization data format, and FIG. FIG. 4 is an explanatory diagram of a method of rotating an image, FIG. 4 is an explanatory diagram of a method of rotating an image by one-dimensional conversion, FIGS. 5 (A) and (B) are image processing block diagrams,
FIG. 6 is an address calculation circuit diagram, FIGS. 7A and 7B are circuit diagrams of an address calculation section, FIG. 8 is an interpolation processing circuit diagram, and FIG. 9 is a one-dimensional spatial filtering circuit diagram.

Continuation of front page    (72) Inventor Naoto Kawamura               3-30-2 Shimomaruko, Ota-ku, Tokyo               Inside Canon Inc.                (56) References JP-A-60-97474 (JP, A)                 Japanese Patent Laid-Open No. Sho 60-133491 (JP, A)                 JP-A-60-207976 (JP, A)                 JP-A-59-81962 (JP, A)

Claims (1)

(57) [Claims] A compressed data memory storing compressed data representing an image of each block obtained by dividing an image into a plurality of blocks each including m × m pixels; reading means for reading compressed data from the compressed data memory; reading by the reading means Decrypts the compressed data
Decoding means for outputting image data for each line; processing means for performing one-dimensional filtering on each of the m lines of image data decoded by the decoding means; m which has been subjected to one-dimensional filtering by the processing means.
Compression means for compressing the image data of the line for each block of m × m pixels; and storage means for storing the compressed data compressed by the compression means in the compressed data memory. The compressed data is read from the compressed data memory in the first direction, decoded by the decoding means, and the decoded image data is subjected to one-dimensional filtering in the first direction by the processing means. A first image data process for compressing the compressed image data by the compression means and storing the compressed image data in the compressed data memory by the storage means; The compressed data is read out in the direction of, decoded by the decoding means, and the decoded image data is sent to the processing means. A one-dimensional filtering process with respect to the second direction, the image data subjected to the one-dimensional filtering process is compressed by the compression unit, and the second image data process is stored in the compressed data memory by the storage unit. An image processing apparatus for performing two-dimensional spatial filtering on an image represented by compressed data stored in the compressed data memory.