JP2821452B2 - Color image processing method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION [0001] The present invention relates to color image data.
Image processing method that determines the processing conditions of the processing applied to
About the law. 2. Description of the Related Art In the field of color printing,
In determining processing conditions such as color correction,
Print under multiple processing conditions
It was common to select the matter. [0003] However, this problem
Such an adjustment method requires labor and cost for adjustment.
There was a problem that. On the other hand, in order to solve such a problem,
It is conceivable to determine processing conditions on a monitor. However, in particular, the processing conditions for color images are determined.
The color image data to be processed.
Try to determine the processing conditions on the monitor by changing the
Data processing takes time or data degradation
Problems arise. [0006] Accordingly, the present invention provides a process for color images.
Color processing that can efficiently determine processing conditions
The purpose is to provide a management method. Means for Solving the Problems To solve the above problems,
Therefore, the present invention is based on each of a plurality of color image data.
A color image is displayed on display means (for example, in this embodiment, FIG.
(Corresponding to the color CTR 10 shown in FIG.
Color correction processing for a color image displayed on the display means
For color correction processing according to the instruction.
Performed on the color image (for example, in this embodiment,
18), the color correction processing
(For example, in this embodiment,
Corresponds to step 220 shown in FIG. 18).
Contour correction processing for the color image displayed on the display means
For the contour correction process according to the instruction
Is performed on the color image (for example, in this embodiment,
This corresponds to step 217 shown in FIG.
The contour correction conditions corresponding to the processing are stored (for example,
In the example, this corresponds to step 221 shown in FIG.
A low-resolution camera based on each of a plurality of color image data
Color image and generate the low-resolution color image
Combined on the display means (for example, in this embodiment,
16), the display means
Color corresponding to the low-resolution color image synthesized above
The color correction condition or the contour correction for image data
Perform processing based on the positive condition (for example, in this embodiment,
16), the color image
Output data as a high-resolution color image (for example,
For example, in this embodiment, this corresponds to step 206 shown in FIG.
Do). Also, to solve the above problems
Therefore, according to the present invention, each of a plurality of color image data is imaged.
To each of the plurality of color image data.
Means for displaying a color image based on (for example, in this embodiment,
Corresponds to the color CTR 10 shown in FIG. 1)
For the color image displayed on the display means.
An instruction for a color correction process is received, and a color according to the instruction is received.
Correction processing is performed on the color image (for example,
In the example, this corresponds to step 216 shown in FIG. 18).
The color correction conditions corresponding to the color correction processing are stored (for example,
In the embodiment, this corresponds to step 220 shown in FIG.
The color image displayed on the display means.
Received an instruction for contour correction processing and followed the instruction
Contour correction processing is performed on the color image (for example,
In the embodiment, this corresponds to step 217 shown in FIG.
), And stores contour correction conditions corresponding to the contour correction processing.
(For example, in this embodiment, step 221 shown in FIG.
), The color correction condition or the contour correction condition.
A plurality of color images to be processed based on the
The synthesis is performed on the stage (for example, in the present embodiment, as shown in FIG.
On the display means.
Combined color image as high resolution color image
Output (for example, in the present embodiment, the step shown in FIG. 16).
(Corresponding to the loop 206). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Generally, as a function of an image editing apparatus,
Requires two editing functions more than software processing by a high-speed processing CPU by a hardware circuit. The former is generally
It is said to be a pipeline processor by hardware
Therefore, in this device, a certain high-speed
Execute the required items. By the latter CPU
Processing is performed interactively with humans
Execute (may take some time). That is, the former pipeline processor
Is an affine transformation (extended
Large / Reduced / Move / Rotate) and Spatial Filtering (Image
Emphasis, smoothing, etc.) and look up table (L
UT) mainly for sequential processing of images such as color conversion processing
Do. The processing by the latter CPU is generally a complicated processing.
Perform processing that is difficult to implement in hardware. Here is the picture
Cut an image into an arbitrary shape, or
Processing such as copying to a location,
As expected. These processes are generally created by the operator
It is an active process, and it can be tolerated even if it takes some time
You. However, this function needs to be sophisticated. [0011] The above two editing processing functions have the maximum performance.
In order to implement it on a monthly basis, a system architect
You need to think from the architecture. That is, both processes are sufficient.
To enable high-speed execution of high-level functions, configure
System system, how to hold image data
Analysis), signal flow, function analysis, etc.
It is necessary. As a result of various studies, a color image editing device was
The following conclusions were made for all system architectures:
Was obtained. (1) In order to perform image editing, image data
Has as compressed data. (2) As a compression method, an m × m block
Vector quantization having a symbol as one code is preferable. In (1), high resolution and high gradation image editing
In order to perform the processing, the image data capacity is extremely huge.
It will be great. For example, A4, 1 page is 16 pel / mm
When reading color with, about 48 Mb for R, G and B colors
Data capacity. The image editing described earlier
-To perform operatively and highly functionally, such color
It is important to compress image data to make it easy to edit
Technology. For this purpose, the vector quantization method (2)
Was determined to be optimal. Based on the above conclusions, the system architecture
High-performance, high-performance, high-speed image editing processor
Is realized. The following description is based on an embodiment applied to color processing.
This will be described in detail. (Embodiment) FIG. 1 shows an embodiment of the present invention.
1 is a configuration diagram of an image editing device. Read by reader 1
Taken image data (for example, R, G, B 8-bit digital
Signal is converted by the converter 11 into NTSC
Luminance (Y) signal and color difference signal (I, Q) used in the signal
Is converted to Such conversion is, for example, data of R, G, B
[0019] [outside 1] Is obtained by the following matrix calculation. Here the transformation mat
The Rix coefficient matches the reader's color separation characteristics, r characteristics, etc.
And amended accordingly. Such Y, I, Q signals are applied to the
Disk for image data file compressed by compressor 2
Stored in the memory 3. The image data in the disc is Im
Age memory 5-1 and 5-2 on the IC memory
Is read and processed / edited. Therefore, perform high-speed processing
Basic processing is hardware pipelined
One image memo from the disk by Secer 4
Transfer from the memory to the other Image
Transfer of data as raster data to memory
In the process, it is edited and developed. On the other hand, image data on the image memory 5
Is processed and corrected by the CPU 8
It is. The editing process is performed in color by the CRT controller 9.
It is displayed on CRT10, and you can monitor the editing status.
You. The edited result is transmitted from the image memory 5 to the decoder 6.
The image data is returned to the original image data
If the image data is a color signal corresponding to the printer (Yellow
w, Magenta, Cyan, Black)
Is output to the Color Printer 7. this
At the time, the CP corresponding to the flow of the pre-processing data and the post-processing data
U8 instructs input / output controls 13-1 and 13-2.
To control the data flow path. Next, a method for compressing image data will be described.
Dividing into three color signals of luminance and color difference like Y, I, Q
The spatial frequency of the Y signal as luminance data
If it exists, the spatial frequency of I and Q signals which are color difference signals
Is to some extent (cut high frequency components)
It is known that image deterioration is small. Therefore, for example, the I and Q signals are m × m blocks.
The color information is represented by the average value of
A data compression method for reducing the amount of image data is conceivable.
The block size of the I and Q signals depends on the required image quality and tolerance.
Depending on the memory capacity used, blocks such as 2 × 2, 4 × 4, 6 × 6
The lock size is chosen. For example, 4 ×
4 is A4, 1 page memory as described above.
The capacity of 48 MByte is a Y signal of 16 MByte + I, Q
Signal 2 MByte = 18 MByte in total, about 2.7
Compression rate. On the other hand, for the Y signal, the compression of the I and Q signals
It needs a compression method that leaves enough resolution data
Become. The first method is a block coding method.
You. This method uses pixel data in an m × m block.
An average value x of x and a standard deviation σ are calculated. Next, for each pixel
Is expressed by about several bits. For example, (xx)
This can be realized by requantizing the calculated value of / σ. This
The compressed data format of is as shown in FIG.
Following the average value and standard deviation, the density information of each pixel follows.
The order of shading information corresponds one-to-one to pixel positions in the block
Let it. Therefore, the order of the shade information is changed.
To perform pixel rotation within a block.
it can. The second method is a vector quantum of m × m pixels.
It is a generalization technique. This method uses pixel data in an m × m block.
Is the average value x, the standard deviation σ and the code representing the rotation of the image.
And the code representing the image pattern,
It measures data compression. This compressed data format
The mat is as shown in FIG. Here is the rotation
A code is, for example, a pixel pattern in an m × m block.
Rotated 90 °, 180 °, 270 °
In vector quantization using turn codes,
This code represents an angle. In this embodiment, 0 °, 90 °
°, 180 °, 270 ° 4 patterns 2 bits
It is. In this method, a rotating code is operated.
This enables the rotation of the pixels in the block. Next, the affine transformation will be described. In the affine transformation, the image is enlarged, reduced, or moved.
・ Perform rotation. Address on the input memory of the input image
To (x _S , Y _S ), The magnification in the main scanning direction is α,
The direction reduction ratio is β, the rotation angle is φ, and the rotation center coordinate is
(X _C , Y _C ), The movement amount in the main scanning direction is x _m , Sub-scanning method
The amount of movement in the direction _m And the address in the output memory
(X _D , Y _D ), The following relational expression holds. [Outside 2] X _D , Y _D Is given, according to
x _S , Y _S In search of This is, for example, the structure shown in FIG.
Can be realized. Hereinafter, description will be given with reference to FIG. x _S To
When calculating according to the formula, the initial value offset (direct
The current value is set in the register 31 as an initial value. Ma
The sub-scanning synchronization increment value and the main scanning synchronization increment value are
Set in registers 32 and 37. This set of values
Is executed by the CPU according to the reduction ratio and the rotation angle.
You. FIG. 4 shows the page synchronization signal and the sub-scan synchronization of the circuit of FIG.
Timing chart showing the relationship between signal and main scanning synchronization signal
It is. Sub-scan due to falling of page synchronization signal
Number of scan lines existing in the page after generation of synchronization signal started
Occurs in minutes. When the sub-scan sync signal falls, the main
A scan synchronization signal is generated and the number of data exists within the scan line.
Only happens. These signals are output from a synchronization signal (not shown).
Generated by the raw circuit. Page synchronization signal is Low
During the bell 33 selectors hold 31 initial value registers
The value to be output. The adder 34 generates the sub-scan synchronization signal.
Addition is performed by falling. 34 output is sub-scan
Latched to 35 by latch synchronization. 36 is
35 outputs while the sub-scanning synchronizing signal is at the low level.
Is output. The 38 adders have 36 outputs and 37 main
The scan synchronization increment value is added by the fall of the main scan synchronization signal.
Calculation is performed, and the output is the rising edge of the main scanning synchronization signal.
Latched at 39. The latch 35
The data at the beginning of the check line holds the corresponding input address
The latch 39 is connected to the corresponding input side of each data in the scanning line.
Give the address of y _S Also according to the formula
It can be determined similarly. The address thus obtained is cos φ, si
Since nφ and the like are generally irrational numbers, they are irrational numbers. Real
On the machine, it is a decimal with a sufficient number of bits. This decimal
Set an integer address near the address as the input address.
Confuse. That is, x _S And y _S Truncated (ie,
Integer part only)
Output side address (X _D y _D ) Point data.
Figure 5 shows the addresses of the source and destination
Is shown. Square grid is the destination
Side address grid, the center of the square is the integer address
Dress. The parallelogram grid is the source address
The grid is shown and the center of the parallelogram is an integer address.
is there. Point A (X _D y _D ), The point b is determined.
The data of point A is defined by the data of point b. Affine transformation algorithm in this embodiment
As mentioned above, the raster
(In this case, the data read sequentially from the file)
Output. At this time, the source memory (in this case,
Original data input by random access to
Will be done. So the affine transformation hardware is a pipe
Because it is lined, from the source side image memory,
Data transfer to destination-side image memory
It is executed in the process of
You. Here, the image data refers to the above-described compressed data,
The response point is the coordinates in the address space of the compressed data.
To tell. Affine data after affine transformation of encoded data
Once the dress is determined, the image data in the block is
Perform a placement swap. The embodiment will be described below with reference to 2 × 2 blocks.
You. FIG. 6A shows five blocks (A,
B, C, D). In this block
On the other hand, 90 °, 180 °, and 270 ° times per block
An address is generated by the above-described rotation processing, and the
Record in the destination memory and play it back
(B), (c), and (d) of FIG. Same figure
As is evident, the original was not faithfully reproduced. Therefore
A method to rotate the pixels inside the block according to the rotation angle
Take. (E), (f), and (g) in FIG.
In this example, pixels are rotated by 90 °, 180 °, and 270 °.
And increase the fidelity to the original. This rotation operation
Is a 2-bit rotation code using the code shown in FIG.
Can be implemented without rewriting the pattern code.
You. With respect to rotation at an arbitrary angle, the rotation angle is in units of 90 °.
Corresponds to different rotation angles in the block. FIG. 7 shows a rotation angle of 3
15 ° to 45 °, 45 ° to 135 °, 135 ° to 225
°, 225 ° to 315 °
Assign inner rotation to 0 °, 90 °, 180 °, 270 °
An example is shown. FIG. 8 is a block diagram showing the block code shown in FIG.
Data format is specified by the rotation angle in the block.
This is an embodiment in which the data is reformatted instead. (A) 0 °
(B) 90 ° (c) 180 ° (d) 270 ° is shown.
x and σ are not changed by rotation, and
The order of the light data is changed. (A) 0 ° data format
-When the mat is ABCD, (b) 90 ° is BDAC,
(C) 180 ° is DCBA, (d) 270 ° is CADB
Becomes FIG. 9 shows a data format change in a block.
5 is an embodiment of a conversion circuit. Input signal buffers x and σ
80, the remaining four shade data are stored in buffers 81, 82,
83 and 84 are separately held. Selectors 85, 86,
87 and 89 are controlled by a controller (not shown) according to the rotation angle.
Rect signal is sent. For example, the rotation angle in the block is 0 °,
90 °, 180 °, 270 ° are 0, 1, 2, 3 respectively
Corresponds to a 2-bit select signal. Hubat
The outputs of the fas 81, 82, 83, 84 are A, B, C, D
And the input terminals X, X of selectors 85, 86, 87, 88
Y, Z, and W are connected so as to have different correspondences. C
If there is only one rect signal, the input terminal Y
Output from the output terminal of the buffer 8
B, D, A, and C are output from 5,86,87,88, respectively.
Will be empowered. This output value is stored in buffer 90.
Rejoining with x and σ, the data as shown in FIG.
The data format is completed and the output signal of the buffer 90 is
And output. The above is the block rotation of the encoded data and
It is an Example of rotation in a block. That is, in this embodiment,
Is m × m compression when performing AFFINE transformation with rotation
Perform rotation operation with data as one data,
And rotate operation within m × m compressed data
It is performed in a combination of things. This is accompanied by some image quality degradation.
In order to minimize the luminance signal (Y), a small matrix (m
₀ × m ₀ ) Performs block coding or vector quantization.
U. The color difference signals (I, Q) are compared with each other.
Human eye does not need high resolution
Rix (m ₁ × m ₁ : M ₁ > M ₀ ) With block coding
Alternatively, it has vector quantization or direct average data. It is necessary to pay attention to the above two points. Next, the CRT controller 9 will be described.
I do. FIG. 10 shows the function of the CRT controller 9.
In the figure, 5 is a compression memory, 9 is a CRT controller,
10 is a color CRT, 8 is a CPU, 356 is a CPU
Parameter register to be set. In the present invention,
Although the memory address is treated as two dimensions of X and Y,
Can be converted to a one-dimensional address
It is possible. The functions of the CRT controller in FIG.
Any starting address (x ₀ , Y ₀ ) Any large with
Size (x _w , Y _w ) _D Dot, horizontal
X _D Display output on a CRT with dot resolution
You. Any value x ₀ , Y ₀ , X _w , Y _w If only the range
The restriction that it must be a multiple of 2 or 4
obtain. FIG. 11 shows an embodiment of this CRT controller.
01, 102, 103 and 104 are parameter registers,
105 and 1006 are adders, 107 and 108 are select
And 109 and 110 are address latches or registers.
is there. 112 is a CRT synchronization circuit and 121 is a horizontal synchronization signal.
, 122 is a vertical synchronization signal, and 123 is a pixel clock.
You. 111 is data latch, 128 is read from memory
The color signal 124 is a color signal to the CRT,
125 is a horizontal address (X), 126 is a vertical address
(Y). Vertical synchronization signal by CRT synchronization circuit 112
Signal 122 is generated, and the horizontal synchronizing signal 121
A clock 123 is generated. Y address by 121
122 is ON in the address taken in the latch 110
During the period, depending on 108, the opening price y ₀ 102 is selected
So y ₀ Becomes Also, the X address by 123
As for the address taken into the latch 109, 121 is ON.
Opening x by interval 107 ₀ Because 101 is selected
x ₀ Becomes In other cases, the X address latch 109 is 1
X for the clock (= 1 dot) _w / X _D Just increase and note
The readdress is updated and scanning in the x direction is performed.
And The horizontal synchronizing signal 121 turns on, and the pixel
When the lock is turned on, the X address latch 109 ₀ To
Set. The Y address latch 110 is one horizontal
Y every period _w / Y _D Only increases and the memory address is updated
Thus, a scan in the y direction is performed. FIG. 12 shows a case where a rectangle is synthesized on a CRT.
FIG. 4 illustrates possible CRT controller functions. C
The rectangular images 130 and 131 displayed on the RT 10 are
Images stored as areas 132 and 133 on the memory 5
It is a statue. Now the image 130 overlaps the image 131
And the image 131 where the image 130 is placed is displayed.
It has not been. Obtaining and expanding the configuration shown in FIG.
Can be. FIG. 13 shows an example of the configuration. Figure 13
And 134, 135, 136, and 137 are addresses in the area.
All internal configurations are the same in the generation module. 134 is
Horizontal address generation module for the highest priority area
135, a vertical address generation module, 13
6 is a horizontal address generation module for the area having the second priority.
Module 137 is also a vertical address generation module
is there. 148 is a horizontal display address counter, 1
49 is a vertical display address counter,
Flat display address 150, vertical display address
And outputs the address 151. Next to the address generation module
explain about. 138 is a display start disk inside 134.
Register holding the play address, 139 end display
Register for holding display address, 152, 1
Reference numeral 40 denotes a comparator, which outputs a signal 150 by the logic circuit 141.
Included in the area of register 138 and register 139
It is determined whether or not. If it is included in the area,
Module has the right to output the memory address.
One. However, that is when both X and Y are established.
Address output by the modules 134 and 135
Is possible because both signals 153 and 154 are true
It is time, and the output permission signal 155 is
Generated, the output buffer 147 is enabled and
The horizontal address bus 125
The contents are output. Similarly from module 135 to memory
The address is output to the vertical address bus 126. Mogi
Signal in one of the areas 134 and 135,
When 153 or 154 becomes false, the output of the logic circuit 159 is output.
The output is also false, and the outputs of modules 134 and 135 are
Sable. At this time, the module having the second priority
136, 137, ie, 156, 1
If 57 is true, the output of logic circuit 160 is true,
Address output of modules 136 and 137
It is output to the rescue buses 125 and 126. Logic circuit 160
Is false, the module with the third priority is
Tested, and so on, with lower priority one after another
And the address output right is transferred. Of course you are
The module with the higher priority has the address output right.
When the module is acquired, the higher-order module outputs the address output.
Will do. On the other hand, the address to output is explained
I do. The register 143 in the module 134 is read.
Register for holding the start memory address, 142
Is a register for holding the address increment value, and 145 is
While 153 is false, register in address register 146
Selector configured to receive the output of the
And 144 are the register 146 of the increment register 142.
It is an adder that adds content. When signal 153 becomes true
The register 146 stores only the contents of the register 142 every clock.
To increase. As described above, the configuration shown in FIG.
The rectangle can be synthesized on the CRT screen. FIG. 14 shows the function of the CRT controller.
Composite image of an arbitrary free-form image on a CRT
It is possible to do. In FIG. 14, 30
Reference numeral 6 denotes a mask shape memory. In the example of FIG.
The mask area 162 corresponding to the area 133 is
2, a mask area 161 is defined corresponding to
A heart-shaped mask is written in 161. this
At this time, as shown on the CRT 10 in FIG.
Cut into a heart shape and superimposed on the image area 133
Is displayed. CRT controller that performs such processing
The line 9 is a mask shape prior to reading out the image memory 5.
This is realized by pre-reading the storage 306. for example
For example, in this embodiment, the line ahead by one in the vertical address direction is
Readout and mask control are performed. In the CRT 10 of FIG.
The raster image data to be displayed at the vertical address y is area 1
At 33, y from the beginning ₀ , Y in the area 132 ₁ Is
When the raster is advanced, the
Mask area 162 is line y ₀ +1 and area 161
In y ₁ +1 is read out, and the next CRT 10
It is possible to prepare for the vertical address y + 1.
FIG. 15 shows an embodiment of the CRT controller. FIG. 15 shows a pair of horizontal and vertical modules of FIG.
Module. In FIG. 15, 161 and 16
2, 167 and 168 hold display addresses
Specify this register as in the previous embodiment using a register.
A rectangular area on the display is
Controlled. 173 can hold 2 rusks of mask
This is a two-line mask data buffer.
It is a sign. Read ahead by one vertical address
The mask data is addressed by the counter 174,
Input to the logic circuit 176. The logic circuit 176 is shown
Ad on display generated by no counter
Less X _D , Y _D Is in the rectangular area that this module should handle
Included and the mask data is ON
Gives a true output. This signal is input to the logic circuit 177
From the module with higher priority than this module
Is true, the memory address X
_DAT , Y _DAT Output data address buffer
179 and 178 are driven. The mask data MSKDT is
Mask data buffer 17 even during transfer of data to be displayed
Continue reading to 3. The mask data used is
The display data is read from the mask shape
Data must be read before the address.
One timing ahead of dress registers 166 and 172
Address register 165 holding the address
171 is output. At this time, the number of modules
Modules with different mask readings
ENMSK signal
Time-divided to allow use of the mask address bus
To prevent collisions. As described above, according to the present embodiment,
Superimpose images of any shape on the display at high speed and high definition
It is possible to display. According to this embodiment, the CRT
The controller image data itself is superimposed without rewriting.
It can be processed in a short time.
It is a sign. Next, the functions and operations of image editing will be described.
You. Table 1 shows various image editing functions in this device.
Is shown. FIG. 16 is a schematic flowchart of the editing operation.
It is assumed that a plurality of images are edited and synthesized. Image input
Processing 200 first reads the plurality of images and reads the image files.
Means the operation and processing to save to the file memory. This
In order to reduce the file size, the compressed data
Is used. Then perform component processing or layout processing.
Whether or not to perform is selected at 204. What is part processing 201?
Processing such as correction and replacement of the images is performed. [Table 1] The items in A in Table 1 are roughly equivalent. Layout processing 2
02 is a layout of a plurality of image data as completed parts
Processing such as rotation, scaling, and movement of the image in the processing that determines the out
Affine transformation that performs
Equivalent to item. Here, the component processing directly converts the image data.
Layout processing is required
Meter information (for example, magnification, position after rotation angle, etc.)
Just remember it. Therefore, the layout process
The data is thinned out, displayed on the CRT display 10 and
What is necessary is just to extract a parameter. At the stage where such processing has been completed, the actual image
The data 203 is performed. This is the completed parts data
Copy to image memory under layout parameters
And edit. After such processing is completed, the image memory
Data to the printer and output the printer
Do. FIG. 17 illustrates the image input processing 200 in detail.
First, the document reading 207 is performed by the reader.
After the data is compressed by the aforementioned compressor (208),
The file is registered in, for example, a hard disk or the like. This
Repeat steps as long as the original is present.
Then, the process ends (210). FIG. 18 shows the contents of the component processing.
First, a process item selection 211 is performed as to what to do. First
The color correction 212 converts image data from a file into an image
Transfer to the memory (image memory is CRT10 video
Since it also serves as a memory, it is immediately output to CRT10.
Color correction while looking at the CRT 10. Such an operation
The image data in the image memory is
Look up Tab to output to A (CRT) 10
This is performed by changing le (LUT) (216). with this
The LUT at the time when the image is considered to be good is stored (22
0). The contour correction 213 is similarly output to the CRT.
Place the spatial filter calculator on the cable
I don't need to do anything. And the spatial filter information (for example,
The well-known Laplacian coefficient) and the like are stored (221).
Next, the cutout mask 214 is placed in parallel with the image memory.
Rewrite the 1-bit plane mask memory
U. This determines the area of the image, and the actual image data is
Do not touch (218). Other processing is actual data correction 2.
A process called No. 15 is performed. This is on the image memory
Access the actual image data written in
Write or erase an image on a real image
Or copy. When the above processing is completed, the actual data
Register 222 data and mask data as a file.
You. FIG. 19 shows the layout processing.
It is. First, image data from a file
Write to memory (223). At this time, as described above,
Data can be stored in the image memory.
Engulfed. A plurality of such image data are stored in a CRT
Controller performs variable magnification (225) on CRT10
Is output to At this time, the image is rotated on the image memory
Raster operation by affine converter 4 to another area of
(224). Meanwhile
Doubles can only be done with the CRT controller with integer scaling
Therefore, arbitrary magnification is performed by the converter 4 in the same manner. Output image area
Next, the data creation 226 of the mask memory for limiting
U. The above operation is performed for each image, and the layout
The parameters are extracted (227). FIG. 20 shows the above component data and layout.
A final image is formed based on the parameters. This process
Can be completely unmanned. The image to be overlaid first
It is processed first from the part data. Review the first image
Outline parameters and mask data are pipelined
AFFINE conversion register, LUT and mask
Mori (This is a 1-bit parallel to the image memory
Memory). Then the data from the file
Memos via these pipeline processors
Transferred to The resulting raster operation
(ROP). This processing is performed for the number of component data (n
max only) Repeatedly overlaid on image memory
(230, 231). Next, output to the printer will be described. The edited image data is stored in the image memory.
And transferred to the printer. Printer output
Force method, such as plane-sequential, line-sequential,
The sending status from the memory differs. Such a conversion is shown in FIG.
The conversion is performed by the converter 12. Prior to that, pass the compressed data
The normal pixel data is decoded by the decoder 6 in advance. Normally, one printer 7 is connected. I
However, by connecting multiple printers,
High-speed output, especially those that require large amounts of output.
It is important in the plate and printing fields. To this image memory
Image data is stored by compressing the density data and
Data to multiple printers
Hue misalignment that occurs when connected (this is an individual printer
Varies depending on the condition of
L00k Up Table to move to another certain density data
Conversion and correction can be performed by (LUT). (This is usually because the image memory is binarized)
It is difficult to store data in a state after it has been deleted.) Or
The adjustment mechanism for individual printers using the LUT is a converter.
12 included. In the color printer 7, such correction is performed.
Image data based on the normal method such as dither method
Image output. As described above, image editing using compressed data
System architecture suitable for high-speed editing
High-speed and high-performance image editing by taking a char
Can be done. As described above, according to the present invention, a color image
Efficiently determine processing conditions for processing applied to data
Can be.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of a color editing apparatus according to an embodiment. FIG. 2 is a diagram showing data formation of encoded data. FIG. 3 is a block diagram of an address generator of the affine converter. FIG. 4 is a timing chart of an address generation unit. FIG. 5 is a diagram showing an address correspondence between an original image and a processed image. FIG. 6 is a conceptual diagram of block rotation and block rotation. FIG. 7 is a view showing rotation in a block. FIG. 8 is a diagram showing a process of receiving a code by rotation. FIG. 9 is a block diagram of rotation. FIG. 10 is a conceptual diagram of a CRT controller. FIG. 11 is a block diagram of a CRT controller. FIG. 12 is a conceptual diagram of a CRT controller. FIG. 13 is a block diagram of a CRT controller. FIG. 14 is a conceptual diagram of a CRT controller. FIG. 15 is a block diagram of a CRT controller. FIG. 16 is a flowchart illustrating an image editing processing procedure. FIG. 17 is a flowchart illustrating an image editing processing procedure. FIG. 18 is a flowchart illustrating an image editing processing procedure. FIG. 19 is a flowchart illustrating an image editing processing procedure. FIG. 20 is a flowchart illustrating an image editing processing procedure.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-58-125171 (JP, A) JP-A-60-131594 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G06T 1/00-11/80 H04N 1/60

Claims (1)

(57) [Claims] A color image based on each of the plurality of color image data is displayed on a display unit, an instruction for a color correction process for the color image displayed on the display unit is received, and the color correction process according to the instruction is performed. A color correction condition corresponding to the color correction process is stored for a color image, an instruction for a contour correction process for the color image displayed on the display means is received, and a contour correction process according to the instruction is performed. Is performed on the color image, and a contour correction condition corresponding to the contour correction processing is stored, and a low-resolution color image based on each of the plurality of color image data is generated. The color correction condition or the contour correction is performed on the color image data corresponding to the low-resolution color image synthesized on the display unit, on the display unit. A color image processing method comprising: performing a process based on a condition; and outputting the color image data as a high-resolution color image. 2. Transferring each of the plurality of color image data to an image memory, displaying a color image based on each of the plurality of color image data on a display unit, and performing color correction processing on the color image displayed on the display unit Is received, a color correction process according to the instruction is performed on the color image, a color correction condition corresponding to the color correction process is stored, and a contour correction process on the color image displayed on the display unit is performed. For the color image, performing an outline correction process according to the instruction on the color image, storing an outline correction condition corresponding to the outline correction process, based on the color correction condition or the outline correction condition. A plurality of color images to be processed are synthesized on the display means, and the color image synthesized on the display means is output as a high-resolution color image. And a color image processing method.