JP2730492B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a connection structure between a gold pad and a solder bump of a semiconductor chip.

[0002]

2. Description of the Related Art In recent years, computers have been required to have higher and higher performance.
High power, ultra-high pin count flip-chip type semiconductor chips have been emerging.

One example of this is disclosed in Japanese Patent Application Laid-Open No. 1-214141.

As shown in FIG. 1 of the publication, one embodiment of the present invention relates to a circuit area 11 including an active area and wiring.
And a semiconductor pellet 1 on which an electrode pad 12 connected to this circuit region is formed, and a generally rectangular opening (window) on the electrode pad 12 and formed over the entire surface of the semiconductor pellet. It has an inorganic passivation film 2 and a circular opening (window) at the same position as the opening of the inorganic passivation film 2. A polyimide film 3 is formed so as not to cover the circuit region 11, and a barrier metal film 4 is formed on the electrode pad 12 through the opening of the polyimide film 3. And a solder bump 5 connected thereto.

In particular, a bipolar semiconductor chip requiring a large amount of power will be described with reference to FIG.

That is, the connection between the gold (Au) pad 2 and the solder bump 7 is made by the bonding metal 4 and the barrier metal 5.
, The structure of the peripheral portion between the gold (Au) pad 2 and the solder bump 7 is complicated, and a step is generated. As a result, the insulating film 3, the adhesive metal 4, and the barrier metal 5 were broken by thermal stress due to the difference in thermal expansion coefficient. As a result, gold (A
u) The gold (Au) of the pad 2 is replaced by the tin (S
n) -Lead (Pb) The problem that it diffuses into eutectic solder often occurred.

[0007]

In this conventional semiconductor device, the solder bumps 7 are provided immediately above the gold (Au) pads 2.
Adhesive metal 4 made of titanium (Ti) and copper (Cu)
And a barrier metal 5 made of nickel (Ni) thereon
, And the structure around the pad is complicated by the steps.

Therefore, the thermal expansion coefficient of the gold (Au) pad 2 is 14.2 × 10 ⁻⁶ (α / K ⁻¹ ), and the thermal expansion coefficient of the insulating film 3 is 2.5 × 10 ⁻⁶ (α / K ^{−). 1} ) Thermal expansion coefficient of 8.6 × 1 when the adhesive metal 4 is formed of titanium (Ti)
0 ^-6 (α / K ^-1 ), coefficient of thermal expansion when the adhesive metal 4 is formed of copper (Cu) 16.5 × 10 ^-6 (α / K ^-1 ).
K ^-1 ) and a coefficient of thermal expansion of 13.4 × 10 ^-6 (α /
The bonding metal 4 and the barrier metal 5 are destroyed by the stress generated by the difference of K ^-1 ). As a result, there is a problem that the gold (Au) of the gold (Au) pad 2 is diffused into the tin (Sn) -lead (Pb) eutectic solder of the solder bump 7 and the connection reliability is impaired.

It is an object of the present invention to provide a semiconductor device having improved connection reliability.

Another object of the present invention is to provide a semiconductor device in which gold of a gold pad is prevented from diffusing into solder bumps.

[0011]

According to a first semiconductor device of the present invention, a gold pad formed on a surface of a semiconductor is disposed at a position different from a plane of the gold pad via an adhesive metal and a barrier metal. Solder bumps.

A second semiconductor device according to the present invention is characterized in that in the first semiconductor device, the adhesive metal and the barrier metal immediately below and around the solder bump are formed flat.

According to a third semiconductor device of the present invention, a gold pad formed on a surface of a semiconductor, an adhesive metal bonded to a part of the gold pad, and an opposite surface of the adhesive metal to the gold pad bonding surface. A barrier metal bonded to a surface and a solder bump provided at a position on the barrier metal different from the gold pad on a plane and electrically connected to the gold pad via the bonding metal and the barrier metal. Including.

According to a fourth semiconductor device of the present invention, there is provided a gold pad formed on a surface of a semiconductor, a first bonding metal bonded to a part of the gold pad, and a gold pad bonding surface of the bonding metal. Is a first barrier metal bonded to the opposite surface, a second bonding metal bonded to the first barrier metal, and a second bonding metal opposite to the first barrier metal bonding surface of the second bonding metal. A second barrier metal bonded to a surface and the gold pad are provided at positions on the second barrier metal different from the plane on the plane;
, The second bonding metal, and the solder bumps electrically connected through the second barrier metal.

[0015]

Next, an embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 1, in a first embodiment of the present invention, a semiconductor chip 1 is provided with titanium (Ti) and platinum (Pt) having a thickness of about 100 to 800 angstroms on a part of the surface of the semiconductor chip 1. ) Including a power supply layer made of a semiconductor chip 1 and, for example, silicon dioxide SiO ₂ formed on the gold (Au) pad 2 so that the gold (Au) pad 2 is partially exposed. An inorganic insulating film 3, titanium (Ti) having a thickness of 100 to 800 angstroms formed on an exposed portion of the gold (Au) pad 2 which is not covered with the insulating film 3 and the insulating film 3; An adhesive metal 4 made of copper (Cu) having a thickness of 1000 to 10000 angstroms, and nickel (N) mechanically bonded by the adhesive metal 4
i) a barrier metal 5, a polyimide film 6 having an aperture window 8 formed at a position on a plane different from the gold pad 2 on the barrier metal 5 and the insulating film 3, and formed on the aperture window 8. Including the formed spherical solder bumps 7.

Next, the manufacturing method of the first embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 2A, the semiconductor chip 1
A gold (Au) pad 2 is formed on the surface. The wiring, through-holes, and insulating layers below the gold (Au) pad 2 are not shown.

The formation of the gold (Au) pad 2 is performed in the following order. For example, a power supply layer made of titanium (Ti) and platinum (Pt) is formed by sputtering.
The thickness of each of titanium (Ti) and platinum (Pt) is 1
It suffices that about 00 to 800 angstroms are sequentially and uniformly applied. Next, a method of forming a pattern by a series of procedures such as photo reduction, pattern repetition, CAD, the latest electron beam method, etc., which is a main means of making a mask etc. and thereby transferring an image to a substrate. The gold (Au) pad 2 is formed by a certain photolithography method and plating method.

Referring to FIG. 2B, after the formation of the gold (Au) pad 2, an inorganic insulating film 3 made of silicon dioxide SiO ₂ or the like is formed on the entire surface of the semiconductor chip 1 or on the surface of the chip 1. Chemical vapor deposition (chemical vapor deposition) in which an inorganic insulating film 3 is deposited as a product of a chemical reaction in a nearby gas phase.
n or less by CVD).

Referring to FIG. 2C, a hole is formed in insulating film 3 so that a portion of gold (Au) pad 2 is exposed.

Referring to FIG. 2D, on top of the state shown in FIG. 2C, titanium (Ni) is used for supplying power and mechanically bonding to the barrier metal 5 made of nickel (Ni). An adhesive metal 4 made of Ti) and copper (Cu)
For example, it is formed uniformly over the entire surface by a sputtering method in which atoms are removed from the source by the bombardment of ions in an accelerated plasma state. The thickness of titanium (Ti) of the adhesive metal 4 is, for example, 100 to 800 angstroms, and the thickness of copper (Cu) is, for example, 1000 to 10000.
Angstrom. Titanium (Ti) and copper (C
u) is made of nickel (Ni) plating and tin (S
It is sufficient to make the plating current thick enough to supply the plating current uniformly and sufficiently to supply the plating of n) -lead (Pb) solder.

FIG. 2E shows a state in which a barrier metal 5 made of nickel (Ni) is formed on the adhesive metal 4 by a plating method. In this state, the formation area of the barrier metal 5 is opened by photolithography using a plating resist.

Referring to FIG. 2F, first, nickel (Ni) plating of about 2 to 5 microns (μm) is performed in a nickel (Ni) plating bath. Next, the plating resist film is peeled off. Thereafter, using the barrier metal 5 as a mask, an adhesive metal 4 of copper (Cu) and titanium (Ti)
Are sequentially etched.

Referring to FIG. 2G, the barrier metal 5
3 shows a state in which a polyimide film of about 1 to 3 μm (μm) is formed on the insulating film 3 containing, by spin coating.

Referring to FIG. 2H, in order to form the solder bumps 7 by photolithography, the polyimide film 6 is selectively etched in a circular shape to form an aperture window 8. The aperture window 8 is made of gold (Au) on a plane.
It is arranged at a position that does not overlap with the pad 2. Further, the aperture window 8 is provided at a position that is less than the step between the insulating film 3 and the barrier metal 5.

Referring to FIG. 2 (i), in a tin (Sn) -lead (Pb) eutectic solder plating bath, electrolytic plating is performed.
A predetermined amount of tin (Sn) -lead (Pb) on five barrier metal layers
The state where the plating resist film is peeled off after the eutectic solder is performed is shown.

Referring to FIG. 2J, the solder-plated tin (Sn) -lead (Pb) eutectic solder is melt-shaped (wet back) to form a spherical solder bump 7.

The formation of the solder bumps 7 is carried out at 200 to 230
It can be easily formed by reflow, which is a soldering method using temporarily fixed solder, before connecting at a temperature of about ° C.

By arranging the solder bumps 7 on the plane at positions not overlapping the gold (Au) pads, the gold (A)
u) The connection path between the pad 2 and the solder bump 7 can be lengthened. Therefore, the thermal expansion coefficient of the gold (Au) pad 2 is 14.2 × 10 ⁻⁶ (α / K ⁻¹ ), the thermal expansion coefficient of the insulating film 3 is 2.5 × 10 ⁻⁶ (α / K ⁻¹ ), and the adhesion is 7. Thermal expansion coefficient when metal 4 is formed of titanium (Ti)
6 × 10 ⁻⁶ (α / K ⁻¹ ), coefficient of thermal expansion 16.5 × 10 ⁻⁶ (α when the adhesive metal 4 is formed of copper (Cu))
/ K ^-1 ), and the coefficient of thermal expansion when the barrier metal 5 is formed of nickel (Ni) 13.4 × 10 ^-6 (α
/ K ^-1 ), the insulating film 3
Even if the bonding metal 4 and the barrier metal 5 are broken, the gold (Au) of the gold (Au) pad 2 is
Can be prevented from diffusing into the tin (Sn) -lead (Pb) eutectic solder.

Next, a second embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 3, the feature of the second embodiment of the present invention is that the combination of the bonding metal 4 and the barrier metal 5 shown in the first embodiment has a double structure. It is in.

That is, in the second embodiment of the present invention, the semiconductor chip 1
Titanium (Ti) with a thickness of about 800 Å
(Au) pad 2 including a power supply layer made of platinum and platinum (Pt) 2, for example, silicon dioxide formed on semiconductor chip 1 and gold (Au) pad 2 so as to partially expose gold (Au) pad 2 An inorganic insulating film 3 made of SiO _2, a titanium film having a thickness of 100 to 800 Å formed on an exposed portion of the insulating film 3 and an uncovered gold (Au) pad 2 not covered with the insulating film 3 (T
i) and an adhesion metal 4 made of copper (Cu) having a thickness of 1000 to 10000 angstroms, a barrier metal 5 made of nickel (Ni) mechanically adhered by the adhesion metal 4, and formed on the barrier metal 5. One
Titanium (Ti) with a thickness of 00 to 800 Å
And an adhesion metal 4 made of copper (Cu) having a thickness of 1000 to 10000 angstroms, a barrier metal 5 made of nickel (Ni) mechanically adhered by the adhesion metal 4, It includes a polyimide film 6 having a formed opening window 8 and a spherical solder bump 7 formed on the opening window 8.

Next, a manufacturing method according to a second embodiment of the present invention will be described with reference to the drawings.

The manufacturing steps shown in FIGS. 4A to 4F correspond to FIGS. 2A to 2F in the first embodiment of the present invention.
Are the same as those in the manufacturing process.

Referring to FIG. 4G, power supply and mechanical bonding between the barrier metal 5 and nickel (Ni) shown in FIG. 4F can be performed. Adhesive metal 4 made of titanium (Ti) and copper (Cu) is sequentially formed over the entire surface by sputtering. Titanium (Ti) and copper (C) of the bonding metal 4
The conditions for the film thickness u) are the same as those described with reference to FIG. 2D of the first embodiment.

FIG. 4H shows a state in which a barrier metal 5 made of nickel (Ni) is formed on the adhesive metal 4 by a plating method. In this state, the formation area of the barrier metal 5 is opened by photolithography using a plating resist.

Referring to FIG. 4 (i), first, nickel (Ni) plating of about 2 to 5 microns (μm) is performed in a nickel (Ni) plating bath. Next, the plating resist film is peeled off. Thereafter, using the barrier metal 5 as a mask, an adhesive metal 4 of copper (Cu) and titanium (Ti)
Are sequentially etched.

The manufacturing steps shown in FIGS. 4 (j) to 4 (m) correspond to those in the first embodiment of the present invention shown in FIG. 2 (g).
This is the same manufacturing process as the manufacturing process shown in (j).

In the second embodiment of the present invention, the combination of the bonding metal 4 and the barrier metal 5 has a double structure.
As a result, even if the insulating film 3, the adhesive metal 4 and the barrier metal 5 are destroyed by the stress caused by the difference in the thermal expansion coefficient, the gold of the gold (Au) pad 2 becomes tin (Sn) -lead ( Pb) Diffusion into the eutectic solder can be more reliably prevented.

[0041]

According to the present invention, the gold pad 2 and the solder bump 7 are provided.
Are arranged so that they do not overlap on a plane, and the connection path is lengthened. Accordingly, the thermal stress caused by the difference in the coefficient of thermal expansion between the gold (Au) pad 2, the insulating film 3, the adhesive metal 4, and the barrier metal 5 causes the insulating film 3, the adhesive metal 4,
Even if the barrier metal 5 is destroyed, the gold (Au) from the gold (Au) pad 2 will not
n) -Lead (Pb) diffusion to the eutectic solder can be prevented. As a result, there is an effect that connection reliability can be improved.

In the present invention, since the bonding metal 4 and the barrier metal 5 have a double structure, the improvement in connection reliability is further remarkable.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a first exemplary embodiment of the present invention.

FIGS. 2A to 2J are views for explaining the manufacturing method according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a second exemplary embodiment of the present invention.

FIGS. 4A to 4M are views for explaining a manufacturing method according to a second embodiment of the present invention.

FIG. 5 is a diagram showing an example of a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Gold (Au) pad 3 Insulating film 4 Adhesion metal 5 Barrier metal 6 Polyimide film 7 Solder bump 8 Opening window

Claims (3)

(57) [Claims] A gold pad formed on a surface of a semiconductor;
A semiconductor device, comprising: a solder bump disposed at a position different from the gold pad through a bonding metal and a barrier metal. 2. A gold pad formed on a surface of a semiconductor, a bonding metal bonded to a part of the gold pad, and a barrier metal bonded to a surface of the bonding metal opposite to the gold pad bonding surface. A semiconductor device provided at a position on the barrier metal different from the gold pad on a plane and electrically connected to the gold pad via the adhesive metal and the barrier metal; . 3. A gold pad formed on a surface of a semiconductor, a first bonding metal bonded to a part of the gold pad, and a surface of the bonding metal opposite to the gold pad bonding surface. A first barrier metal, a second bonding metal bonded to the first barrier metal, and a second bonding metal bonded to a surface of the second bonding metal opposite to the first barrier metal bonding surface. A barrier metal, provided at a position on the second barrier metal different from the gold pad on a plane, the first adhesive metal, the first barrier metal, the second adhesive metal, and the second barrier A semiconductor device comprising: a solder bump electrically connected via a metal.