JP2727451B2 - Tone generator - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a musical sound generator for an electronic musical instrument capable of generating a desired musical sound by arbitrarily combining a plurality of waveforms. [Prior art and its problems] Conventionally, various waveform synthesizing apparatuses have been known. However, there are problems that the scale of the number of circuits and the like becomes too large and the types of waveforms that can be generated are limited. For example, in the sine wave synthesis method, (Here Wo fundamental angular frequency, a _n are the Fourier coefficients) waveform Y ₁ on the basis of the relational expression, and the accelerator waveform memory and an integral multiple of the wave memory of the fundamental frequency, mutually different weights
generate different sine wave generation sequence amplitude is multiplied by a _n, created by adding them. As is apparent from the above, when a waveform having a large number of harmonic components is to be obtained as a desired waveform, a large number of waveform memories corresponding to the number and a related waveform calculation circuit are required. However, there is a disadvantage that the size becomes large. In the FM modulation method, Y ₂ = A sin (Wct + I sinWmt)
(Here Wc Each carrier frequency, Wm is the angular frequency of the modulation wave, I is the modulation index, A is the amplitude) for generating a waveform Y ₂ based on the relational expression. Although this method can generate a relatively large number of harmonic components with a relatively small number of sine wave generation sequences, when evaluated by spectrum, it generates a waveform having a gentle spectral envelope, such as a bowed instrument. However, there is a drawback that a waveform sequence in which the spectral distribution changes gradually cannot be generated. Further, there is a disadvantage that a waveform close to noise cannot be arbitrarily obtained. [Object of the Invention] Accordingly, an object of the present invention is to provide a tone generator capable of generating various waveforms with a simple configuration. [Summary of the Invention] An object of the present invention is to provide a musical sound generating apparatus for synthesizing a musical sound waveform to be output by a waveform synthesizing operation sequence over a series of module times. (B) a phase circuit (4) for generating a phase signal (qRij) for each module time, and an envelope generating circuit (3) for generating an envelope signal (Eij) for each module time. (C) a waveform generation circuit for executing a waveform synthesis operation sequence based on the operation control signal, the tone signal including the phase signal and the envelope signal, and synthesizing a musical tone waveform. (6) wherein the waveform generating circuit comprises: (D) a waveform memory (12) arranged on the signal path; A module waveform generating circuit (8-12, 18-20, 25-27) for generating a module waveform for each time, wherein the module waveform generating circuit comprises: (E) a phase signal selecting circuit (8), and an envelope signal selecting circuit. (I) a tone parameter from the tone parameter generation circuit, or (ii) a waveform according to the first part (C2, C3, C8) of the operation control signal. A tone parameter selection circuit (8, 25, 26) for selecting a tone parameter to be used for each module time by selectively inputting an intermediate generation result of the generation circuit to the phase signal selection circuit and the envelope signal selection circuit. (F) The envelope signal is output to the output of the waveform memory read in accordance with the output selected by the phase signal selection circuit. A module waveform output by providing an output selected by the loop signal selection circuit, wherein the module waveform generation circuit further includes: (G) a noise selection circuit (13 to 18, 27); (H) a noise generation circuit (13) for generating noise; and (I) a second part (C6, C5, C) of the operation control signal.
According to 4), a noise modulation control circuit (14, 15) that determines the presence or absence of noise modulation and the type of noise-modulated module waveform output; and (J) the presence or absence of the noise modulation by the noise modulation control circuit: A noise modulation circuit (2) that modulates the output of the envelope signal selection circuit (25, 26) with a noise signal output from the noise generation circuit (13).
(K) the noise selection circuit according to the type by the noise modulation control circuit; (i) the second part of the operation control signal is in a first specific state (C6 = 1 , C5 = 1, C4 = 0), a module waveform output to which the noise-modulated output from the envelope signal selection circuit is added to the output of the waveform memory is formed, and (ii) the second portion is The second specific state (C6 = 1, C5 =
When (C4 = 1), the module is configured to form a module waveform output in which the noise-modulated output from the envelope signal selection circuit is added to the output other than the output of the waveform memory, (L Therefore, at a desired module time, according to the state of the second portion, any one of a module waveform output in which the output of the waveform memory itself is noise-modulated and a module waveform output in which the other output is noise-modulated Either one of them is output from the module waveform generation circuit, and this is achieved by a tone generator. In a preferred embodiment of the present invention, the envelope selection circuit comprises: (i) a sum of a module waveform generated by the module waveform generation circuit at a past module time and the envelope signal, or (ii) a sum of the envelope signal. Either one is selected and input (item 2). In a further preferred aspect of the present invention, the noise modulation circuit gate-controls a signal on a signal path according to an output of the combinational circuit (third circuit).
Section). According to the present invention, the waveform generation circuit means is constituted by a single waveform generation unit that operates as a plurality of time division modules. Each module generates a waveform according to a module-independent control signal provided from an external control circuit means. For example, the control signal can indicate whether to incorporate the waveform generated by each module as part of the final musical tone, and if so, the waveform generation circuit means will generate the waveform generated by the current module. Is added to the internal accumulated waveform. Further, a parameter selection circuit is used as a means for controlling how to combine the waveforms of the modules. For example, when the waveform generated by the current module is independent of the waveform of the past module (for example, a waveform that is simply added to the waveform of the past module), the parameter selecting circuit means Only the waveform data from the means is used as parameters (for example, a phase signal and an envelope signal) of the waveform generated by the current module. On the other hand, if the waveform generated by the current module depends in some way on the waveform generated by one or more past modules,
A waveform (or a cumulative waveform) of a past module can be selected as a waveform parameter of the current module. Further, if desired, any combination of the waveform generated by the past module and the waveform data of the current module can be used as the waveform parameter of the current module. Further, according to the present invention, noise waveform selection circuit means is provided in the waveform generation circuit means, and the noise waveform selection circuit means selectively executes whether to modulate the waveform of the current module with noise according to the control signal. . As described above, while the waveform generating circuit means is a single unit, the time unit called a module is used as a unit.
Waveforms generated in a plurality of modules can be arbitrarily combined within the range of the degree of freedom of the control signal, and a noise-modulated waveform can be selectively generated in a desired module on a module-by-module basis. Therefore, an extremely abundant musical tone can be synthesized even though the circuit scale is compact. Here, the noise selection circuit means combines (a) a noise generation circuit means (13) for generating noise, (b) a second predetermined operation control signal portion (C4, C5, C6) with the noise. Combination circuit means (15, 16); and (c) a noise modulation circuit means (27) provided on a signal path of the module waveform generation circuit means for selectively noise modulating a signal on the signal path in accordance with an output of the combination circuit means. , 18). Therefore, the output of the combinational circuit means functions as a kind of operation control signal for the signal on the signal path. In other words, the whole of the control signal generation circuit, the noise generation circuit and the combination circuit function as a means for generating an operation control signal for the waveform generation circuit for each module time. According to the present invention, not only can a desired module waveform (a component of a synthesized musical sound waveform) be noise-modulated, but also a noise-modulated module waveform can be selected and used as a musical tone parameter in the next or subsequent module time.
More complex module waveforms can be synthesized. In a further preferred configuration example, a basic waveform memory for storing a basic waveform and a phase angle changing circuit for selecting a depth of distortion of the basic waveform output from the memory in accordance with a control signal are provided in the waveform generating circuit. Can be In an embodiment to be described later, the waveform generating circuit means has a phase port θ and an amplitude (envelope) port E as input ports, a signal from the phase port is converted into a sine wave by a sine wave memory, and an output of the amplitude port Are multiplied. Therefore, the product output (module output) is formally given by E sin θ. Here, the signal from the phase port is the phase parameter selected by the parameter selection circuit means, and in some cases, the phase data qR _i generated by the original phase angle generation circuit means for the current module. Yes, in some cases, the waveform E _i-1 si in the past, for example, one module past
nqR _i−1 , and in some cases, it can be the cumulative value E _i−1 sinqR _i−1 + E _i−2 sinqR _i−2 of the waveforms generated in the past two modules. The signal from the amplitude port is the amplitude parameter selected by the parameter selecting circuit means or noise waveform selection circuit means, when there is an envelope data E _i for envelope generation circuit is generated for the current module In some cases, the sum of the envelope data of the current module and the waveform of the past, for example, one module past, is E _i + E _i−1 sinqR _i−1 , and in some cases, it is the noise-converted amplitude parameter N. obtain. in short,
By substituting one of many candidates into E and θ in the above equation, various waveforms are calculated. Further, in the term of sin θ, the depth of the phase distortion can be changed stepwise by the phase angle changing circuit means. This embodiment has the advantage of a very simple configuration with one phase port and one amplitude port, but if desired, the number of phase and amplitude parameters available for each module can be multiple, and The parameters may be provided from each port. Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an electronic musical instrument to which the present invention is applied. Eight-tone polyphonic for convenience. The keyboard circuit 1 is formed by arranging switches for detecting on / off of a key in a matrix, and is scanned by a key assigner 2. The key assigner 2 detects on / off of a key of the keyboard circuit 1, and when a new key is turned on, the key code KC ₀ and the attack start signal A ₀ of the key are assigned to a sound channel which is not currently sounding (tentatively, channel 0). Occur. Envelope generation circuit 3, original phase angle generation circuit 4, waveform generation circuit 6
Operates in a time-division manner as illustrated in FIG. 2 in order to handle data for eight tones, that is, a total of 32 sequences for four tones per sound. In FIG. 2, the above four streams are allocated as modules 0 to 3 during one sampling time, and the inside of each module is divided into eight to be channels 0 to 7.
Here, assuming that the sampling frequency is 50 KHz, the operating frequency is 32 × 50 KHz = 1.6 MHz. For the following description, the subscripts for the modules 0 to 3 are i, and the channel 0 is
Subscript j Distant respect to 7, the module i, the data Y channel j will be referred to as Y _ij. The envelope generation circuit 3 receives the attack start signal A ₀ and starts generating four series of envelope waveforms E _i0 (note that when the key is turned off, the key assigner 2 generates a decay start signal D ₀ on the sound channel 0). and the envelope release state in. envelope generation circuit 3, the sound channel when release which has received the stop envelope signal EF _i0 of the ends to generate a stop envelope signal EF _i0. key assigner 2, 4 series is empty I remember that.) The original phase angle generation circuit 4 receives the key code KC ₀ from the key assigner 2 and accumulates four series of frequency numbers R _i0 corresponding to the key code KC ₀ to generate original phase angle data qR _io . The waveform generation circuit 6 forms the center of the present invention, and includes the clocks φ _L , φ ₁ , φ ₂ from the control circuit 5, the control signals C _{0 to} C ₈ , and the original phase from the original phase angle generation circuit 4. Angle data qR _io , envelope E from envelope generation circuit
Upon receiving _i0 , a desired waveform is generated, and the waveforms for each channel are added and output as a final waveform W. The sound system 7 receives the final waveform W as digital data, performs D / A conversion, and emits sound. FIG. 3 is a detailed diagram of the waveform generation circuit 6. The FFs (flip-flops) and shift registers all operate on a two-phase clock of φ ₁ and φ ₂ (not shown). The selection circuit 8 selects what the final phase angle data should be. Works like The five-stage shift register 9 delays the signal by five bit times. The phase angle changing circuit 10 switches the conversion coefficient between the two phase data so that the gradient of the changed phase data X 'changes stepwise according to the value of the original phase data X. FIG. 4 shows a principle diagram of the phase angle changing circuit 10. FIG. 4 (g) shows the original phase angle data X and finally a sine wave memory.
12 shows the relationship with the changed phase angle data X 'to access the data. As can be seen from the figure, the function characterizing the relationship between the two has a different slope, that is, a multiplier to be multiplied by X, depending on the value of X. Now, let the multiplier be α (0X <M, N−
If MX <N) and β (MX <NM), α = (N / 4) / M β = (N / 4) / (N / 2−M) Therefore, 1 / α + 1 / β = 2 . Here, N represents one period 2π of the sine wave memory 7, M is a switching point of the multiplier, and when X = M, X '= N /
It becomes 4 and the maximum value of the sine wave in the sine wave memory 7 is accessed (see FIG. 6). For example, if β = α / 2 ^k , then α = (2 ^k + 1) / 2 β = (1 + 2− ^k ) / 2. Therefore, the multiplication for changing the phase can be executed by the bit shift method. FIGS. 4A to 4G show a procedure for generating final changed phase angle data X 'from the original phase angle data X. FIG. X ₀ ′ shown in (a) is the most significant bit X _{MSB of} X
X ₁ ′ and X ₁ ″ shown in (b) and (c) are X ₀ ′
X ₂ ′ shown in (d) is obtained by multiplying X ₁ ′ by β, X ₂ ″ shown in (e) is obtained by multiplying X ₁ ″ by α, and (f) X ₃ ′ represents X ₂ ″ and X ₂ ′, It is connected as. The final changed phase angle data X ′ shown in (g) is obtained by using X ₃ ′ shown in (f). It was obtained as. FIG. 5 shows an example of a circuit for executing the processing described in FIG. The original phase data X sent from the original phase angle generation circuit 4 has an inversion control input R of 1 by its most significant bit X _MSB.
In this case, the output is inverted by the inverting circuits 35 and 36 which invert the output. That is, in the inverting circuit 35, ▲ is added to the inverting control input R by the inverter 34, so that when X _MSB = 0, it is inverted, and when X _MSB = 1, it is non-inverted. On the other hand, the inversion circuit 36
In this case, non-inversion is performed when X _MSB = 0, and inversion is performed when X _MSB = 1. Therefore, the outputs of the inverting circuits 35 and 36 correspond to X ₁ ′ and X ₁ ″ shown in FIGS. 4 (b) and 4 (c), respectively. The output is preferable in terms of accuracy, but an exclusive-OR group (EX-OR group) that generates a 1's complement may be adopted as an approximation. Control inputs S0 to S2 (k
Those multiplied with X ₁ 'according to the data S'0~S'2 changing gate 37-40 considerable binary data), the adder
The input of 42 is shifted left (1/2 times) and input, and X ₂ ′ = βX ₁ ′ = 2 ⁻¹ (2− ^k X ₁ ′ + X ₁ ′) (where k = In the case of 6, 7, X ₂ ′ = X ₂ ′) is executed. Similarly, the right shift circuit 43 and the adder 44 multiply the above-described multiplication α by X ₁ ″, and X ₂ ″ = αX ₁ ″ = 2 ⁻¹ (2 ^k X ₁ ″ + X ₁ ″) When k = 6, 7, X ₂ ″ = X ₁ ″) is executed.The selection circuit 45 generates X ₃ ′ shown in FIG. 4 (f), and outputs X ₂ ′ of the adders 42, 44. 'and X ₂ "for selecting one of, when the adder 42 outputs a carry-out CO, i.e. in Fig. 4 (d) X _2' only when the N / 4, X _2" is selected, it when other than selecting the X ₂ '. inversion circuit 46, like the inverting circuits 35 and 36, in which the inverted control input R is inverted when 1, ▲ ▼ bind and carry-out CO EX-OR gate 47 so that the polarity of the gradient of X ₃ ′ shown in FIG.
Invert X ₃ '. That is, (a) when X = 0 to M, X _MSB = 0 and CO = 1
( ₃ ) When X = M〜N / 2, X _MSB = 0 and CO = 0, so X ₃ ′ is inverted. (C) X = N / 2〜N−M when the X _MSB = 1, CO = 0 a is from X ₃ to reverse the 'non-inverting, (d) since when X = N-M~N is _{X MSB = 1, CO = 1} X 3' . Further, EX- is added to the output of the inverting circuit 46 as an upper bit.
Fig. 4 (g) by adding the output of the OR gate and X _MSB
X ′, ie, changed phase data, is obtained. FIGS. 6 and 7 show waveforms and spectra generated when the sine wave memory 2 is accessed with the output X 'of the phase angle changing circuit 10 for various values of k. k
It can be seen that the spectrum gradually increases like a sawtooth wave as the value of = 0 to 7 increases. However, it is a sine wave at k = 6.7. Returning to FIG. 3, the output of the sine wave memory 12 sin X 'is via the FF 18, is multiplied by the modified envelope E _ij in the multiplier 19.
The output E _ij sinX ′ of the multiplier 19 is input to the selection circuit 8 and the adder 21 via FF20. Output E of multiplier 19 of adder 21
_ij sinX 'is added to the output of the gate circuit 29, and the output is input to the selection circuits 8, 22, and 30. The selection circuit 22 is 8
Six-stage shift register that constitutes a storage circuit for channels
This switches whether or not the storage contents of the shift register 23 and the two-stage shift register 24 are to be changed. When S = 0, the A input is selected (storage change), and when S = 1, the B input is selected (storage). Content retention). The output of the 6-stage shift register 23 is a gate circuit
Is summed with Enbepu E _ij in the adder 26 through 25, to generate a modified envelope E _ij, is input to the multiplier 19. The gate circuit 25 passes the input data to the adder 21 when the control input G is 1, and outputs all 0s when G is 0. Thereby, it is possible to select whether or not to multiply the contents of the shift registers 23 and 24 constituting the storage circuit, for example, the waveform sinX 'output from the sine wave memory 12 by the sine waveform data of one module in the past. Here, k (C6, C5, C4 ) is 11 * envelope E _ij and the output of the noise generator 13 enters the FF27 reset input through AND15, FF 17 when the is turned on / off by the noise. Further, when k (C6, C5, C4) is 111, the output of FF18 is set to all 1 by AND14 and FF16, so that the output of multiplier 19 becomes a full-level noise with an envelope. When k (C6, C5, C4) is 110, FF18 is not set, so that the output of the multiplier 19 is equivalent to an output obtained by turning on / off a sine wave with noise and adding an envelope. The selection circuit 28 selects the output of the FF31 or the output of the two-stage shift register 24 and guides it to the adder 21 through the gate circuit 29. GS = 0 * → all 0 GS = 10 → FF31 output GS = 11 → The selection is made like the two-stage shift register 24 output. The selection circuit 30, the FF31, and the gate circuit 32 store data obtained by accumulating all output data for each sampling time. The selection circuit 30 switches between holding and updating the contents of the FF31. The gate circuit 32 sets all data to 0 at the beginning of the sampling time. The latch circuit 33 latches and outputs the content at the timing when the sum of all data for each sampling time is reached. As described above, the control signals C ₀ to
It is possible to computation various waveforms by switching the C ₈ appropriately. Then the operation timing for the control signal C ₀ -C ₈ will be described. Function of the control signal C ₀ -C ₈ As can be seen from the above description is as follows. C ₀ , C ₁ : B input selection of adder 21 C ₂ , C ₃ : Selection of final phase angle data X C ₄ , C ₅ , C ₆ : Degree of phase angle conversion and noise designation C ₇ : Update stored data C ₈ : Whether or not to perform waveform multiplication A desired waveform calculation is performed by appropriately generating these signals C _{0 to} C ₈ for each module. FIG. 8 shows the operation timing of FIG. 3 with reference to the operation start time of the selection circuit 8. φ ₁ and φ ₂ are operation clocks, φ ₁ is read, and φ ₂ is an output clock. The ACK is an address clock for reading a control signal C ₀ -C _8. (1) to (6) show the operation timing of each block in FIG. 3, and show how many bits are delayed from the operation of the selection circuit 8 by each block. Control signal C ₀
Between the C ₈ of each block, the corresponding called selection circuit 8C _2, C ₃ phase angle change circuit 10C _4, C _5, C ₆ selection circuit 22C ₇ selection circuit 28,30C ₀ gate circuits 29C ₁ gate circuits 25C ₈ because there, the timing of the control signal C ₀ -C ₈ becomes as (9) to (12). The data reset by the gate circuit 32 is as shown in (7) because the FF 31 outputs the sum of all data within the sampling time. The latch timing phi ₀ of the latch circuit 33 for the final output is as a may be equal to the final data or module 3, capture the data of the channel 7 timings from the selection circuit 30 (8). FIG. 9 shows the configuration of the control circuit 5. The timing signal generation circuit 50 is provided with basic clocks φ ₁ and φ ₂ , a latch timing signal φ ₀ , and an address clock of the address counter 48.
Generate an ACK. The address counter 48 receives the address clock ACK, and generates addresses A ₀ and A ₁ in synchronization with its rise. Control data memory 49 intended to store the control data C ₀ -C ₈ each module, it is read in synchronism with the address clock. The shift registers 51 to 57 delay the timing of the read control data.
Control signals C _{0 to} C ₈ having timings as shown in FIGS.
Occurs. With them, a desired waveform calculation can be performed. As described above, by to combining the control signals C0~C8 appropriately, for _{example, (1) E ij sin qR} ij (2) E i + 1j sin (E ij sin qR ij) (3) E i + 2j sin (E _ij sin qR _{ij +} E _{i + 1j} sin qR _{i + 1j} ) (4) Generate various waveforms such as (E _{i + 1j +} E _ij sin qR _ij ) · sin qR _{i + 1j} and combinations thereof. be able to. Further, for the sine wave output, the depth of the phase distortion can be designated as shown in FIG. 6, and the module waveform output can be designated as noise or the product of the noise and the sine wave. [Effects of the Invention] As described above in detail, according to the present invention, in a musical sound synthesizer for synthesizing a musical tone waveform by a waveform synthesizing operation sequence over a series of module times, a module time independent operation control signal from a control circuit means. Controlling the operation of each part of the waveform generation circuit means to control the generation of module waveforms and the synthesis of module waveforms, and operation control in which a part of the operation control signal is combined with noise to selectively generate noise. A signal is generated, and the signal on the signal path of the module waveform generation circuit is selectively noise-modulated by the selective noise-forming operation control signal. Therefore, noise modulation can be applied to a desired module waveform in units of a module. Along with the noise-modulated module waveform More complex module waveforms can be generated by selecting and using as musical tone parameters in the schedule time, and these module waveforms can be reflected as components in the synthesized musical tone waveform to be output. As a result, the present tone generator can synthesize a wide variety of musical sound waveforms that cannot be obtained conventionally.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an overall configuration diagram of an electronic musical instrument according to an embodiment of the present invention, FIG. 2 is a time chart showing a time division operation, FIG. 3 is a detailed diagram of a waveform generation circuit, FIG. FIG. 4 is a diagram used to explain phase distortion, FIG. 5 is a detailed diagram of a phase angle changing circuit, and FIG.
The figure is a waveform diagram showing the sine wave phase distortion by the phase angle changing circuit, FIG. 7 is a spectrum diagram corresponding to FIG. 6, FIG. 8 is a time chart of the waveform generation circuit, and FIG. 9 is a block diagram of the control circuit. It is. 3 ... Envelope generation circuit, 4 ... Original phase angle generation circuit, 5 ... Control circuit, 6 ... Waveform generation circuit, 8 ... Selection circuit, 13 ... Noise generation circuit, 14, 15 ... AND gate , 1
6, 17, 18, 27 ... flip-flop, 25 ... gate circuit.

Claims (1)

(57) [Claims] (A) a control circuit (5) for generating operation control signals (C0 to C8) for each module time, and a control circuit (5) for synthesizing a musical sound waveform to be output by a waveform synthesis type operation sequence over a series of module times; A) a tone parameter generating circuit (3, 4) having a phase circuit (4) for generating a phase signal (qRij) for each module time, and an envelope generating circuit (3) for generating an envelope signal (Eij) for each module time. (C) a waveform generating circuit (6) for executing a waveform synthesizing operation sequence based on a musical tone parameter consisting of the phase signal and the envelope signal to synthesize a musical tone waveform; (D) has a waveform memory (12) arranged on the signal path, and generates a module waveform for each module time. A module waveform generating circuit (8-12, 18-20, 25-27), wherein the module waveform generating circuit comprises: (E) a phase signal selecting circuit (8) and an envelope signal selecting circuit (25, 26) And (i) a tone parameter from the tone parameter generation circuit, or (ii) an intermediate generation result of the waveform generation circuit, according to a first part (C2, C3, C8) of the operation control signal. Are selected as input signals to the phase signal selection circuit and the envelope signal selection circuit, respectively, to thereby select a tone parameter to be used for each module time, and include a tone parameter selection circuit (8, 25, 26) as an input port. (F) The output of the waveform memory read in accordance with the output selected by the phase signal selection circuit is selected by the envelope signal selection circuit. Providing an output to generate a module waveform output, wherein the module waveform generation circuit further includes: (G) a noise selection circuit (13 to 18, 27); (I) a second part (C6, C5, C2) of the operation control signal;
According to 4), a noise modulation control circuit (14, 15) that determines the presence or absence of noise modulation and the type of noise-modulated module waveform output; and (J) the presence or absence of the noise modulation by the noise modulation control circuit: A noise modulation circuit (2) that modulates the output of the envelope signal selection circuit (25, 26) with a noise signal output from the noise generation circuit (13).
(K) the noise selection circuit according to the type by the noise modulation control circuit; (i) the second part of the operation control signal is in a first specific state (C6 = 1 , C5 = 1, C4 = 0), a module waveform output to which the noise-modulated output from the envelope signal selection circuit is added to the output of the waveform memory is formed, and (ii) the second portion is The second specific state (C6 = 1, C5 =
When (C4 = 1), the module is configured to form a module waveform output in which the noise-modulated output from the envelope signal selection circuit is added to the output other than the output of the waveform memory, (L Therefore, at a desired module time, according to the state of the second portion, any one of a module waveform output in which the output of the waveform memory itself is noise-modulated and a module waveform output in which the other output is noise-modulated A tone generator, wherein one of the tone generators is output from the module waveform generating circuit. 2. 2. The tone generator according to claim 1, wherein the envelope selection circuit comprises: (i) a sum of a module waveform generated by the module waveform generation circuit at a previous module time and the envelope signal, or ii) A tone generator which selectively inputs one of the envelope signals. 3. 2. The tone generator according to claim 1, wherein said noise modulation circuit gate-controls a signal on said signal path according to an output of said combination circuit.