JP2725924B2 - Decoding method of FM multiplex broadcast signal and FM multiplex broadcast receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FM multiplex broadcast signal decoding system suitable for a mobile FM multiplex broadcast.

[Summary of the Invention] When a mobile FM multiplex broadcast is received by a mobile unit, the transmission quality is extremely poor.
Since the bit rate cannot be so high, transmission is performed using a product code transmitted in packet units.

According to the present invention, in an FM multiplex receiver that receives such a product code signal, optimal decoding can be performed by switching the decoding procedure of an error correction code according to reception conditions.

[0004]

2. Description of the Related Art In recent years, FM multiplex broadcasting has been put to practical use in which digital signals are multiplexed using an empty spectrum region of FM stereo broadcasting to provide new services such as voice broadcasting and text broadcasting other than stereo sound. I have.

FIG. 6 shows an example of a frame configuration in a conventional FM multiplex broadcast of a fixed reception system.

[0006] As shown in FIG.
An 18-bit frame code (FC), a 16-bit mode control code (MC), and one packet
It consists of 90-bit data and an 82-bit parity code, and is configured to transmit 272 × 34-bit data. The error correction code in the frame is
(272, 190).

[0007] In such a transmission procedure of FM multiplex broadcasting, as shown in the figure, transmission is performed diagonally from the upper left to the lower right. For this reason, the receiver is provided with a frame memory, and decodes the error correction code after the entire frame is received.

On the other hand, as shown in FIG. 7, the frame structure of the FM multiplex broadcast of the mobile reception system is such that one packet is composed of 272-bit data followed by a 16-bit block identification code (BIC). 272 packets constitute one frame (272, 192).

[0009]

However, according to the FM multiplex broadcast receiver of the fixed reception system, data cannot be decoded unless all the frames have been received. There is a problem that a time delay occurs. If this receiver is also applied to the mobile reception system, the bit rate of the mobile reception system is lower than that of the fixed reception system, so when the power is turned on to display the station name or when the channel is switched, the Cannot decode the necessary information, which is time-consuming, and poses a practical problem. In addition, when the reception conditions are extremely bad and one frame cannot be completely received, there is a problem that the data cannot be used as received data at all.

[0010] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an FM multiplex broadcast signal decoding system which can receive a mobile reception system FM multiplex broadcast quickly and without error. It is in.

In order to achieve the above object, according to the present invention, in the first aspect, a digital signal is multiplexed on an FM broadcast signal, and one frame includes a data portion composed of a plurality of blocks, and a horizontal and vertical parity portion. In the decoding method of the FM multiplex broadcast signal in the product code format comprising: a means for establishing frame synchronization indicating a vertical error correction break by a block identification code added to the head of each block. It is characterized by.

According to a second aspect, the FM according to the first aspect is provided.
In the decoding method of a multiplex broadcast signal, a means is provided which does not shift to a display process when a parity part is identified by a block identification code added to the head of each block.

Further, in the present invention, an FM broadcast signal is multiplexed as a digital signal, and one frame is composed of a data part composed of a plurality of blocks and a parity part in a horizontal direction and a vertical direction in a product code format. The multiplexed broadcast signal is subjected to horizontal block error correction, and it is checked by CRC whether or not the block error has been corrected.
As a result of the check, when the correction is impossible, in the decoding method of the FM multiplex broadcast signal in which the vertical error correction is performed and then the horizontal error correction is performed again, immediately after turning on the power of the receiver or immediately after switching the channel, If the reception situation is extremely poor and the FM multiplex broadcast signal cannot be received as a complete frame signal, only the horizontal block error correction in the data section is performed, and only the block after the completion of the CRC check is adopted as the received data. It is characterized by comprising means. According to a fourth aspect of the present invention, an FM multiplex broadcast signal in a product code format, wherein the FM multiplex signal is multiplexed as a digital signal, wherein one frame is composed of a data portion composed of a plurality of blocks and respective parity portions in the horizontal and vertical directions. Each time the decoding of one block is completed in the FM multiplex broadcast receiver that receives the block, the consistency between the block counter that is incremented, the value of this block counter, and the block identification code added to the head of each block When the block identification code changes to a predetermined code when the value of the block counter indicates a preset value, it is determined that frame synchronization is achieved. Means.

[0014]

In the mobile reception system, there are blocks in which errors are concentrated even in places with good conditions due to errors due to fading, and there are blocks in which errors do not occur so much even in places with extremely bad conditions. By performing decoding according to the present invention, when conditions are good and frame synchronization is established, the performance of the original product code can be fully utilized and errors after correction can be almost eliminated.
On the other hand, when errors are extremely large, there is a possibility that frame synchronization may not be established, but also in this case, it is possible to secure a certain level of performance by switching to decoding only in the horizontal direction due to the characteristics of errors due to fading. . Further, as described in claim 3, when information is needed immediately, such as when power is turned on, data can be displayed instantaneously by decoding only in the horizontal direction. Further, as described in claim 1, the frame synchronization can be reliably achieved by the block identification code added to the head of each block. In addition, as described in claim 2, when a block is identified as a parity part by a block identification code added to the head of each block, control can be performed so as not to shift to display processing. Further, in the FM multiplex broadcast receiver according to the present invention, each time decoding of one block is completed, the block counter is incremented, and the value of this block counter and the block added to the head of each block are incremented. Check the consistency with the identification code. If the block identification code changes to a predetermined code when the value of the block counter indicates a preset value, the frame synchronization is established. Is determined, frame synchronization can be ensured.

[0015]

FIG. 1 is a block diagram showing an embodiment of an FM multiplex receiver to which the present invention is applied.

The illustrated receiver alternates a synchronous reproduction circuit 1 for reproducing block synchronization and frame synchronization of a received FM multiplex broadcast signal, a changeover switch 2, and a received signal switched in accordance with the reproduced frame synchronization. Frame buffers 3 and 4 to be stored in
CPU 5 that manages the receiving process in a general manner according to the processing procedure of FIG.
(272, 190) Product code decoding circuit 6 for correcting errors in the horizontal and vertical directions of the M multiplex broadcast frame, and CR for checking the CRC code attached to each block
A C check circuit 7, a data buffer 8 for storing display data, and a data display unit 9 for displaying data in the data buffer 8 are provided.

Next, the operation of this embodiment will be described with reference to the flowchart of FIG. Note that the frame configuration of the FM multiplex broadcast of this embodiment is shown in FIG.
0) It is the same as that of the product code, and one packet (block) is composed of a 16-bit block identification code, a 190-bit data part, and an 82-bit parity part.
272 packets consisting of 2 bits of data make 1
A frame is configured.

First, the F received by the synchronous reproduction circuit 1
The block synchronization signal and the frame synchronization signal in the M multiplex broadcast signal are reproduced, and by switching the switch 2 in conjunction with the frame synchronization signal, data for each frame is accumulated in the frame buffer 3 or 4. Prior to decoding the received data, a block counter (not shown) in the CPU 5 is reset (step ST).
1) Then, the block counter is incremented by 1 (step ST2).

First, the horizontal (272, 190) code is decoded (step ST3). The decoded data is transferred to the original frame buffer (step ST4).
This decoding processing is performed until the block counter reaches 272, that is, until the decoding of one frame is completed. If the decoding of one frame is not completed (step ST5 Yes), the next input block is It is checked whether the packet is a packet (190 packets) or a parity (82 packets) (step ST6). In this embodiment,
This check is made based on whether the block counter is 190 or less. However, the check can be made based on whether the block identification code shown in FIG. 7 is BIC1.

In this determination processing, that is, when it is determined that the parity part is the parity part based on the count value of the block counter or based on the block identification code (No in step ST6), the process proceeds to step ST2 without shifting to the display processing.
Returns to and proceeds to the input processing of the next block. On the other hand, if the determination result is a data part (step ST6 Yes), it is determined whether or not the block has been corrected and the CRC check has been completed. If the block has been corrected normally (steps ST7 Yes and ST8 Yes), The block is transferred to the data buffer 8 (step ST9), and can be immediately displayed.

When the count value of the block counter reaches 272, decoding of one frame is completed (step ST5Ye).
s), and then the frame decoding process is executed. In this frame decoding process, first, it is checked whether or not frame synchronization has been established (step ST10). This frame synchronization determines whether or not the change of the block identification code matches the value of the block counter. When the block counter changes from 190 to 191 and the block identification code changes from BIC1 to BIC2, It is determined that frame synchronization has been achieved. Of course, in this determination processing, it is necessary to perform an operation such as forward protection, so as to be robust against errors.

If the frame synchronization has not been established (No in step ST10), decoding in the vertical direction becomes impossible, and the process returns to step ST1 to shift to the decoding processing of the next frame. Immediately after turning on the power, switching channels, or when errors are extremely large, frame synchronization may not be achieved.In such a case, only error correction in the horizontal direction is performed, and the data is used as received data. The data is transferred to the data buffer 8 and displayed on the data display unit 9.

If frame synchronization has been established (step ST10 Yes), it is checked whether or not all the horizontal data portions have been corrected. If all corrections have been completed (step ST11 Yes), vertical decoding is performed. Need not be performed, the process returns to step ST1 and shifts to processing of the next frame. If an error remains in the block of the data portion in the horizontal direction (No in step ST11), the (272, 190) code in the vertical direction is decoded next (step ST1).
2) Then, horizontal decoding is performed again (step ST1).
3). In this case, since it is not necessary to execute the block for which the horizontal correction has been completed, decoding is performed only for the block in which the error remains. As a result, if the code can be corrected and the CRC check has been performed (Step ST14 Yes, ST15 No), only the decoded block is adopted as the received data and transferred to the data buffer 8 (Step ST16). .

As described above, according to the present embodiment, when it is determined that there is no error as a result of the horizontal error correction and the CRC check, the data is immediately transferred to the data buffer 9, so that the time delay is extremely small. Allows data to be displayed. Also, there are many errors and only in the horizontal direction,
If the correction is not completed, error correction in the vertical direction is performed, and then decoding in the horizontal direction is performed again, so that reception can be performed with extremely high accuracy. FIGS. 3 and 4 show characteristics for explaining the effect of the present embodiment. The correction capability in the case of performing vertical and horizontal decoding and in the case of horizontal only is determined by vertical and horizontal decoding, that is, (272, 190) product code. In the case of horizontal decoding,
That is, it can be understood that both the bit error rate and the block error rate are significantly improved as compared with the case of the (272, 190) code.

As described above, in the present embodiment, an example in which the present invention is applied to the frame configuration shown in FIG. 7 has been described. However, the present invention can also be applied to a frame configuration as shown in FIG.

In this frame configuration, four types of BIC1, BIC2, BIC3 and BIC4 are used as block identification codes, and a block indicated by BIC4 indicates a parity block. However, since four types of block identification codes are used, four points for checking the block counter for frame synchronization can be secured in four positions within one frame, and since the blocks are interleaved and sent, FIG. It is necessary to insert a block corresponding to the block number into the frame buffer 8 at the time of the frame buffer transfer in step ST4.

In this embodiment, (272, 190)
Although the product code has been described as an example, the present invention is not limited to this, and completely different codes may be used in the vertical and horizontal directions.

[0028]

As described above, according to the present invention, an FM multiplex broadcast signal can be accurately and promptly received even in the case of the FM multiplex broadcast of the mobile reception system.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an FM multiplex receiver to which an FM multiplex broadcast signal decoding method according to the present invention is applied.

FIG. 2 is a flowchart illustrating the operation of one embodiment of the present invention.

FIG. 3 is an explanatory diagram showing a bit error rate of a (272, 190) product code received by an FM multiplex receiver to which the method of the present invention is applied, in comparison with a block error rate of a (272, 190) code. .

FIG. 4 is an explanatory diagram showing a block error rate of a (272, 190) product code received by an FM multiplex receiver to which the method of the present invention is applied in comparison with a block error rate of a (272, 190) code. .

FIG. 5 is an explanatory diagram showing another frame configuration of the FM multiplex broadcast signal in the system of the present invention.

FIG. 6 is an explanatory diagram showing a frame structure in a conventionally used FM multiplex broadcast of a fixed reception system.

FIG. 7 is an explanatory diagram showing a frame configuration in a conventional FM multiplex broadcast of a mobile reception system.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Synchronous reproduction circuit 2 Changeover switch 3, 4 Frame buffer 5 CPU 6 (272, 190) code decoding circuit 7 CRC check circuit 8 Data buffer 9 Data display part

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Tomohiro Saito 1-10-11 Kinuta, Setagaya-ku, Tokyo Inside the Japan Broadcasting Corporation Broadcasting Research Institute (72) Inventor Masayuki Takada 1-10-11 Kinuta, Setagaya-ku, Tokyo Japan Broadcasting Corporation Broadcasting Research Institute (72) Inventor Satoshi Yamada 1-1-10 Kinuta, Setagaya-ku, Tokyo Japan Broadcasting Corporation Broadcasting Research Institute (56) References JP-A-63-60633 (JP, A) Hei 3-256481 (JP, A)

Claims (4)

(57) [Claims] 1. Decoding of an FM multiplex broadcast signal in a product code form, which is multiplexed as a digital signal on an FM broadcast signal, and one frame is composed of a data part composed of a plurality of blocks and respective parity parts in a horizontal direction and a vertical direction. A method for decoding an FM multiplex broadcast signal, comprising: means for establishing frame synchronization indicating a vertical error correction break by a block identification code added to the head of each block. 2. The FM multiplex broadcast signal decoding method according to claim 1, further comprising: means for not shifting to display processing when the block is identified as a parity part by a block identification code added to the head of each block. A method for decoding an FM multiplex broadcast signal, comprising: 3. An FM multiplex broadcast signal of a product code format, which is multiplexed as a digital signal with an FM broadcast signal, wherein one frame is composed of a data portion composed of a plurality of blocks and respective horizontal and vertical parity portions. Then, error correction of the horizontal block is performed, and whether or not this block error has been corrected is checked by CRC. As a result of the check,
If the correction is impossible, in the FM multiplex broadcast signal decoding method in which the error correction in the vertical direction is performed and then the error correction in the horizontal direction is performed again, the reception status is extremely poor immediately after turning on the power of the receiver, immediately after the channel switching, and When the FM multiplex broadcast signal cannot be received as a complete frame signal, a means is provided for performing only error correction of a horizontal block in the data portion and adopting only a block after completion of a CRC check as received data. A method for decoding an FM multiplex broadcast signal, characterized in that: 4. An FM multiplex broadcast signal of a product code format, which is multiplexed as a digital signal with an FM broadcast signal and one frame is composed of a data section composed of a plurality of blocks and respective horizontal and vertical parity sections. Each time the decoding of one block is completed, the FM multiplex broadcast receiver checks the consistency between the incremented block counter, the value of this block counter, and the block identification code added to the head of each block. And determining means for determining that frame synchronization has been achieved when the block identification code has changed to a predetermined code when the value of the block counter indicates a preset value. An FM multiplex broadcast receiver comprising: