JPH04278741A - Data channel receiver - Google Patents

Abstract

PURPOSE:To efficiently deoarate a pucket by providing a decording information additional circuit which outputs decoding information including multiple position information of the pucket and error detecting information in a receiver which provides a data channel decorder separating the pucket from a transmission signal. CONSTITUTION:An input signal and a clock are reproduced in a clock reproduction circuit 1 and, by receiving this, a synchronizing signal is reproduced in a synchronizing reproducing circuit 2 and the majority decision of a voice mode flag and a data suppression flag is executed. Interleave is cancelled in a de- interleave circuit 4 and an error is corrected by a BCH signal. Data for one superframe is stored in a superframe memory 5 as to be return it to the pucket in an address control circuit 6. The decoding information additional circuit 10 adds an identification element SI after the error correction by BCH, information about the error, miltiple position information from the address control circuit 6 and error information of BEST to the data part of a BEST decoding circuit 8 so as to output them to an output 1b. Therefore, there is no need to have plural output terminals of the decodes and the selection circuit of SI.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data channel receiving apparatus suitable for receiving data broadcasting using a data channel of satellite broadcasting.

0002

SUMMARY OF THE INVENTION The present invention relates to a data channel receiving device, for example, a device for separating packets from a bit stream output from a BS tuner in a data broadcast receiving unit using a data channel of satellite broadcasting. By adding decoding information consisting of multiplexed position information and error detection information to the check bit position of the original header section and outputting it to the receiving terminal together with the data section, multiple identifiers can be read with one terminal. It is possible to output packets, and also to classify the packets according to the multiplexing position within one identifier.

0003

2. Description of the Related Art Data output formats used in conventional data channel decoders are shown in FIGS. 1a, 2a and 2b.

[0004] Regarding the connection between the data channel decoder and various service decoders in the reception section of data broadcasting using the data channel of satellite broadcasting, conventionally, the Telecommunications Technology Council Consultation No. 18 ``Technology related to the use of satellite broadcasting data channel'' As stated in the report regarding the 288-bit packet as is (data output format 1a), or after correcting errors in the header, the identifier (
SI) only in the 272-bit data part (data output format 2a), and in the data part (272, 190)
When a difference set cyclic code (BEST) is used, this BEST is decoded using only 190 information bits (data output format 2b).

[0005] As described above, in the conventional output format, information regarding the multiplexing position was discarded due to packet transmission.

[0006]

[Problems to be Solved by the Invention] The conventional technology has the following problems.

In the output format 1a shown in FIG.
Error correction of the data part (BEST) is performed, which is wasteful.

Furthermore, in the output formats 2a and 2b of FIG.
Since the identifier is limited to one SI, a data channel decoder is required for each SI in order to receive program data composed of a plurality of SIs.

[0009]Furthermore, data channel packets that are multiplexed and transmitted together with satellite broadcast audio can be identified using identifiers other than SI depending on where in the frame matrix the packet is located.
The output formats a, 2a, and 2b cannot be used because they do not output position information.

[0010] Also, BCH(16,5) or BEST
Even if the error cannot be corrected by error correction, the service decoder cannot switch the reception process.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a data channel receiving apparatus configured to efficiently separate packets.

0012

[Means for Solving the Problems] The present invention provides decoding information for outputting decoding information including multiplex position information and error detection information of the packets in a receiving device equipped with a data channel decoder that separates packets from a transmission signal. It is equipped with an additional circuit.

[0013]

[Operation] In the present invention, decoding information consisting of a packet head identifier, multiplexed position information, and error detection information is added to the check bit position of the original header section and output together with the data section to the receiving terminal. By doing this, it is possible to output packets of multiple identifiers from one terminal, and furthermore, depending on the multiplex position within one identifier,
Packets can be classified.

[0014]

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an example of a circuit configuration of a data channel decoder according to an embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a clock recovery circuit that recovers a clock from a bit stream.

Reference numeral 2 denotes a synchronization reproducing circuit that reproduces the frame synchronization signal and the master frame synchronization signal and performs majority decision on the audio mode flag and data suppression flag.

Reference numeral 3 denotes a descrambling circuit for descrambling transmission in the case of an NTSC signal.

[0019] 4 removes interleaving and
For C signal, BCH (63, 56) signal, MUSE
This is a deinterleaving circuit that performs error correction on a signal using a BCH (82,74) code.

Reference numeral 5 denotes a superframe memory that stores one superframe worth of data for converting data arrays into packets.

Reference numeral 6 denotes an address control circuit for controlling the reading of diagonally multiplexed data from the superframe memory 5 and returning it to a packet.

The 288-bit packet data output read from the super frame memory 5 has the data output format 1a shown in FIG.

Reference numeral 7 denotes an error correction/detection circuit that performs error correction/detection of the BCH (16,5) code in the header portion of 288-bit packet data.

Reference numeral 8 denotes an error correction/detection circuit that performs error correction/detection of the BEST code in the data portion of 288-bit packet data.

[0025] 9 is an externally set identifier SI, and 2
This is an SI selection circuit that selects a 72-bit or 190-bit data portion and outputs it as data output formats 2a and 2b.

[0026] 10 includes information about the SI and error after BCH (16, 5) error correction, multiplex position information from address control,
This is a decoding information adding circuit that adds error information regarding BEST and outputs data output 1b.

Data section 19 of output format 1b shown in FIG.
The header part preceding the 0 bit is 5 as shown in Figure 3.
In addition to the bit identifier SI, decoding information includes 8-bit position information indicating the position in the master frame where the packet was sent, BCH (16, 5) error flag 1
It consists of a total of 16 bits: 1 bit for the BEST error flag, 1 bit for the superframe end flag indicating that this is the last packet of the superframe.

[0028] Here, in the above position information, in the NTSC signal, 6 bits indicate the position within the superframe, and the remaining 2 bits indicate the superframe number within the master frame, and in the MUSE signal, 7 bits indicate the superframe position. The remaining 1 bit indicates the superframe number within the master frame.

[0029]

[Effects of the Invention] According to the present invention, decoding information consisting of a packet head identifier, multiplexed position information, and error detection information is added to the check bit position of the original header section and combined with the data section. By outputting to a receiving terminal, packets with a plurality of identifiers can be outputted from one terminal, and packets can be further classified according to multiplexing positions within one identifier.

In the data channel, when packets are identified using the identifier SI, only 32 types can be distinguished. By adding location information and using identification based on the multiplexed location of the packet, the NTSC system can handle up to 704 packets.
The MUSE method can distinguish 4,736 types of packets.

[0031] When transmitting packets continuously and making a majority decision for each bit to improve data reliability, the conventional output format has the problem of being limited by the error correction ability of the BCH (16,5) code. Since the output format according to the present invention can use highly reliable position information, it is possible to fully utilize the correction ability based on majority vote.

[0032] Furthermore, in order to obtain a time reference, conventionally the only methods were to output master frame synchronization separately from the data channel decoder or to reproduce the time from a time packet inside the data channel decoder and output the time.
With the output format according to the present invention, master frame synchronization can be reproduced from position information, so there is no need to provide a new time output.

Conventionally, the only way to detect packet loss or transmission errors on the service decoder side was to use a continuity index or CRC code, but in the output format of the present invention, B
If the service uses EST, errors can be detected simply by detecting the BEST error flag. Also, BCH(1
6, 5) By detecting the error flag, it can be determined that packet loss has occurred.

In the conventional output format, it was necessary to prepare a large number of data channel decoder output terminals and identifier SI selection circuits in advance, but in the output format according to the present invention, only one output terminal is required.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram of an NTSC/MUSE shared data channel decoder.

FIG. 2 is a diagram showing the format of an output signal in FIG. 1;

FIG. 3 is a diagram showing bit allocation in a header section in this embodiment.

[Explanation of symbols]

1 Clock regeneration circuit 2 Synchronous regeneration circuit 3 Descrambling circuit 4 Deinterleaving circuit 5 Super frame memory 6 Address control circuit 7 Error correction/detection circuit for header section 8 Error correction/detection circuit for data section 9 SI selection circuit 10 Decoding Information addition circuit

Claims (2)

[Claims] 1. A receiving device equipped with a data channel decoder that separates packets from a transmission signal, characterized by comprising a decoded information adding circuit that outputs decoded information including multiplex position information and error detection information of the packets. data channel receiving device. 2. The decoding method according to claim 1, wherein the data channel is decoded according to a data output format including a header section including the decoding information including the multiplexed position information and the error detection information, and an identifier. data channel receiver.