JP2719027B2 - Method for manufacturing charge transfer device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a charge transfer device used for a fixed imaging device or the like.

2. Description of the Related Art In recent years, with the development of semiconductor integrated circuit technology, a solid-state image pickup device having a large number of pixels has been realized. As the density of the solid-state imaging device increases, the area of the photodiode in the light receiving section must be reduced, and the area of the charge transfer element region (hereinafter, referred to as a transfer channel) must be reduced. Therefore, reduction of transferable charge amount, that is, reduction of dynamic range as a solid-state image sensor becomes a problem. Was.

 Hereinafter, a conventional charge transfer device will be described.

FIG. 3 is a sectional view of a unit pixel of a conventional solid-state imaging device. In the following description, a conventional charge transfer device will be described using an example of an N-channel type solid-state imaging device that is generally used frequently as an example.

As shown in FIG. 3, a deep N
A mold region 22 is formed, and this portion is used as a photodiode. Further, an N-type region 23 is formed on the semiconductor substrate 21, thereby forming a transfer channel portion of the buried channel type charge transfer device. Next, a P-type isolation region 24 is formed in order to ensure isolation of a photodiode serving as a pixel. This P-type isolation region 24 is generally called a channel stopper. Next, a gate oxide film 25 is formed, and a transfer gate electrode 26 of a buried channel is formed. Next, a shallow P-type region 27 is formed on the surface of the deep N-type region 22 in the photodiode portion.
Is formed to prevent generation of dark current from the interface state on the photodiode surface. Next, after an interlayer insulating film 28 is formed on the surface of the transfer gate electrode 26, a light shielding film 29 for preventing light from entering unnecessary portions is formed. On top of this, the surface protection film 30 of the element
To form Reference numeral 31 denotes a transfer gate unit that controls the flow of charges from the photodiode to the buried channel. By changing the applied voltage, the transfer gate electrode 26 is selectively used for merely transferring charges in a buried channel and reading charges from a photodiode.

In the solid-state image pickup device having such a configuration, in order to increase the number of pixels and achieve higher resolution, the N
By narrowing the width of the mold region 23, thinning the gate oxide film 25, and optimizing the impurity concentration distribution of the N-type region 23, the performance is not reduced even if the unit pixel portion is reduced. I have.

However, in the above-described conventional configuration, the amount of transferable charges in the charge transfer element portion basically has to be reduced in accordance with the reduction in the size of the unit pixel portion. Therefore, there is a problem that the dynamic range of the solid-state imaging device is reduced.

An object of the present invention is to provide a method of manufacturing a charge transfer element that can significantly increase a dynamic range even when unit pixel portions have the same size.

Means for Solving the Problems In order to achieve this object, a method for manufacturing a charge transfer device according to the present invention includes providing a convex portion on a surface of a semiconductor substrate, and forming the convex portion on a vertex plane, a side wall surface, and a base surface. By forming the transfer channel portion, it is possible to manufacture a charge transfer element having a configuration capable of obtaining an effect equivalent to an increase in the transfer channel width as compared with the conventional planar structure by twice the height of the side wall surface. .

Operation With this configuration, the transfer channel width is increased without changing the area and the width of the transfer channel portion occupying the element surface, so that more charges can be carried than before. Therefore, the dynamic range can be increased without increasing the area of the image sensor of the solid-state image sensor. Furthermore, the same amount of charge transfer can be performed with a transfer channel width on the element surface which is narrower than in the related art, and the density and sensitivity of the charge transfer element can be increased by processing the semiconductor substrate as in the related art.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings using a solid-state imaging device as an example. 1 (a) to 1 (j) are cross-sectional views of a pixel portion of a solid-state imaging device in the order of manufacturing steps for explaining a method of manufacturing a charge transfer device according to an embodiment of the present invention, and FIG. 2 (a). (B) is a configuration diagram for explaining an ion implantation angle. First, a method for manufacturing a charge transfer element according to an embodiment of the present invention will be described.

As shown in FIG. 1A, thermal oxidation or CVD (Chemical Vapor Deposition) is applied to the surface of the P-type semiconductor substrate 1.
A first oxide film 2 (for example, a film thickness of 80 nm) is formed by a method, and a resist film is patterned on the first oxide film 2 to form a first mask 3a. Next, as shown in FIG. 1B, the first oxide film 2 and the P-type semiconductor substrate 1 thereunder are anisotropically etched to a depth of 1000 nm by the first mask 3a to form the P-type semiconductor substrate 1. Then, a convex portion 4 is formed. next,
As shown in FIG. 3C, the resist film is patterned again to form a second mask 3b on the surface of the P-type semiconductor substrate 1. Thereafter, the P-type semiconductor substrate 1 is tilted by 45 degrees with respect to the incident ion beam to implant ions for forming a transfer channel such as phosphorus and arsenic. As the acceleration voltage, the amount of impurities implanted into the side wall surface and the base surface of the convex portion 4 is set to 3 ×
When the density is set to 10 ¹² atoms / cm ² , the semi-transparent shielding film (the first oxide film 2 plays this role) penetrates into the P-type semiconductor substrate 1 at the apex surface of the convex portion 4 to 1.5 × An acceleration voltage is selected so that ions of 10 ¹² atoms / cm ² are implanted. Further, in order to realize the image pickup device in which 3 × 10 ¹² atoms / cm ² ions are implanted at the time of the conventional planar transfer channel, it is necessary to provide 3 × 10 ¹² atoms / cm ^{2 on} the side wall surface of the convex portion 4 in order to realize the convex transfer channel of the present invention. × 10 ¹² atoms /
Need to do a cm ² injection. Therefore, unless the set value of the implantation amount of the ion implanter is increased to (3 × 10 ¹² / cos 45 °) in consideration of the 45 ° inclination of the silicon substrate, the same impurity concentration as in the related art will not be obtained.

In FIG. 1 (c), the surface of the P-type semiconductor substrate 1 on the left side wall surface and the left base surface of the convex portion 4 in FIG. No ions are implanted. Next, in FIG. 3D, ion implantation is performed at an inclination of 45 degrees to the left with the same acceleration voltage and implantation amount as in FIG. By these two injections, an N-type region 5 in which an equal amount of impurity is diffused is formed on the left and right side walls, the base surface, and the apex surface of the convex portion 4. Next, FIG. 5E shows a state in which a deep N-type region 6 for forming a photodiode is formed by ion implantation into the surface of the P-type semiconductor substrate 1 using a suitable mask material. When the deep N-type region 6 is thermally diffused, the diffusion depth of the N-type region 5 which is a transfer channel portion also becomes deep. At the time of the ion implantation for forming the deep N-type region 6, the first oxide film 2 may be removed by etching as long as it is shielded by a mask material such as a resist. Next, as shown in FIG. 1F, in order to separate the photodiodes of adjacent pixels, the same P-type isolation region 7 as the P-type semiconductor substrate 1 is formed by an appropriate mask material patterning and ion implantation process. I do. This P-type separation region 7
Is usually called a channel stopper. Next, as shown in FIG. 2G, after the unnecessary first oxide film 2 is removed by etching, the gate oxide film 8 is formed on the surface of the P-type semiconductor substrate 1 by thermal oxidation or CVD. . Next, as shown in FIG. 1H, a transfer gate polysilicon film is deposited on the gate oxide film 8 and patterned to form a transfer gate electrode 9. If necessary, the transfer gate electrode may be formed by oxidizing the polysilicon film and depositing a second-layer polysilicon film. In FIG. 1, the transfer gate electrode of the second layer is omitted to avoid complication of the drawing. Next, a shallow P-type region is formed on the surface of the deep N-type region 6 constituting the photodiode as shown in FIG.
10 is formed to suppress dark current generated from the interface between the gate oxide film 8 and the N-type region 6. Next, after the interlayer insulating film 11 is formed, the light-shielding film 12 is deposited and patterned with a metal film such as aluminum, so that light enters only the photodiode portion, and the other portions are shielded from light.

Here, the first oxide film 2 is formed on the P-type semiconductor substrate 1, but a nitride film or an oxynitride film can be used.

In the case where a charge transfer element used alone is formed instead of the solid-state imaging element, it is not necessary to form the shallow P-type region 10 or the light-shielding film 12 of aluminum or the like in the present embodiment.

FIG. 1 (j) shows the final sectional structure of the solid-state imaging device formed as described above, in a state where the device is covered with a surface protective film 13.

In the present invention, in the above embodiment, the case where the impurity diffusion for forming the N-type region 5 into the convex portion 4 is performed by ion implantation is shown. When the impurity diffusion for forming the N-type region 5 is performed by the oblique ion implantation, the oblique ion implantation of 45 degrees into the P-type semiconductor substrate 1 and the impurity shielding ability at the time of the ion implantation of the apex surface of the convex portion 4 are caused by the side walls. It is desirably twice as large as the surface of the part or the basal plane. For this reason, the thickness of the first oxide film 2 in FIGS. 1A to 1D is important in determining the acceleration voltage for ion implantation. As an example, when a 80-nm silicon thermal oxide film is used as the first oxide film 2 and phosphorus is used as an impurity for forming the N-type region 5, the P-type semiconductor substrate 1 with an ion implantation acceleration voltage of 120 KeV is ion beamed. Is implanted into the P-type semiconductor substrate 1 at the apex plane of the convex part 4 by an angle of 45 degrees with respect to the side wall surface without the shielding film and half the amount of the bottom plane. In FIG. 1 (c), ions are implanted into the right side wall surface and the right basal surface, and at this time, only a predetermined half amount is implanted into the vertex plane of the convex portion 4. next,
When a predetermined amount of impurities are ion-implanted in the left side wall surface and the left base surface in FIG. 1D, a predetermined amount of ions is implanted in the vertex plane together with the amount of implantation in FIG. It will be. When the ion implantation is performed at an angle of 45 degrees, the amount of implantation may decrease due to reflection on the surface. However, as a result of actual measurement on the silicon substrate, 95% or more of the ions diffused normally into the silicon substrate at the angle of 45 degrees. Confirmed that.

FIGS. 2A and 2B are configuration diagrams for explaining the ion implantation angle. FIG. 3A shows a case where the convex portion 4 is formed perpendicularly to the surface of the P-type semiconductor substrate 1, and at this time, the ion implantation is performed at an incident angle of 45 degrees with respect to the surface of the P-type semiconductor substrate 1. By doing so, the incident angles of the ion beam to both the ion implantation surfaces of the side wall surface and the base surface of the convex portion 4 become equal. Therefore, the same amount of impurities is implanted into both ion implantation surfaces. FIG. 2B shows a case where the side wall surface of the convex portion 4 is not perpendicular to the surface of the P-type semiconductor substrate 1 but has an inclination of an angle ω. The ion implantation at this time is performed at an angle of ω / 2 with respect to the surface of the P-type semiconductor substrate 1, so that the incident angle of the ion beam to both the side wall surface and the base surface of the convex portion 4 becomes equal. . The optimum value of the ion implantation angle is determined by the inclination angle of the side wall surface of the convex portion 4.

In the case where a means having no surface direction dependency such as a gas diffusion method or a solid diffusion method other than ion implantation is used as the impurity diffusion method for forming the N-type region 5, the above-described convex portion 4 is used.
Needless to say, the shielding film (first oxide film 2) on the top plane of the surface is unnecessary, and it is only necessary to shield the region where the N-type region 5 is not formed with a mask material such as a thermal oxide film.

In the embodiment described above, the case of the N-channel type charge transfer device using the P-type semiconductor substrate has been described. However, the same effect can be obtained in the case of the P-channel type charge transfer device using the N-type semiconductor substrate.

Effect of the Invention As described above, according to the present invention, the transfer channel region is formed by diffusing impurities into the apex plane, the side wall surface, and the base surface of the convex portion formed on the semiconductor substrate, and the transfer channel is formed on the plane. It is possible to realize an excellent charge transfer element capable of providing the same effect as increasing the area of about twice the height (for example, 1000 nm) of the convex portion as compared with the conventional one.

Therefore, when the charge transfer device according to the present invention is applied to a solid-state imaging device, a reduction in the dynamic range can be prevented even if the unit pixel size is reduced.

[Brief description of the drawings]

1 (a) to 1 (j) are cross-sectional views of a pixel portion of a solid-state imaging device in the order of manufacturing steps for explaining a method of manufacturing a charge transfer device according to an embodiment of the present invention, and FIG. 2 (a). ,
FIG. 3B is a diagram for explaining an ion implantation angle, and FIG. 3 is a sectional view of a unit pixel of a conventional solid-state imaging device. 1... P-type semiconductor substrate (semiconductor substrate), 4.
5. N-type region (other conductivity type region).

Claims (2)

(57) [Claims] A step of forming a convex portion on a semiconductor substrate of one conductivity type; a step of forming a mask for ion implantation on the semiconductor substrate between the convex portions; Oblique ion implantation from the direction opposite to each other,
Forming a charge transfer portion comprising an impurity region of the other conductivity type which is continuous with the apex plane of the convex portion, the side wall surface facing each other, and the base surface of the foot of the convex portion. . 2. The charge according to claim 1, wherein the step of forming the charge transfer portion is a step of ion implantation from a direction that divides an angle between a side wall surface and a base surface of the convex portion into two. A method for manufacturing a transfer element.