JP2704025B2 - Data demodulator - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data demodulator, and more particularly, to a carrier phase control circuit used in a data demodulator.

[Conventional technology]

Conventionally, a carrier phase control circuit of a data demodulation device determines a convergence coefficient for determining the speed or stability of convergence as follows. That is, the convergence coefficient is switched between two and three stages under the control of the timer only when the reception signal is pulled. After the reception signal is pulled in, the convergence coefficient is fixed to a relatively small value for obtaining stability from the convergence speed.

[Problems to be solved by the invention]

In the above-described conventional carrier phase control circuit, the convergence coefficient is fixed to a value that can obtain stability during data transmission after reception of the received signal. However, there is a drawback that they cannot catch up and diverge.

Also, if the convergence coefficient is increased to speed up convergence,
Even if the phase of the received signal is slightly changed, an excessive phase control is attempted, and there is a disadvantage that stability is lacking.

That is, the convergence coefficient is ideally a magnitude corresponding to the magnitude of the phase change of the received signal, and if the convergence coefficient is fixed, sufficient convergence and stability cannot be obtained.

[Means for solving the problem]

A data demodulation device to which the present invention is applied includes a demodulator that demodulates a received signal and outputs a demodulated signal, and outputs a phase-rotated signal by applying a phase rotation to the demodulated signal by a phase control signal. A phase rotation circuit, a determiner for determining the phase-rotated signal to predetermined data point coordinates and outputting a determined signal, and a decoding for decoding the determined signal and outputting received data. And a carrier phase control circuit that processes the phase-rotated signal and the determined signal and supplies the phase control signal to the phase rotation circuit.

According to the present invention, the carrier phase control circuit, a phase error extraction circuit that extracts only a phase error among errors between the phase-rotated signal and the determined signal and outputs a phase error extraction signal, A coefficient control circuit that processes the phase error extraction signal and outputs a coefficient control signal for controlling a convergence coefficient, and smoothes the phase error extraction signal by changing the convergence coefficient under the control of the coefficient control signal. An integrating low-pass filter that outputs an integrated and smoothed and integrated signal; and a first integrator that integrates the smoothed and integrated signal and supplies the phase control signal to the phase rotation circuit. The coefficient control circuit includes a delay unit that delays the phase error extraction signal by a unit time, a subtractor that calculates a difference between the phase error extraction signal and an output signal of the delay unit, and the subtractor Square the output signal of , A low-pass filter for smoothing the output signal of the squarer, and a switch for controlling whether or not to pass the output signal of the low-pass filter by a switching control signal and outputting the coefficient control signal A switching control signal for turning on the switch when the output signal of the low-pass filter exceeds a preset value for a predetermined time or more, and for turning off the switch when the output signal becomes zero. A switching control circuit for generating a control signal, wherein the integration type low-pass filter multiplies the phase error extraction signal by a value obtained by adding a value proportional to the coefficient control signal to a constant value, and varies the convergence coefficient. A variable coefficient unit that outputs a variable coefficient signal indicating the following: a coefficient unit that multiplies the variable coefficient signal by a constant value; a second integrator that integrates an output signal of the coefficient unit; Integral of And an adder for adding the output signal of the adder and the smoothed and integrated signal to the first integrator.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, a data demodulator according to one embodiment of the present invention includes a demodulator 11, a phase rotation circuit 12,
, A decoder 14, and a carrier phase control circuit 15.

Demodulator 11 demodulates the received signal and outputs the demodulated signal. The demodulated signal is supplied to the phase rotation circuit 12.
The phase rotation circuit 12 gives a phase rotation to the demodulated signal by a phase control signal supplied from a carrier phase control circuit 15 described later, and outputs a phase-rotated signal. When the phase control signal is φ, the phase-rotated signal S ′ is expressed by the following equation.

S ′ = S · exp (−j · φ) The phase-rotated signal is supplied to the decision unit 13. Judge
Reference numeral 13 determines the phase-rotated signal at predetermined data point coordinates, and outputs the determined signal. The determined signal is supplied to the decoder 14. Decoder 14 decodes the determined signal and outputs received data.

The carrier phase control circuit 15 is supplied with the phase-rotated signal and the determined signal. The carrier phase control circuit 15 processes the phase-rotated signal and the determined signal and supplies the phase control signal to the phase rotation circuit 12.

The carrier phase control circuit 15 includes a phase error extraction circuit 21 that extracts only a phase error among errors between the phase-rotated signal and the determined signal and outputs a phase error extraction signal. The phase error extraction signal is supplied to the coefficient control circuit 22 and the integrating low-pass filter 23.

The coefficient control circuit 22 processes the phase error extraction signal as described later and outputs a coefficient control signal for controlling the convergence coefficient. The integrating low-pass filter 23 changes the convergence coefficient under the control of the coefficient control signal to smooth the phase error extraction signal.
Integrates and outputs a smoothed and integrated signal. The smoothed and integrated signal is supplied to an integrator 24.

The integrator 24 further integrates the smoothed and integrated signal and supplies a phase control signal to the phase rotation circuit 12. The integrator 24 includes an adder 24a and a delay unit 24b.

The integrating low-pass filter 23 has a variable coefficient unit 31 that multiplies a value obtained by adding a value proportional to the coefficient control signal to a constant value to the phase error extraction signal and outputs a variable coefficient signal indicating a variable convergence coefficient. The coefficient unit 32 multiplies the variable coefficient signal by a constant value. The integrator 33 integrates the output signal of the coefficient unit 32. Integrator
33 comprises an adder 33a and a delay unit 33b. The adder 34 adds the variable coefficient signal and the output signal of the second integrator 33 and supplies the smoothed and integrated signal to the integrator 24.

The phase shift due to the carrier frequency offset or the like is caused by the phase error extraction circuit 21, the integrating low-pass filter 23, and the integrator 24.
Can be canceled by combination with

The coefficient control circuit 22 has a delay unit 41 for delaying the phase error extraction signal by a unit time (sampling interval T). Subtractor 42
Calculates the difference between the phase error extraction signal and the output signal of the delay unit 41. That is, the amount of change per unit time is determined by the combination of the delay unit 41 and the subtractor 42. Square 3
Squares the output signal of the subtractor 42. Low-pass filter 44
Smoothes the output signal of the squarer 43. Low pass filter
The output signal of 44 is supplied to a switch 45 and a switching control circuit 46.

The switch 45 controls whether or not to supply the output signal of the low-pass filter 44 to the variable coefficient unit 32 by a switching control signal supplied from the switching control circuit 46. The output signal of the switch 45 is supplied to the variable coefficient unit 32 as the coefficient control signal. The switching control circuit 46 generates a switching control signal that turns on the switch 45 when the output signal of the low-pass filter 44 exceeds a preset value for a fixed time or more, and turns off the switch 45 when the output signal becomes zero. To generate a switching control signal.

When the switch 45 is on, the output signal of the low-pass filter 44 is supplied to the variable coefficient unit 31, so that the carrier phase control circuit 15 operates to change the convergence coefficient to a value corresponding to the phase error amount. .

The convergence coefficient of the variable coefficient unit 31 affects the response and convergence speed of the phase control. According to the present invention, when a large phase error is detected, the convergence speed is increased to increase the value of the convergence coefficient, and the convergence coefficient value is reduced as the convergence proceeds to prevent overshoot.

Further, the switching control circuit 46 controls such that an instantaneous one such as an impulse hit is ignored.

〔The invention's effect〕

As described above, the present invention changes the convergence coefficient of the carrier phase control circuit according to the phase error,
There is an effect that very fast and stable convergence can be obtained. Further, there is an effect that an instantaneous phase change such as an impulse hit can be ignored.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a data demodulation device according to one embodiment of the present invention. 11: Demodulator, 12: Phase rotation circuit, 13: Judgment device, 14
... Decoder, 15 ... Carrier phase control circuit, 21 ... Phase error extraction circuit, 22 ... Coefficient control circuit, 23 ... Integration type low-pass filter, 24 ... Integrator, 31 ... Variable coefficient unit , 32 ……
Coefficient unit, 33 ... integrator, 34 ... adder, 41 ... delay unit,
42: subtractor, 43: squarer, 44: low-pass filter, 45: switch, 46: switch control circuit.

 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-60-141056 (JP, A) JP-A-2-192346 (JP, A) JP-A-3-40542 (JP, A)

Claims (1)

(57) [Claims] A demodulator for demodulating a received signal and outputting a demodulated signal; a phase rotation circuit for applying a phase rotation to the demodulated signal by a phase control signal to output a phase-rotated signal; A determiner for determining the phase-rotated signal to predetermined data point coordinates and outputting a determined signal; a decoder for decoding the determined signal and outputting received data; And a carrier wave phase control circuit that processes the processed signal and the determined signal to supply the phase control signal to the phase rotation circuit, wherein the carrier phase control circuit has the phase rotated. A phase error extraction circuit that extracts only a phase error among errors between the signal and the determined signal and outputs a phase error extraction signal, and controls the convergence coefficient by processing the phase error extraction signal. A coefficient control circuit that outputs a coefficient control signal of the following; and an integration type low-pass filter that changes the convergence coefficient under the control of the coefficient control signal to smooth and integrate the phase error extraction signal and outputs a smoothed and integrated signal. A band-pass filter, and a first integrator that integrates the smoothed and integrated signal and supplies the phase control signal to the phase rotation circuit. The coefficient control circuit includes: A delay unit that provides a delay of a unit time; a subtractor that calculates a difference between the phase error extraction signal and an output signal of the delay unit; a squarer that squares an output signal of the subtractor; an output of the squarer A low-pass filter for smoothing a signal, a switch for controlling whether or not to pass an output signal of the low-pass filter by a switching control signal to output the coefficient control signal, and an output signal of the low-pass filter But one A switching control circuit for generating the switching control signal for turning on the switch when the value exceeds a preset value for a time or more, and generating a switching control signal for turning off the switch when the value becomes zero. A variable coefficient unit that outputs a variable coefficient signal indicating a convergence coefficient obtained by multiplying the phase error extraction signal by a value obtained by adding a value proportional to the coefficient control signal to a constant value; A coefficient unit for multiplying the variable coefficient signal by a constant value, a second integrator for integrating an output signal of the coefficient unit, and adding the variable coefficient signal and the output signal of the second integrator to add An adder for supplying the smoothed and integrated signal to the first integrator.