JP2896638B2 - QAM demodulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a quadrature amplitude modulation (QA).
The present invention relates to a QAM demodulator for demodulating a modulated wave signal according to M), and more particularly to a QAM demodulator capable of reliably detecting the timing of a synchronization symbol or a pilot symbol with a simple configuration and arithmetic processing to perform phase correction.

[0002]

2. Description of the Related Art An MCA (Multi Channel Access) system is a system in which different users jointly use a plurality of channels, and is widely used for business use. In addition, this MCA system is used not only for voice wireless communication but also for various data communication.

The number of users in this MCA system has been rapidly increasing in recent years, and there are many demands for a system suitable for data transfer. Therefore, digital MC
The specifications of the A system were determined and put into practical use.

In such a system, multi-level QAM (Qua
For example, multi-level quadrature amplitude modulation in which four-value amplitude modulation is performed on carrier signals having phases different by 90 degrees to have a 16-value state is used.

As a modulation method of the digital MCA system, RCR (Research & Development Center fo
(R Radio Systems: Radio System Development Center) In the STD-32 digital MCA system defined as a standard, the M16QAM system is used and four subcarriers are used.

[0006] In wireless communication, the signal strength on the receiving side may change greatly due to a change in propagation conditions.
ontrol (AGC) is indispensable.

For example, an AGC circuit 1 for realizing AGC of a signal by frequency modulation or phase modulation is realized by a circuit as shown in FIG. That is, the integration result of the integrator 3 is processed by the low-pass filter 4a and then input to the gain control terminal of the variable gain amplifier 2 to adjust the gain so that the integrated value of the output of the variable gain amplifier 2 becomes constant. I was In this case, since the amplitude of a signal obtained by frequency modulation or phase modulation is always constant, such processing can be realized.

By the way, since the QAM signal also has information on the amplitude value, the integrated value of the amplitude value is not always a stable value. Accordingly, AGC cannot be realized using a value obtained by integrating the amplitude value of the signal as shown in FIG.

Here, the multilevel QAM modulated signal can be expressed by the following equation. I (t) = A (t) cosφ (t) Q (t) = A (t) sinφ (t) That is, this multi-level QAM modulation signal is modulated so as to have information on phase and amplitude.

As described above, the AGC and the phase correction for the multi-level QAM modulated signal having information also in the amplitude component are performed as shown in FIG.
In general, the following operation is performed using a circuit as shown in FIG.

First, the demodulation circuit 4 performs quadrature demodulation to separate an in-phase component I (T) and a quadrature component Q (T).
Then, the synchronization detector 5 detects a synchronization symbol from I (T) and Q (T), and the timing extractor 6 determines the timing of the synchronization symbol from the synchronization symbol. The phase / amplitude corrector 7 uses the amplitude value and the phase value of the synchronization symbol that are known in advance to obtain I (T) and Q (Q).
The amplitude correction (AGC) and the phase correction of (T) are performed.

In this case, synchronization detection must be performed by the synchronization detector 5 in a state where the amplitude value before performing AGC is indefinite, which is a very difficult process. That is, although the detection is performed using the fact that the synchronization symbol is determined by both the amplitude value and the phase angle, it is not possible to perform the detection in an undefined state. There was a problem that a complicated thing was required in terms of an algorithm.

That is, the detection of a synchronization symbol having a predetermined phase by the synchronization detector 5 is performed as follows. Here, assuming that the amplitude is A (T) and the phase is φ (T), tanφ (T) = (A (T) sinφ (t) / A (T) cosφ (t)) = (Q (T) / I (T)).

Therefore, φ (T) = Arctan (Q (T) / I (T)).

Thus, I is independent of the amplitude A (T).
Φ (T) can be obtained from (T) and Q (T), and the process of detecting the phase φ (T) is performed by the phase detection unit 5a in FIG. Further, the phase φ (T) detected in this way is compared with the phase of the synchronization symbol read from the phase table 5c by the phase comparator 5b, and the position of the synchronization symbol is detected.

[0016]

In such a synchronization detection process, there is a problem that a division is required to remove the amplitude value A (T). The circuit for realizing this division has a generally more complicated configuration than processing such as integration. Further, since the operation of Arctan is required to obtain the phase φ (T), the processing becomes complicated. Also, a large amount of processing time is required for processing such as table reference.

Further, in addition to the above-described phase-based synchronization detection,
Detection from amplitude may also be performed incidentally. In this case, the synchronization symbol having the maximum amplitude value is detected by the synchronization detector 5.
It is necessary to detect at least one frame of amplitude value information, and to search from the stored contents. Therefore, the synchronization detection from the amplitude also has a problem that the circuit for storing the amplitude value information becomes large in scale.

Therefore, even when the processing is realized by the DSP, there is a problem that the arithmetic processing becomes troublesome and a high-speed operation is required.

The present invention has been made in view of the above points, and an object of the present invention is to accurately detect synchronization by a simple configuration and calculation, and to perform phase correction based on the result of synchronization detection in this manner. It is an object of the present invention to realize a QAM demodulator capable of demodulating a modulated wave signal.

[0020]

SUMMARY OF THE INVENTION The inventor of the present application has conducted intensive studies to improve the disadvantages of the complexity of arithmetic and processing circuits in detecting synchronization in a conventional QAM demodulator. The present invention has been completed by focusing on the relationship between the number of consecutive synchronization symbols and the phase angle error, and finding a new method for detecting the synchronization symbol by a simple method based on the phase angle error.

Accordingly, the present invention, which is means for solving the above-mentioned problems, is configured as described below.

That is, the present invention, which is a means for solving the problem, comprises a frame composed of an arbitrary number of continuous symbols at a predetermined phase angle on a circle passing through a symbol having a maximum amplitude on a signal space coordinate. In a QAM demodulator that demodulates a QAM signal including a synchronization symbol and a pilot symbol inserted in the middle of a frame to facilitate phase correction, a symbol timing reproduction signal almost synchronized with a symbol timing on a transmission side, When there are a reproduction circuit for reproducing a symbol signal composed of orthogonal components I (T) and Q (T), and M synchronization and pilot symbols determined to have the maximum amplitude in a predetermined period The upper M values of the amplitude value of the symbol signal are extracted in a predetermined period, and the extracted M
An AGC circuit that performs gain adjustment using an average value or an integrated value of the amplitude values of the symbol signals, and an SGC circuit that performs continuous S synchronization when there are S synchronization symbols in a predetermined period.
When calculating the error (phase angle error) with respect to the phase angle of the synchronization symbol in the number of symbols, the predicted components I (T) and Q (T) of the second and subsequent synchronization symbols are replaced with the synchronization symbol of the immediately preceding synchronization symbol. Si calculated from the difference α from the phase angle
Using the values of nα and cosα as coefficients, a product-sum operation is performed. The predicted components I (T) and Q (T) of the second and subsequent synchronization symbols obtained by the product-sum operation and the reproduced symbol signal A phase angle error detection circuit that obtains a phase angle error by comparing the components I (T) and Q (T), and detects a symbol position where the phase angle error obtained by the phase angle error detection circuit has a minimum value. A minimum value detection circuit for detecting a synchronization symbol from a symbol position having the minimum value and performing phase correction.

[0023]

In a QAM demodulator which is means for solving the problem, when receiving a QAM signal in which a predetermined number M of synchronization symbols and pilot symbols are determined to have a maximum amplitude within a predetermined period, Focusing on the upper M amplitude values of the amplitude value during a predetermined period , storing the values, and calculating the error between the average or integrated value of the stored amplitude values and the value determined to be the maximum amplitude on the demodulation side. Is adjusted so that approaches zero.

Then, when there are S synchronization symbols within a predetermined period, an error (phase angle error) with respect to the phase angle of the synchronization symbol is obtained for any continuous S symbols, and the phase angle error is calculated. The synchronization symbol is detected from the symbol position where is the minimum value. In this case, the predicted components I (T) and Q of the second and subsequent synchronization symbols
(T) is obtained by a product-sum operation using the values of sin α and cos α calculated from the difference α from the phase angle of the immediately preceding synchronization symbol as a coefficient, and the second and subsequent synchronizations obtained by the product-sum operation The expected component of the symbol I (T)
And Q (T) and the reproduced symbol signal component I (T)
And Q (T) to determine the phase angle error. Then, phase correction is performed based on the detected synchronization symbols.

[0025]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a configuration diagram showing a configuration of synchronization detection of a characteristic portion of the QAM demodulator of the present invention, FIG. 2 is a configuration diagram showing a principle configuration of a main part around the synchronization detection, and FIG. FIG. 1 is a configuration diagram illustrating an overall configuration of a QAM demodulator according to the present invention. 1 to 3, the same items are denoted by the same reference numerals. In this embodiment, the number of subcarriers is 4
The case will be described as an example.

First, the overall configuration of the QAM demodulator, its operation, and an outline of the processing procedure will be described with reference to FIG. 3, and then the relationship between AGC and synchronization detection, which are characteristic parts of the present invention, and the processing contents will be described. This will be described with reference to FIGS.

The QAM demodulator shown in FIG. 3 is roughly divided into a quadrature demodulator 8 for performing subcarrier separation and quadrature demodulation.
A symbol extracting unit 9 for extracting symbol data;
It is divided into an AGC circuit 10 that performs AGC on the amplitude value, a phase correction unit 20 that performs phase correction, and a data demodulator 30 that performs data demodulation. The reproducing circuit includes a quadrature demodulation unit 8 and a symbol extraction unit 9. AG
The C circuit 10 and the phase correction unit 20 are shown in detail in FIGS. The description will be made below for each part.

[Subcarrier Separation] In FIG. 3, a received signal received by an antenna (not shown) and converted into an electric signal is frequency-converted into a modulated wave signal having an intermediate frequency fR ′, Supplied to And
The same number of demodulated signals as the number of subcarriers are converted by the quadrature modulator 8 into in-phase components (I signals: I1 (t), I2 (t), I3
(T), I4 (t)) and a quadrature component (Q signal: Q1
(T), Q2 (t), Q3 (t), Q4 (t)).

FIG. 4 is an explanatory diagram schematically showing the arrangement of the subcarriers. Four subcarriers (Sub1 to Sub4) are arranged around a carrier frequency f0. Here, the subcarriers are arranged at intervals of 4.5 kHz, and the preceding center frequency is f0-6.75.
kHz, f0 -2.25 kHz, f0 +2.25 kHz
z, f0 +6.75 kHz.

In order to demodulate a modulated wave signal having such subcarriers, in a conventional general apparatus, the signals are supplied to four quadrature demodulators equal in number to the subcarriers. Each of the four quadrature demodulators has a frequency f of the intermediate frequency signal.
The frequency fL of the difference between R 'and the frequency of the desired subcarrier
(1) to quadrature signals of fL (4) (2
A local oscillation signal from a local oscillator that generates signals (sin component and cos component) is also supplied. Thus, quadrature demodulation and subcarrier separation are performed.

However, in such a conventional general demodulation (subcarrier separation) system, the same number of local oscillators as the subcarriers are required to separate the subcarriers.
There was also a problem that the circuit configuration became complicated.

To this end, the inventor of the present application has already proposed a method of separating subcarriers using a local oscillator having a smaller number of subcarriers on April 21, 1995, and using this technique. It is possible to

That is, in a QAM demodulator for performing quadrature demodulation on a modulated wave signal using a plurality of subcarriers, the first quadrature demodulation is performed on the modulated wave signal before the subcarriers are separated, and the in-phase component and the quadrature component are separated. And a second quadrature demodulation for the in-phase component and the quadrature component using the frequency of the difference between the center frequency of the modulated wave signal and the subcarrier, and a signal from a local oscillator smaller than the number of subcarriers. Using a quadrature demodulator,
An arithmetic processing circuit for arithmetically processing the result obtained by the second quadrature demodulation; and an LPF for filtering the arithmetic processing result with the bandwidth of the subcarrier. Demodulation with orthogonal components is performed.

By doing so, it becomes possible to separate subcarriers with a smaller number of oscillators than the number of subcarriers in a modulated wave signal using a plurality of subcarriers. As described above, the number of oscillators can be reduced, and the circuit configuration and scale can be reduced. It is also advantageous when processing is performed by a DSP. Furthermore, each frequency of the local oscillator used to separate the subcarriers is a simple integer ratio. This is because the frequency intervals of normal subcarriers are equal. As a result, the original frequency used for frequency division, multiplication, etc. can be shared. This also works advantageously in the case of processing by the DSP.

[Symbol extraction] On the transmitting side, FIG.
As shown in (1), both the in-phase component I (T) and the quadrature component Q (T) of the orthogonal code are generated as signals having a plurality of stepwise levels. Here, four levels are shown. When this is demodulated by the quadrature demodulator 8, FIG.
The analog signal has a gentle slope as shown in FIG. Therefore, the symbol extraction unit 9 reproduces the symbol clock by reproducing the symbol timing (FIG. 5C). Then, the symbols are extracted from the orthogonal codes of the analog signal using the reproduced symbol clock (FIG. 5D). In this way, the symbols are extracted and the orthogonal codes (I1 (T), I2 (T),
I3 (T), I4 (T), Q1 (T), Q2 (T), Q
3 (T), Q4 (T)).

[AGC] As shown in FIG. 2 , a variable gain amplifier 11 for performing amplification with a variable gain is arranged in the AGC circuit 10, and the gain is controlled by a control signal described later supplied to a gain control terminal. Is adjusted to realize AGC.
Here, for the sake of explanation, only one of the signal processing systems for four subcarriers is shown in FIG. 2, but in the overall circuit configuration corresponding to FIG. Is what you do.

First, in FIG. 2, the amplitude value extractor 12 receives the output signal of the variable gain amplifier 11 and extracts the amplitude value. In this case, the amplitude value is extracted by I ² (T) + Q
² (T) or (I ² (T) + Q ² (T)) ^1/2 .

When a QAM signal having M synchronization symbols and pilot symbols determined to have the maximum amplitude during a predetermined period is received, the error extraction unit 1
3, receives amplitude information from the amplitude extraction section 12, a predetermined
The upper M amplitude values of the amplitude values during the period are stored. Then, an average value or an integrated value of the stored amplitude values is obtained.
The variable gain amplifier 11 is controlled so that the error between the average value or the integrated value and the value determined as the maximum amplitude on the demodulation side approaches zero.
A control signal for adjusting the gain of the control signal is generated.

Further, the integrator 14 integrates the control signal generated by the error extractor 13 and multiplies the time constant so that the control system of the AGC circuit operates stably.

Therefore, the variable gain amplifier 11 receives the control signal adjusted as described above, performs gain adjustment, and generates an orthogonal code whose amplitude value has been corrected. That is, such processing is performed for each subcarrier, and the orthogonal code (I
1 (T), I2 (T), I3 (T), I4 (T), Q1
(T), Q2 (T), Q3 (T), Q4 (T)).

According to such an AGC process, the process can be performed without going through a synchronization detection procedure which is conventionally required, and the amplitude can be optimally corrected for the QAM signal. In addition, since the proper amplitude correction is performed here, the process of synchronization detection and phase correction at the subsequent stage becomes easy.

[Phase Correction] The phase corrector 20 corrects the phase of the orthogonal code whose amplitude has been corrected by the AGC circuit 10.

Here, the carrier angular frequency on the transmitter side is ω
As c, the difference from the demodulation angular frequency on the receiver side is θ (t)
In this case, if both the frequency on the transmitter side and the frequency on the receiver side are stable, the above θ (t) becomes proportional to the time t.

Conventionally, θ (t) is corrected when the value of the nominal vector is known in advance, that is, when the pilot symbols Ip and Qp are transmitted. In this case, a conventional general phase correction unit obtains a phase difference between data actually received during the pilot symbol period and the pilot symbol, and performs correction (phase estimation) based on the phase difference data. I was

However, to perform such a correction, the calculation of the trigonometric function must always be performed. For this purpose, it is necessary to always perform series expansion or table reference,
There was a problem that processing became complicated. Therefore, even when the processing is realized by the DSP, there is a problem that the arithmetic processing becomes troublesome and a high-speed operation is required.

To this end, the inventor of the present application has already obtained a fixed coefficient on April 12, 1995,
A method of performing phase correction according to this coefficient has been proposed.
It is possible to use this technique.

That is, in the phase corrector 23, a pilot symbol I having a predetermined phase and amplitude is determined.
When demodulating a multi-level QAM modulated signal into which p and Qp are inserted, when receiving pilot symbols Ip and Qp of the multi-level QAM modulated signal, the pilot symbols Ip and Qp are received.
Β and c corresponding to the phase difference β between the true values Io and Qo
osβ is determined as a fixed-value phase difference coefficient, and the phase correction is performed by integration and addition / subtraction using the phase difference coefficients sinβ and cosβ and the in-phase component Ir and quadrature component Qr in each symbol of the received data to obtain the true value Io. , Q
It is possible to ask for o. This makes it possible to perform highly accurate phase correction by a simple operation of integration and addition / subtraction.

In this case, it is necessary to accurately detect the synchronization by the synchronization detector 21. Therefore, synchronization detection is performed using a synchronization detector 21 having a configuration as shown in FIG.

In this method, when S synchronization symbols exist continuously in a predetermined period, an error (phase angle error) with respect to the phase angle of the synchronization symbol in the continuous S symbols is determined. The predicted components I (T) and Q (T) of the second and subsequent synchronization symbols are multiplied by using the values of sinα and cosα calculated from the difference α from the phase angle of the immediately preceding synchronization symbol as coefficients. The predicted components I (T) and Q (T) of the second and subsequent synchronization symbols obtained by the sum operation, and the components I (T) and Q (T) of the reproduced symbol signal are obtained. Are compared to determine the phase angle error, and the timing at which this phase angle error is the minimum value is determined as a synchronization symbol. Since the amplitude values of the I (T) and Q (T) signals input to the synchronization detector 21 have already been corrected by the above-mentioned AGC, such a method of the phase angle error becomes possible.

First, the method will be described in detail with respect to the phase angle error with reference to FIG.

The sum-of-products arithmetic unit 21a has a predetermined
Using the values of sinα and cosα calculated from the difference α in phase angle between the first synchronization symbol and the second synchronization symbol obtained as a coefficient, the predicted component I ( T) and Q (T) are obtained in advance.

It should be noted that the orthogonal component In at a certain phase angle In
Based on (T) and Qn (T), the predicted orthogonal components In + 1 (T) and Qn + 1 (T) corresponding to the next phase angle
Is obtained by the following equation.

In + 1 (T) = In (T) cosα−Qn (T) sinα Qn + 1 (T) = In (T) sinα + Qn (T) cosα Therefore, the prediction delayed by the one-symbol delay unit 21b is performed. The comparator 21c compares the components I (T) and Q (T) with the components of the reproduced symbol signal to output a phase angle error D21. Therefore, the reproduced symbol signal is actually 2
If it is the first synchronization symbol, the comparison results substantially match, and the phase angle error D21 becomes a small value. Conversely, if the reproduced symbol signal is not the second synchronization symbol, the comparison results do not match, and the phase angle error D21 has a large value.

[0055] In the same manner, sum-of-products arithmetic unit 21e, it
Calculated from the phase angle difference α ′ between the predetermined second synchronization symbol and the third synchronization symbol.
A predicted component value of the third synchronization symbol is obtained by a product-sum operation using the values of α ′ and cosα ′ as coefficients.

Accordingly, the comparator 21g compares the predicted component value delayed by the one-symbol delay unit 21f with the reproduced symbol signal component, and outputs a phase angle error D32. For this reason, if the reproduced symbol signal is actually the third synchronization symbol, the comparison results substantially match, and the phase angle error D32 becomes a small value. Conversely, if the reproduced symbol signal is not the third synchronization symbol, the comparison results do not match, and the phase angle error D32 has a large value.

Here, at the timing when the comparator 21g performs the comparison and outputs the phase angle error D32, the one-symbol delay unit 21d outputs the phase angle error D21 from the above-described comparator 21c. Accordingly, the adder 21h adds D32 and D21 to detect whether or not the minimum value detector 21i has the minimum value. Here, considering the timing at which the third synchronization symbol S3 is supplied, D32 and D21 with delay are given.
Are simultaneously added at the minimum value, and are detected as the minimum value by the minimum value detector 21i. Accordingly, the minimum value of the phase angle error is detected as a synchronization symbol at the timing of the detected synchronization symbol S3.

As described above, the detection of the phase angle error does not require the complicated division as described in the conventional method.

In this method, attention needs to be paid only to about three consecutive symbols, and it is not necessary to search for a phase angle error in a certain section (conventionally, one frame). However, attention may be paid to more symbols.

Therefore, the memory capacity and the operation circuit can be saved as compared with the conventional apparatus, and the apparatus can be downsized. In addition, simplification of search processing and arithmetic processing can be realized,
If the processing capacity is the same as the conventional one, the calculation becomes faster. If the processing time is the same as the conventional one, a low-speed processing device can be used.

That is, by performing the synchronization detection described here, a fixed coefficient is obtained at the timing of the synchronization symbol as has already been proposed by the present applicant.
A method of performing phase correction according to this coefficient can be easily realized.

[Data Demodulation] As described above, the orthogonal code whose amplitude and phase have been corrected is demodulated by the data demodulator 30 in accordance with a predetermined algorithm to obtain bit stream output digital data.

[Effect: Comparison with Conventional Example] As described above, a QM signal having a predetermined number of M synchronization and pilot symbols determined to have a maximum amplitude within a predetermined period is received. in the case of, place
Paying attention to the top M amplitude values of the amplitude value during a certain period ,
The variable gain is adjusted so that the error between the average or integrated value of the stored amplitude values and the value determined to be the maximum amplitude on the demodulation side approaches 0, and the variable gain is adjusted during a predetermined period. If there are S synchronization symbols of
For each of the symbols, an error with respect to the phase angle of the synchronization symbol (phase angle error) is obtained, and the synchronization symbol is detected from the symbol position where the phase angle error has a minimum value. In this case, the predicted component I of the second and subsequent synchronization symbols
(T) and Q (T) are obtained by the product-sum operation using the values of sinα and cosα calculated from the difference α from the phase angle of the immediately preceding synchronization symbol as coefficients, and are obtained by the product-sum operation. A phase angle error is obtained by comparing the predicted components I (T) and Q (T) of the second and subsequent synchronization symbols with the components I (T) and Q (T) of the reproduced symbol signal. . Then, the phase correction is performed based on the detected synchronization symbol.

As a result, an accurate synchronization detection process can be performed by a simple configuration and calculation after the AGC process itself is performed easily and accurately. Therefore, it is possible to use a simpler configuration in terms of processing circuit hardware and processing algorithm while maintaining accuracy as compared with the conventional apparatus.

[0065]

As described in detail above, in the present invention,
QA in which the number of synchronization symbols and pilot symbols determined to have the maximum amplitude within a predetermined period is M
When receiving the M signal, pay attention to the upper M amplitude values of the amplitude value in a predetermined period , store them, and calculate the average value or integrated value of the stored amplitude values and the maximum value on the demodulation side. The variable gain is adjusted so that the error from the value determined as the amplitude approaches 0, and when there are S synchronization symbols in a predetermined period, the synchronization is performed for any consecutive S symbols. An error with respect to the phase angle of the symbol (phase angle error) is obtained, and a synchronization symbol is detected from a symbol position where the phase angle error has a minimum value. In this case, the predicted components I (T) and Q (T) of the second and subsequent synchronization symbols are
The values of sinα and cosα calculated from the difference α from the phase angle of the immediately preceding synchronization symbol are obtained by a product-sum operation using coefficients, and the second and subsequent synchronization symbols obtained by the product-sum operation are predicted. Components I (T) and Q
(T) and the components I (T) and Q of the reproduced symbol signal
(T) to determine the phase angle error. Then, the phase correction is performed based on the detected synchronization symbol.

As a result, after performing the AGC process itself easily and accurately, an accurate synchronization detection process can be performed with a simple configuration and calculation. Therefore, it is possible to use a simpler configuration in terms of processing circuit hardware and processing algorithm while maintaining accuracy as compared with the conventional apparatus.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a configuration of a main part of a QAM demodulation device of the present invention.

FIG. 2 is a configuration diagram showing a detailed configuration of a main part of the QAM demodulation device of the present invention.

FIG. 3 is a configuration diagram illustrating an overall configuration of a QAM demodulator according to the present invention.

FIG. 4 is an explanatory diagram showing an arrangement of four subcarriers.

FIG. 5 is an explanatory diagram showing a state of symbol extraction.

FIG. 6 is a configuration diagram showing a configuration of a conventional AGC circuit.

FIG. 7 is a configuration diagram showing a configuration of a conventional circuit for performing amplitude correction and AGC.

FIG. 8 is a configuration diagram showing a conventional phase detection circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 AGC circuit 20 Phase correction part 21 Synchronization detector 21a Product-sum operation unit 21b One-symbol delay unit 21c Comparator 21d One-symbol delay unit 21e Product-sum operation unit 21f One-symbol delay unit 21g Comparator 21h Adder 21i Minimum value detector

Claims (1)

(57) [Claims] 1. A synchronization symbol of a frame composed of an arbitrary number of continuous symbols at a predetermined phase angle on a circle passing through a symbol having a maximum amplitude on signal space coordinates.
Q for demodulating a QAM signal including a pilot symbol inserted in the middle of a frame to facilitate phase correction
In the AM demodulator, the orthogonal components I (T) and Q
(T), and when there are M synchronization and pilot symbols determined to have the maximum amplitude within a predetermined period,
An AGC circuit for extracting the upper M values of the amplitude value of the symbol signal in a predetermined period and performing gain adjustment using the average value or integrated value of the extracted amplitude values of the M symbol signals; In a case where S synchronization symbols are continuously present in a predetermined period, an error (phase angle error) with respect to the phase angle of the synchronization symbol in the continuous S symbols is calculated by 2
The predicted components I (T) and Q (T) of the next and subsequent synchronization symbols are represented by a difference α from the phase angle of the immediately preceding synchronization symbol.
Is calculated by a product-sum operation using the values of sinα and cosα calculated as coefficients, and the predicted component I of the second and subsequent synchronization symbols obtained by the product-sum operation is calculated.
(T) and Q (T) and the component I of the reproduced symbol signal
(T) and Q (T) are compared to determine a phase angle error, and a minimum value for detecting a symbol position at which the phase angle error determined by the phase angle error detection circuit is a minimum value A QAM demodulator, comprising: a detection circuit for detecting a synchronization symbol from a symbol position having a minimum value and performing phase correction.