JP2702277B2 - Microcomputer with built-in PROM - Google Patents

Description

The present invention relates to a semiconductor device incorporating a PROM,
In particular, it relates to a microcomputer with a built-in PROM.

[Conventional technology]

The configuration of a conventional PROM built-in microcomputer will be described with reference to the drawings.

FIG. 3 is a schematic diagram showing a configuration of a conventional PROM built-in microcomputer. In the figure, 1 is a PROM that can be written by a user after manufacture and can hold data even when power is not supplied, 2 is a RAM that can be read and written at any time and data is lost when power is not supplied, and 8 is a data ROM A microcomputer core 9 that performs processing of the RAM 9 and a plurality of signal lines
An address bus that distinguishes OM1 and external devices and selects an arbitrary address inside RAM2 or PROM1, 10 is composed of multiple signal lines, and can be used between PROM1, RAM2, registers and external circuits of arbitrary addresses. A data bus 11 for sending and receiving data, 11 is an address from which the microcomputer core 8 outputs an address, and a built-in PR.
A microcomputer mode line that reads and processes instructions and data from OM1, RAM2, external devices, etc., and indicates whether or not the microcomputer mode is set. The microcomputer mode line is set to "1", and the write mode or verification mode is set to "0". It is shown that.

12 is a write / indicate which indicates write mode or verify mode.
Verification * When the mode line is "1", the function of the microcomputer core 8 is stopped and the PROM1 of the address given from the outside is
When the write mode in which externally applied data is written is “0”, the function of the microcomputer core 8 is stopped,
This shows a verification mode in which data is read out from the PROM 1 at an address given from the outside. A write line 13 instructs the PROM 1 to write data, and is written when it is "1". 14 is address bus 9, data bus 10, PROM1, RAM
2. A microcomputer with a built-in PROM composed of a microcomputer core 8 and has three modes: microcomputer, writing, and verification.

FIG. 4 is a schematic diagram showing a writing method of a conventional microcomputer with a built-in PROM. In the figure, 15 is generally PROM
A PROM writer used when writing 1 is used, 16 is an external comparison circuit that can compare data of the data bus width at a time, and 17 is a holding register that holds write data of the data bus width.

Next, the operation of an example of a conventional PROM built-in microcomputer will be described with reference to the drawings. First, the operation of the PROM built-in microcomputer in three modes will be briefly described.

First, in the microcomputer mode, the microcomputer core 8 outputs an address, and commands and instructions from the built-in PROM1, RAM2, and external devices.
Read and process data. Next, in the write mode, the function of the microcomputer core 8 is stopped, and the externally applied data is written into the PROM 1 at the externally applied address. In the verification mode, the function of the microcomputer core 8 is stopped, and data is read out from the PROM 1 at the address given from the outside. Therefore, the write mode and the verification mode are used to write commands and data necessary for processing in the microcomputer mode to the PROM1. A write operation to one address and a verification operation are performed, and if the data is correctly written, the same procedure is performed for the next address.

Next, the operation of writing data to PROM1 will be described in detail. For one address, a writing operation is first performed in the shortest time by the writing means.

The PROM writer 15 is connected to the microcomputer mode line 11 by means not shown.
To “0” and the write / verify * mode line 12 to “1”. The microcomputer 14 with the built-in PROM enters the write mode.

Data to be written to the PROM 1 is set in the holding register 17 by means not shown. An address is given from the PROM writer 15 to the address bus 9, and the data is transferred from the holding register 17 to the data bus 10.
And the PROM writer 15 sets the write line 13 of the PROM built-in microcomputer 14 to "1" for a minimum time. As a result, the data on the data bus 10 is written to the PROM1.

Next, the operation of verifying the data of PROM1 will be described in detail. When the external comparison circuit 16 of the PROM writer 15 verifies whether the data used for writing and the read data are equal, the PROM writer 15 sets the write / verification * mode line 12 to “0” by means not shown in the drawing. ". As a result, the PROM built-in microcomputer 14 enters the verification mode. Continue PR
The address is given from the OM writer 15 to the address bus 9 and the PROM
When a read signal is given from the writer 15 to the microcomputer 14 with built-in PROM, data is read from the PROM 1 of the microcomputer 14 with built-in PROM to the PROM writer 15 via the data bus 10.

The external comparison circuit 16 of the PROM writer 15 verifies whether the value of the holding register 17 matches the read data,
If they match, the same procedure is performed for the next address. If they do not match, the writing means performs the writing operation for a long time again. That is, the write line 13 in the write procedure is set to "1" for a longer time, and the external comparison circuit
Using 16, it is verified again whether the value of the holding register 17 is equal to the read data. If they match, the same procedure is performed for the next address. If they do not match, the writing is stopped and the PROM 1 is notified that writing is not possible. Repeat this procedure as many times as necessary.

[Problems to be solved by the invention]

The conventional microcomputer with a built-in PROM is configured as described above, so it is necessary to verify the data written in the PROM with a PROM writer or the like, and since there is a means to output the PROM data to the outside of the device, the PROM There is a problem that the contents of the PROM can be easily read from the outside, and it is difficult to keep the contents of the PROM secret.

The present invention has been made in order to solve the above problems, and a PROM that cannot easily read the contents of a PROM from the outside and can keep the contents of the PROM secret.
The purpose is to obtain a built-in microcomputer.

[Means for solving the problem]

A microcomputer with a built-in PROM according to the present invention is a microcomputer with a built-in PROM having a built-in microcomputer core and a PROM, which can be written by a user after manufacture and can retain data even when power is not supplied, and predetermined conditions are not satisfied. The above PROM is not read and the above PROM is readable and writable at any time.
The same data is written to the RAM. The RAM consists of a RAM that loses data when power is not supplied and multiple signal lines.
AM, PROM or external device, RAM or PROM
It consists of an address bus for selecting an arbitrary address inside and a plurality of signal lines.
Alternatively, a data bus for transferring data between a register and an external circuit, and a data bus provided in the microcomputer core,
Data corresponding to the width of the data bus can be stored.
The data written in the PROM and the RAM is transferred through the data bus, and a plurality of registers storing the data can be compared with data corresponding to the width of the data bus. Of the registers, the above PROM
Comparing means for comparing the contents of one register storing the data written in the RAM with the contents of another register storing the data written in the RAM, and used for permitting the PROM to read data. Above
A write flag that is set when there is a write operation to the PROM and that is reset when the result of the comparison performed by the comparing means does not match, and that is used to accumulate a verification result described later. And the above PR
Reset when there is a write operation to OM, set when the verification result does not match,
When the write flag is set in the verification of the data of the PROM, the comparison is performed by the comparing means inside the microcomputer, and the data of the PROM is read without reading the data of the PROM to the outside. A verification mode for verifying the data and obtaining a verification result of a match or a mismatch; a microcomputer mode in which the microcomputer performs its original operation; a write mode for writing external data to both the PROM and the RAM; and a PROM and a RAM. Has three modes, a verification mode for verifying the data in the microcomputer.

[Action]

In the present invention, data that was previously written only in the PROM is also written in the RAM, the data in the PROM is verified using a comparison circuit built in the microcomputer core, and reading of the PROM is restricted using a flag. This eliminates the need for a means to directly output the PROM data to the outside of the device, which was necessary for verifying the data written by the conventional PROM built-in microcomputer, so that the contents of the PROM can be easily read from the outside This makes it difficult to keep the contents of the PROM secret.

〔Example〕

 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a block configuration of a PROM built-in microcomputer according to an embodiment of the present invention.

In the figure, 1 is a PROM that can be written by a user after manufacture and can hold data even when power is not supplied, and is not read unless conditions are met. RAM loses data when power is not supplied. 3 is a comparison circuit that uses the normal arithmetic function of a microcomputer, which can compare data of the same width as the data bus at a time. 4, 5 has the same width as the data bus. A plurality of registers, which can store data and can be verified in advance by another means, using a normal register of the microcomputer, are reset when verification is started (PROM writing),
A verification flag that is set when the verification results do not match. A reference numeral 7 is a write flag that is set by a write operation to the PROM1 and that is reset when the verification results do not match. only
The contents of the PROM are read into the register 4. Reference numeral 8 denotes an address bus 9, a data bus 10, a plurality of registers 4 and 5, a comparison circuit 3, a verification flag 6, and a write flag 7. By these, a microcomputer core for verifying the PROM 1 is provided. An address bus configured to distinguish between RAM2, PROM1, and external devices, and to select an arbitrary address inside RAM2 or PROM1, 10 is composed of a plurality of signal lines, and PROM1, RAM2, registers 4, 5, and external for arbitrary addresses A data bus 11 for transmitting and receiving data to and from the circuit of the microcomputer; 11 is a microcomputer mode line indicating whether or not the microcomputer mode is set; when "1", the microcomputer mode is set; when "0", the write mode or verification mode is set; Indicates that Reference numeral 12 denotes a write / verify * mode line that indicates whether the mode is the write mode or the verify mode. 13 is
Write line that instructs PROM to write data, "1"
Data is written when. Reference numeral 14 denotes a P comprising an address bus 9, a data bus 10, PROM1, RAM2, and a microcomputer core 8.
A microcomputer with a built-in ROM, and has three modes: microcomputer, writing, and verification.

Next, FIG. 2 is a schematic diagram showing a writing method of the microcomputer with a built-in PROM according to the first embodiment of the present invention. In the figure, 15 is the PROM generally used when writing to PROM1
A writer, 16 is an external comparison circuit that can compare data of the width of the data bus at a time, 17 is a holding register that holds write data of the same width as the data bus, 18 is a write register that holds write data of the same width as the data, Is a second holding register for changing or outputting the same as it is, and 19 is an intervening circuit.

Next, the operation of the PROM built-in microcomputer according to the embodiment of the present invention will be described with reference to the drawings.

Prior to the verification of the PROM1, the RAM2 and the plurality of registers 4 and 5 are verified in advance. Using RAM2 and registers 4 and 5
This is because the functions of the RAM 2 and the registers 4 and 5 need to be normal in order to verify the PROM 1.

Here, the operation of writing data to the PROM1 and the RAM2 will be described in detail. The PROM writer 15 sets the microcomputer mode line 11 to “0” and the write / verify * mode line 12 to “1” by means (not shown). In this write mode, the PROM 1 out of a plurality of signal lines of the
The signal line which distinguishes the RAM 2 from the RAM 2 is ignored, and at the same time, the verification flag 6 is reset.

Next, similarly to the above, the holding register 17 is
Is set to the data to be written to PROM1. An address is applied from the PROM writer 15 to the address bus 9, data is applied from the holding register 17 to the data bus 10, and the write line 13 is set to “1” for a minimum time from the PROM writer 15 to the PROM built-in microcomputer 14. Since the signal line that distinguishes PROM1 and RAM2 is ignored, the write line 13 passes through the data bus 10 and the PR
The same data is written to OM1 and RAM2. Similarly, the write flag 7 is set by the write line 13. next
It is assumed that the PROM writer 15 performs the verification operation, but this verification operation is deceived by the interposition circuit 19. That is, the intervening circuit
19 always uses the same data as that written by PROM writer 15.
By returning to the PROM writer 15, the PROM writer 15 is deceived. On the other hand, the PROM writer 15 tries to set the write / verify * mode line 12 to "0" by means not shown, but the intervening circuit 19 responds to this operation by using a logic (not shown) built therein. To prevent this operation. Then, as a result, an address is successively provided from the PROM writer 15 to the address bus 9, a read signal is provided from the PROM writer 15 to the intervening circuit 19, and correct data is read from the second holding register 18 of the intervening circuit 19 to the PROM writer 15. External comparison circuit 16
Verifies whether the value of the holding register 17 matches the read data. This always matches. This procedure is repeated as necessary. Therefore, the PROM writer 15 is operated by the interposition circuit 19 as if the data of the PROM 1 of the microcomputer 14 with a built-in PROM were verified.

Next, the original verification operation for verifying the data in the PROM 1 will be described in detail. First, using the comparison circuit 3 of the microcomputer core 8, it is verified whether the data in the RAM2 and the data in the PROM1 are equal. In order to enter the verification mode, the intervening circuit 19 sets the write / verification * mode line 12 to “0” by means not shown. Here, the PROM writer 15 performs the write operation as described above, but this operation is deceived by the intervening circuit. That is, PROM
The address is given from the writer 15 to the intervening circuit 19, the data is given from the holding register 17 to the intervening circuit 19, and the PROM writer 15
Set the write line 13 of the OM built-in microcomputer 14 to the minimum time "1"
However, the intervening circuit 19 does not transmit a signal for a write operation of the PROM writer 15 to the microcomputer 14 with built-in PROM, but supplies an address to the address bus 9 and a read signal. Therefore, the PROM writer 15 is operated by the intervening circuit 19 as if a write operation was performed.
Further, the interposition circuit 19 holds the data written from the PROM writer 15 in the second holding register 18.

Here, in the PROM built-in microcomputer 14, when the write flag 7 is set, the data of the PROM 1 indicated by the address is read into the first register 4.

Then, the PROM writer 15 tries to set the write / verify * mode 12 to "0" by means not shown. This operation is deceived by the intervening circuit 19 following the write operation. That is, the intervening circuit 19 does not transmit a signal for the verification operation of the PROM
The address is given from the writer 15 to the intervening circuit 19, and the PROM writer is
From 15, a read signal is given to the intervening circuit 19. Interposed circuit 19
Supplies a corresponding address of the RAM 2 to the address bus 9 and supplies a read signal to the microcomputer 14 with a built-in PROM. The data in the RAM 2 at the address corresponding to the second register 5 is read. On the other hand, the intervening circuit 19 causes the PROM writer 15 to read the correct data of the second holding register 18. The external comparison circuit 16 verifies whether the value of the holding register 17 and the read data match, and this always matches. Therefore, the PROM writer 15 is operated by the interposition circuit 19 as if the data of the PROM 1 of the microcomputer 14 with a built-in PROM were verified.

On the other hand, in the microcomputer 14 with built-in PROM, the data of the PROM 1 and the data of the RAM 2 which are the original verification operations are verified, and the data of the first and second registers 4 and 5 match using the comparison circuit 3. It verifies whether or not to perform the verification, and stores the verification result in the verification flag 6. If the verification result is correct, verification flag 6
Does not change. If the verification result is not correct, the verification flag 6 is set and the write flag 7 is reset. If the write flag 7 is not set, the verification operation does not occur, and the subsequent data is ignored. When the verification of one set of data is completed, the values of the first and second registers are erased.
Repeat this procedure as many times as necessary. Finally, the intervening circuit 19 reads the special address, that is, the PROM 1 for reading the verification flag.
And another address from the RAM 2 and the verification flag 6 is read out to the interposition circuit 19 via the data bus 10. If at least one of the contents of the PROM1 and the contents of the RAM2 are different, the value of the verification flag 6 is "1", and if all are equal, the value is "0".

As described above, in the first embodiment of the present invention, if the write flag 7 is not set in the verification mode,
When one address is given, the PROM built-in microcomputer 14 responds to the outside in the same manner as when the write flag 7 is set, but no verification is performed inside the PROM built-in microcomputer 14. In order to set the write flag 7, it is necessary to perform at least one write in the write mode, that is, to destroy the current data.
It becomes difficult to indirectly read out the data of (1). Further, if the verification result is not correct, the write flag 7 is reset, so that the verification mode with the sacrifice of destroying the data indicated by one address by one write is indirectly used to indirectly transfer the data of another address. Is difficult to read.

Although a general PROM writer is used in the first embodiment, a PROM writer having an intervening circuit in addition to the original PROM writer function may be used. In this case, there is no waste in the writing and verification procedures, and the intervening circuit 19 is not required.

In the first embodiment, writing to PROM1 and RAM2 is performed simultaneously, but writing may be performed separately. In this case, the write time becomes longer, but a circuit for ignoring a part of the address in the write mode is not required.

Further, in the first embodiment, the data bus 10 is singular, but may be plural. In this case, PROM1 and RAM2 at the time of verification
Data can be simultaneously read from the register to the register.

Next, in the above-described first embodiment, writing is continuously performed on the PROM1 and the RAM2, and then the verification is continuously performed. However, as the second embodiment, the write verification may be performed for each address. The procedure in that case and the function of the intervening circuit 19 will be described below.

First, as the procedure, like the normal operation of the PROM writer 15,
The writing and verification operations are performed on one address, and if the writing is correctly performed, the same procedure is performed on the next address. A write operation is performed for one address by the write unit in the shortest time. Next, the interposed circuit 19 is a PROM writer 15
Using this signal as it is, write to PROM1.
At the same time, the intervening circuit 19 stores the write data. However, as described above, when writing to the PROM1 and the RAM2 separately, the intervening circuit 19 performs a writing operation to the RAM2. And
The PROM writer 15 tries to read the data of the PROM1. At this time, the intervening circuit 19 causes the PROM built-in microcomputer 14 to perform a verification operation. If the verification result is correct, the intervening circuit 19 causes the PROM writer 15 to read the correct data stored earlier, and if the verification result is not correct, the interposition circuit 19 causes the PROM writer 15 to read incorrect data. Incorrect data is created, for example, by inverting some or all bits of previously stored data. The PROM writer 15 verifies whether the data in the holding register and the read data are equal by using the external comparison circuit 16, and if they match, performs the same procedure for the next address. If they do not match, the writing operation is performed again by the writing means for a longer time, and the PROM writer 15 again verifies whether the data in the holding register and the read data are equal using the external comparison circuit 16. If they match, the same procedure is performed for the next address.

If it still does not match, stop writing and the PR
Notifies that OM1 is not writable.

As described above, in the above two embodiments, the data is written to the PROM and the RAM inside the PROM built-in microcomputer, and the PROM data is verified using the comparison circuit built in the microcomputer core.
By restricting PROM reading, write data can be verified without PROM reading mode.
Because it is difficult to read PROM data externally,
There is an effect that it is easy to keep the contents of the PROM secret. In the case of 16-bit and 32-bit microcomputers, the verification time can be shortened by fully using the internal bus, register, ALU, etc., compared to the verification using a normal 8-bit or 1-bit port. .

〔The invention's effect〕

As described above, according to the microcomputer with a built-in PROM according to the present invention, the data is written into the PROM and the RAM inside the microcomputer with a built-in PROM, the data in the PROM is verified using a comparison circuit built in the microcomputer core, and the PROM is verified. By restricting the reading of the PROM, it is possible to verify the write data without the PROM read mode, and it is difficult to read the PROM data to the outside, so it is easy to keep the contents of the PROM secret. There is an effect.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a configuration of a PROM built-in microcomputer according to one embodiment of the present invention, and FIG. 2 is a PROM according to one embodiment of the present invention.
FIG. 3 is a schematic diagram showing a writing method of a built-in microcomputer, FIG. 3 is a schematic diagram showing a configuration of a conventional PROM built-in microcomputer, FIG.
FIG. 1 is a schematic diagram showing a writing method of a conventional PROM built-in microcomputer. In the figure, 1 is a PROM, 2 is a RAM, 3 is a comparison circuit, 4 and 5 are registers, 6 is a verification flag, 7 is a write flag, 8 is a microcomputer core, 9 is an address bus, 10 is a data bus, 11
Is the microcomputer mode line, 12 is the write / verify mode line, 13
Is a write line, and 14 is a microcomputer with a built-in PROM. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

(57) [Claims] 1. A microcomputer with a built-in PROM including a microcomputer core and a PROM, which can be written by a user after manufacture and can retain data even when power is not supplied, and cannot be read unless predetermined conditions are satisfied. The above PROM, a RAM which is readable and writable at any time, writes the same data as the above PROM, and loses data when power is not supplied; Alternatively, an address bus for selecting an arbitrary address inside the PROM, and a plurality of signal lines, and the above-mentioned PROM, R
A data bus for exchanging data with an AM or a register or an external circuit; and a data bus provided in the microcomputer core and corresponding to a width of the data bus.
The data written to the PROM and the RAM is transferred via the data bus, and a plurality of registers storing the data can be compared with data corresponding to the width of the data bus. Of the registers, the contents of one register storing the data written to the PROM and the RA
A comparing means for comparing the contents written in M with the contents of other registers storing the contents, and used for permitting the PROM to read data, and there was a write operation to the PROM. And a write flag that is set when the result of the comparison performed by the comparing means does not match, and is used to accumulate a verification result described later, and is used for writing to the PROM. It is reset when there is an operation, and is set when the verification result does not match. It consists of a verification flag. When verifying the data of the PROM, if the write flag is set, the By the comparison performed by the comparing means, the write data is verified without reading the data of the PROM to the outside, and a match or a mismatch is verified. Verification means for obtaining the verification results, a microcontroller mode in which the original operation of the microcontroller is performed, a write mode in which external data is written to both the PROM and the RAM, and verification for verifying the data in the PROM and the RAM inside the microcontroller A microcomputer with a built-in PROM, which has three modes.