JP2684381B2 - Plasma gas phase reaction method - Google Patents

Description

The present invention provides a method for forming a flat or substantially flat high-quality insulating film under reduced pressure on a surface to be formed by plasma chemical vapor reaction. Is.

The present invention includes a step of forming an insulating coating by an anisotropic plasma CVD method by a method such as disposing a substrate on the cathode side, and an isotropic plasma etching method such as disposing a substrate on the anode side. In combination, a method of forming a coating on a surface having a concavo-convex surface and forming the upper surface flat or substantially flat (a shape in which there is little difference in height between the top and bottom and a smooth continuous shape) Is provided.

[B] Conventional technology Recently, the area of wiring in an IC chip has been increasing with the high integration and large scale of LSI.

For this reason, it is becoming more and more important to make the wiring multi-layered and to reduce the pattern and the wiring width.

The horizontal dimensions of patterns such as wiring and connection holes are miniaturized according to scaling rules, while the vertical dimensions such as the thickness of electrode wiring and insulating film are wiring resistance, stray capacitance, withstand voltage, migration resistance, etc. It is necessary to meet the specifications of the device, and it is not easy to miniaturize it in the horizontal direction.

Further, since the pattern of the wiring and the contact hole is formed by etching with strong anisotropy for miniaturization, the end surface shape of the LSI pattern becomes sharp.

Moreover, since the wiring is multi-layered, the unevenness on the upper surface of the LSI chip is naturally severe. Such unevenness on the upper surface of the LSI chip leads to a decrease in reliability such as a decrease in pattern processing accuracy and a disconnection of wiring.

As a means for solving such a problem, a technique for flattening the upper surface of the interlayer insulating film is emphasized.

A thermal CVD method is widely known as a method for forming this interlayer insulating film as a thin film forming technology by a conventional chemical vapor phase reaction (hereinafter referred to as CVD) method. This thermal CVD method adds thermal energy to the reaction gas for film formation introduced into the reaction chamber,
The gas was decomposed or activated to form a film. In this case, since the energy supply for the reaction is only heat, the temperature is also high, and the reaction is performed in the range of 500 to 800 ° C.

For this reason, it is impossible to fabricate a semiconductor device that is vulnerable to high temperatures, and a technology for forming a film at a low temperature, which is promising as a next-generation LSI device, has been required.

As a method of forming a film at a lower temperature, plasma
A CVD method (a gas-phase film forming method using plasma is hereinafter referred to as a plasma CVD method) is known. In this case, high frequency power is applied to the reactive gas introduced into the reaction chamber from the outside to decompose and activate the reactive gas, and a film is formed on the heated substrate. In this case, the substrate having the formation surface is disposed on the anode side, and the heating temperature of the substrate is 20.
In the range of 0 to 450 ° C., the density of the material for film formation was increased. The reason for disposing the substrate on the anode side is to eliminate plasma damage to the underlying material. Furthermore, the basic idea of this film formation is the isotropic CVD method for performing isotropic deposition. For this reason, when forming a film in the recess, cusps (nests) are likely to occur at the corners of the bottom, and it is impossible to improve the step coverage in the case of multilayer wiring.

On the other hand, recently, there is an optical CVD method as a technique for preventing damage to the underlayer. In this method, light energy is applied to a reactive gas to decompose and activate it to form a film on a substrate, which does not require high temperature as in the thermal CVD method, and plasma CVD Although it is an ideal film forming method that does not physically damage the underlying material like the method, it has a drawback that the film forming rate is as slow as 1/10 to 1/50 of the plasma CVD method.

On the other hand, a plasma etching method is known as a manufacturing process of a semiconductor integrated circuit. In this method, a substrate is arranged on the cathode side, and anisotropic plasma etching is performed using self bias. By this anisotropic etching, a concave portion in a predetermined area is made sharp.

[C] Object of the present invention The present invention is completely different from these conventionally known techniques, and is so-called room temperature anisotropic plasma, which is formed at room temperature or approximately room temperature by imparting anisotropy in plasma CVD. The CVD method (provisionally referred to for clarifying the present invention) is used. Further, isotropic plasma etching is basically performed by performing plasma etching with isotropy, and this is basically repeated at least once.

The present invention solves these conventional problems, and an object thereof is to form an insulating film having an upper surface without abrupt steps, especially an interlayer insulating film.

(Configuration of the present invention)

In the present invention, anisotropic deposition is performed at room temperature or approximately room temperature (room temperature within ± 50 ° C.) by plasma CVD method. Then, of course, a film is also formed on the convex portion of the formation surface having an uneven surface, but it has been found that a particularly dense film can be formed especially on the bottom portion of the concave portion, and using this characteristic, an insulating film having a flat upper surface is formed. Is to make. The present invention
Film formation by this room temperature anisotropic plasma CVD method and conventional anisotropic plasma etching (reactive ion
Etching RIE, which is the reverse of the etching RIE), is performed at room temperature or approximately room temperature, and by repeating each, the same reaction system (same reaction furnace or multiple multi-chamber continuous reaction furnaces) This is an attempt to produce a substantially flat coating having a flat or smooth surface.

The present invention forms an insulating film such as a silicon oxide film on a substrate by using a photochemical vapor reaction to reduce plasma damage, and then a room temperature anisotropic plasma CVD method is performed to obtain a predetermined film thickness (for example, 0.5 to
After forming a silicon oxide film up to 3 μm), isotropic plasma etching treatment (hereinafter referred to as etch back treatment) is performed in the same reaction system.

Further, if necessary, these steps are repeated to form an insulating film having an upper surface without abrupt unevenness, that is, an insulating film having a flat or substantially flat upper surface.

The present invention treats the anisotropic plasma CVD method and the isotropic plasma etching as isothermal or approximately isothermal (a temperature difference within ± 50 ° C. of each other), and eliminates the waiting time between one step and the next step. To improve its productivity.
Furthermore, the present invention has found that both can be performed without external heating at room temperature (there is self-heating by plasma), and is sufficiently practical for an interlayer insulating film and a buried field insulating film by such an anisotropic plasma CVD method at room temperature. It has been found to have usable properties.

An experimental example will be shown below to show a method for producing the silicon oxide film shown in the present invention.

Example 1 FIG. 2 shows a schematic view of an insulating film forming apparatus used in this experiment.

In the figure, a pair of electrodes (2), (8) are provided in the reaction chamber (1), both of which are insulated from the ground level. A substrate (3) having a surface to be formed is arranged on one side thereof. Further, in the reaction chamber (1), an ultraviolet light source chamber (4) is provided so that photo CVD can be performed, and a plurality of ultraviolet light sources (6) are installed therein, and the ultraviolet light source chamber (4) reacts. It is adjusted to be approximately equal to the pressure in the chamber (1). The film-forming substrate (3) is installed in the reaction chamber (1) with the film-forming surface facing downward by the substrate support (2) that is also insulated from the reaction container and also serves as a heater for heating the substrate. ing. In this equipment, the deposition up method is adopted so that dust such as flakes generated during film formation does not adhere to the substrate.

From the plasma processing power supply (9) to the matching coil (1
High frequency energy goes through a pair of electrodes (2), (8)
It is connected to. And ground one and use it as an anode,
The ground (12) is selected by the switch (11) so that the other is the negatively biased cathode of 100-500V.

When anisotropic CVD is to be performed, the electrode (8) is grounded to the anode side, and the electrode (2) with the substrate is the cathode side (self bias of −100 to −500 V is applied).

In anisotropic CVD, a reactive gas is directional because it is accelerated in the direction of an electric field by a bias voltage. Then, when the surface collides with the surface to be formed by this acceleration, this kinetic energy is also added thereto, and a dense film can be formed. Due to this directional property, the film thickness of the formed film is thick on the surface perpendicular to the bias electric field and parallel to the bias electric field (side surface).
Is formed thin. In particular, since the sufficiently accelerated reactive gas reaches the bottom of the recess as well, a dense film can be formed even at the bottom, and the generation of cusps and the like can be prevented.

And this compactness keeps the substrate temperature at 30%
It was found that room temperature or room temperature ± 50 ℃ can be sufficiently ensured without heating to 0 to 500 ℃.

On the other hand, when performing isotropic plasma etching, the electrode (2) is grounded so that the substrate is on the anode side without self-bias and the electrode (8) is on the cathode side.

That is, isotropic etching is a method in which a reactive gas is uniformly impinged on the surface to be etched without being accelerated by an electric field, and a plasma reaction is caused on the surface. For this reason, more radicals collide with the convex portions and are easily etched, and radicals are less likely to reach the concave portions, and thus are less likely to be etched. Isotropic etching is to perform etching without applying a bias having the directionality of this radical.

In the anisotropic CVD method, among the reactive gases, the silicide gas and the oxide gas are mixed in the pipe, introduced into the reaction chamber through the gas nozzle (7), and mixed near the substrate (3). There is. The unnecessary gas is exhausted from (13).

In the photochemical gas phase reaction, a direct excitation method was adopted in which the ultraviolet light emitted from the ultraviolet light source (6) was applied to the reactive gas through the quartz transmission window (5).

Furthermore, an anisotropic plasma is formed on the transparent window (5).
A mesh electrode (8) for CVD and isotropic plasma etching is placed. A high frequency power can be applied to the mesh electrode (8) by a power source (9) between the mesh electrode (8) and the substrate support electrode (2). Although not shown in the drawing, the electrode (2) and the substrate support electrode (2) are optionally used to promote anisotropic plasma CVD.
AC bias voltage (eg 50KHz, peak voltage ± 350
V, it is effective to add a DC negative bias of −100 to −500V to the substrate side.

Using this device, the reaction pressure is 0.01 to 0.3 torr on the substrate having irregularities as shown in FIG. 1 (A), the substrate temperature is room temperature (room temperature ± 50 ° C. or less), input high frequency power 13.56 MHz, 100 W to 5 W
A silicon oxide film was formed by changing the ratio of monosilane and nitrous oxide as a reactive gas under the condition of 00W.

The following reactions can be considered from the refractive index and infrared absorption of the silicon oxide film in the SiH ₄ / N ₂ O ratio of 0.005 to 0.5.

SiH ₄ + 2N ₂ O → SiO ₂ + 2N ₂ + 2H ₂ By such anisotropic plasma CVD, Fig. 1 (A)
An insulating film such as a silicon oxide film is formed on a substrate having a formation surface having an uneven shape as shown in FIG. Fig. 1 (A)
In, there are a convex portion (23), a concave portion (21) having a narrow width, and a concave portion (22) having a wide width. 8000 average film thickness on top of these
Anisotropic plasma CVD of silicon oxide film (30-1) to a thickness of Å
It was formed by a method. Then, a film having a thickness of 1.0 μ was formed on the upper surface (24) of the convex portion and the bottom surface (26) of the concave portion. The side surface (25) could only be formed to a thickness of 0.2μ.

This process condition is SiH ₄ / N ₂ O = 1/2, high frequency output 300
W, 13.56 MHz, and the substrate was placed on the Casotto side. At this time, the self-bias was -350V. The substrate temperature was room temperature. Despite film formation at room temperature, the specific resistance is 5 ×
It had a resistance of 10 ¹⁷ Ωcm and a breakdown voltage of 8 × 10 ⁶ V / cm (voltage at which a current of 1 μA / cm ² or more flows). In this case, the plasma pressure was as high as 0.05 torr and the film formation rate was as high as 0.1 to 1 μ / min.

The convex portion (23) of the substrate (3) had a shape in which the space of the concave portion (21) was 0.8 μm narrow and the width of the wide concave portion (22) was 2 μm. The uneven shape could be uniformly covered.

The thickness of the upper surface / thickness of the side surface can be set to 2 to 20 and generally 3 or more.

 Next, this insulating film was subjected to isotropic etching.

As shown in FIG. 1 (A), after forming a thick silicon oxide film to cover the surface of the uneven substrate, the reactive gas in the reaction chamber is exhausted and removed, and an organic halide gas such as CF ₄ is used as an etching gas. , CF ₃ H or NF ₃ , SF ₆ etc. were introduced into the reaction chamber and the pressure was finely adjusted to 0.1 torr, and high frequency was applied between the mesh electrode (cathode) (8) and the substrate support electrode (anode) (2). A film was formed by applying an electric power and causing an electrical discharge to generate isotropic plasma etching at room temperature (30
The etching of -1) was performed to eliminate the abruptly uneven portion. Then, as shown in FIG. 1 (B), the recess (28)
The silicon oxide film (2
Part or all of 4) can be mainly etched. Therefore, the insulating film could be deliberately embedded in the recess.

Performing this process, etching in the recess is 0 to 0.2 μm
And etching the insulating film on the convex portion to a thickness of about 0.2 to 0.5 μm (etching ratio 2 to 10 for example 3
As shown in FIG. 1B, which was obtained as described above, the abrupt portions of the uneven steps were removed. Thus, it was possible to fabricate the interlayer insulating film (30-2) without abrupt steps in the same reaction chamber in one apparatus.

This step was repeated again because the thickness of the coating on the protrusions was too thin in this figure and the top surface was not yet sufficiently flattened. That is, as shown in FIG. 1 (C), an insulating film (30-3) is formed on the insulating film (30-2) by an anisotropic CVD method at room temperature as in FIG. 1 (A). To obtain an insulating film (31). Further, thereafter, as shown in FIG. 1 (D), isotropic plasma etching was performed as in the step of FIG. 1 (B). And insulating film (30-
4) was obtained. Then, the insulating film (28 ') on the convex portion and the insulating film (26') on the concave portion could be smoothly continuous with each other at this boundary (25 '). This smoothly continuous upper surface is extremely important for producing other fine electric wirings with the same line width on the upper surface.

Further, by repeating these as required, a silicon oxide film (30-5) having a flat upper surface could be formed as shown in FIG. 1 (E).

Further, at the time of the etching treatment, the coating can be simultaneously removed on the inner wall of the reaction chamber and the transmitted light window (5), and it is not necessary to stop the operation of the apparatus for cleaning, which leads to the improvement of productivity.

In addition, in the present embodiment, the production of the silicon oxide film is performed by using the anisotropic plasma CVD method and the isotropic plasma etching method together. However, when the film is formed by this anisotropic plasma CVD, the substrate having an uneven surface is formed. To prevent plasma damage of the
Obviously, it is possible to cover all of them by the CVD method and then use the embodiment of the present invention.

Example 2 This example outlines a film forming apparatus having another structure.

In FIG. 3, FIG. 3 (A) is a vertical sectional view taken along the line AA ′, and FIG. 3 (B) is seen from above.

It has a substrate loading / unloading chamber (47) and a buffer chamber (46) in front of it. A region (41) is a reaction chamber for performing optical CVD, a region (42) is a reaction chamber for performing anisotropic plasma CVD, a region (43) is a reaction chamber for performing isotropic etching, and a region (44). ) Is a space for performing anisotropic plasma CVD, or (45) is a space for performing isotropic plasma etching. Each reaction chamber has a gate valve (51), (5
Substrates (3-1), (3-2), (3) which are partitioned by 2), (53), (54), (55), and (56), and which have a surface to be formed in each reaction chamber at the same time. -3), (3-4),
(3-5) is processed. During this process, the film-formed substrate (3-6) is taken out between the load / unload chamber (47) and the buffer chamber (46), and a substrate having a new uneven surface not yet formed ( Insert it from (47) to (46). In each of the reaction chambers, as shown in Example 1, a predetermined anisotropic plasma CVD and isotropic plasma etching treatment were performed, and then all the reaction chambers were evacuated. And after making each reaction chamber an equal pressure, the gate valves of (51) ... (56) are simultaneously opened. Further, all the substrates were transferred to the adjacent reaction chamber as shown by the arrow, that is, the substrate (3-1) was at the position (3-2),
The board (3-2) is located at the position (3-3), and the board (3-3) is
Is moved to the position (3-4), the substrate (3-4) is moved to the position (3-5), and the substrate (3-5) is moved to the position (3-6). The substrate is removed as described above.

As shown in FIG. 3 (A), in order to perform anisotropic plasma CVD, the substrate side is the cathode side as shown in the reaction chambers (42) and (44). To perform isotropic etching, the substrate side is the anode side as shown in the reaction chambers (43) and (45).

Thus, as shown in FIG. 1, an insulating film having a flat or substantially flat surface could be formed on the uneven surface.

If a multi-chamber configuration is used as shown in FIG.
It was possible to obtain about 3 times the throughput as compared with the case where only one reaction chamber shown in the figure was used.

Furthermore, in FIG. 3, reaction chambers (41), (42), (4
Since 4) is mainly only film formation, anisotropic plasma CVD,
By shifting the isotropic plasma etching one by one, the inner wall of the reaction chamber can be automatically cleaned.

As shown in FIG. 3, the substrate was isothermal in all reaction chambers, and in particular, in this embodiment, the room temperature was within ± 50 ° C. Then, even though plasma CVD has been used so far, film formation has been 3 times.
00 ~ 400 ℃, etching is at room temperature, so 3 for each reaction chamber
There was a temperature difference of over 00 ° C, and much waiting time was required for raising and lowering the temperature. However, as shown in the present invention, it was discovered that the film formed by anisotropic plasma CVD made at room temperature was denser and harder than expected.
Since both isotropic etching and room temperature etching can be performed at room temperature, it is possible to manufacture a multi-chamber structure device that can be mass-produced, improving productivity.

Of course, the number of chambers may be increased if necessary. Further, due to the relocation, not all are performed simultaneously, but an indirect continuous multi-chamber apparatus in which a buffer space is once provided between the reaction chambers may be used.

In the above embodiments, the silicon oxide film is disclosed as the insulating film, but other insulating films, silicon nitride film, PSG (phosphorus glass), BSG (boron glass), and alumina film are also applicable.

Further, as a reactive gas for forming the silicon oxide film, not only monosilane but also other polysilanes (Sin
_{H2n + 2} ), dimethylsilane, tetramethylsilane and other organosilicon compounds (SiHn (CH ₄ ) _4-n ) or tetraethoxysilane (TEOS) such as organosilicon oxygenates and oxide gases need to be reacted It is also possible to use according to.

[E] Effect As described above, the present invention is completely opposite to the “isotropic” plasma CVD and the “anisotropic” plasma etching that have been conventionally used. By the plasma etching, it was possible to form an insulating film having a flat or substantially flat upper surface on a substrate having an uneven surface. And since the plasma CVD method can be performed at room temperature or a temperature close to it, the productivity could be more than three times that of the previous one.

Further, it was possible to remove the cusp which is likely to occur in the recess.

According to the method of the present invention, it is possible to fabricate an interlayer insulating film without abrupt unevenness and a buried field insulating film of VLSI or the like in the same reaction chamber of the same device, and it is possible to reduce the manufacturing cost of the device. .

In addition, the etching of the reaction chamber wall and the transmitted light window can be performed simultaneously during the etch-back process.

[Brief description of the drawings]

FIG. 1 shows a step of producing an interlayer insulating film of the present invention. 2 and 3 show schematic views of the apparatus used in the present invention.

Claims (2)

(57) [Claims] 1. A substrate having convex portions of a conductor or a surface on which a coating film is formed on a substrate on which a film is formed by conducting a plasma gas-phase chemical reaction while maintaining the temperature at or near room temperature disposed on the cathode side. At least a step of forming an insulating coating on the substrate, and a step of removing a part or all of the insulating film on the convex portion by plasma etching while maintaining the substrate at the anode side and keeping it at room temperature or approximately room temperature. A plasma vapor phase reaction method, characterized in that a coating film having a flat or substantially flat surface is formed on the surface to be formed by allowing each coating to be performed once. 2. The plasma gas phase chemical reaction method according to claim 1, wherein the plasma gas phase chemical reaction method comprises reacting a silicide gas and an oxide gas to form silicon oxide.