JP2679338B2 - Semiconductor element mounting structure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a structure for three-dimensionally mounting a semiconductor element on a printed board that is widely used in the construction of various electronic devices, including a semiconductor element formed on a wafer scale and a pad provided on a connection board. With the aim of providing a mounting structure for a new semiconductor element that can be easily connected and at which a wafer scale can be installed automatically at a fixed pitch, a motherboard on which various semiconductor elements are three-dimensionally and densely mounted on the main surface side, A plurality of pads are arranged on one surface of the insulating plate so as to have a constant pitch in the vertical direction, wiring patterns that are electrically connected to the pads are formed up to both side edges in the vertical direction, and upper and lower end surfaces are inclined in opposite directions to each other. Molded so as to be vertically erected at a constant pitch between a pair of connection boards standing parallel to the main surface of the motherboard and the pair of standing connection boards. On the main surface of the insulating substrate, a wafer scale in which a large number of semiconductor elements are densely formed is formed on the main surface of the insulating substrate, and the pair of connection boards are formed on the main surface of the mother board such that the pads are inside each other and the upper ends are widened to each other. The wafer scale is sequentially erected between the connection substrates with the formation surface of the semiconductor element facing upward, and the semiconductor element and the pad are connected by bonding wires having different lengths.

[Industrial applications]

The present invention relates to a structure in which a semiconductor element is three-dimensionally mounted on a printed board that is widely used in the configuration of various electronic devices.

Recently, along with the demand for miniaturization and multi-functionalization of various electronic devices, it has become necessary to miniaturize integrated circuit boards mounted on the devices and mount a large number of various semiconductor elements at high density. . Therefore, a plurality of pairs of connection boards are erected on the main surface of the mother board, and a plurality of wafer scales in which a large number of various semiconductor chips are formed on the surface of an insulating substrate are installed between the pairs of connection boards. Since a large number of wafer scales are three-dimensionally mounted on the main surface of the motherboard, a new semiconductor element mounting structure that facilitates the three-dimensional mounting of these wafer scales is required.

[Conventional technology]

As shown in FIG. 3, a mounting structure of a semiconductor element which has been widely used in the past has a plurality of pads 2-2 arranged on the main surface side of an insulating plate 2-1 with a certain size, for example, a vertical pitch of 2 mm. Then, a pair of connection boards 2 having wiring patterns (not shown) electrically connected to the pads 2-2 formed up to one end face in the width direction are provided on the main surface of the motherboard 1 with the pads 2-.
The two are placed in parallel at regular intervals so as to face each other inside.

Inside the pair of connection boards 2, an insulating substrate 3-1 is formed by molding a rectangular plate of 0.8 mm from silicon or the like as shown in FIG.
A plurality of wafer scales 3 each having various semiconductor elements 3-2 such as a memory formed in high density by a repeated pattern forming method on a main surface of the same are fixed so that the surface on which the semiconductor elements 3-2 are formed is the upper side. For example, it is installed at a pitch of 2 mm.

Then, as shown in FIG. 3, each pad 2 of the connection substrate 2 is
-2 and the semiconductor element 3-2 of the wafer scale 3 respectively
Are connected to each other by bonding wires 4 and are connected to a wiring pattern (not shown) of the connection board 2 and a wiring pattern (not shown) formed on the main surface of the mother board 1. It is configured so that it can be mounted three-dimensionally on the main surface side.

[Problems to be solved by the invention]

A problem with the conventional mounting structure of the semiconductor element described above is that the semiconductor element 3 is placed between the pair of connection boards 2 placed in parallel with the pads 2-2 inside each other as shown in FIG. -If a plurality of wafer scales 3 are inserted so that the surface on which -2 is formed faces upward,
Semiconductor element 3-2 forming surface and the pad 2-2 of the connection substrate 2
Since the forming surface is at a right angle, it is difficult to join the bonding wire 4 connecting the semiconductor element 3-2 and the pad 2-2, and at the same time, a plurality of wafer scales 3 are installed vertically at a constant pitch. The problem is that it takes a lot of time.

In view of the above problems, the present invention is a new semiconductor device in which a semiconductor device formed on a wafer scale and a pad provided on a connection substrate can be easily connected and the wafer scale can be automatically installed at a constant pitch. It is intended to provide the implementation structure of.

[Means for solving the problem]

The present invention, as shown in FIG. 1, includes a mother board 1 on which various semiconductor elements are three-dimensionally and densely mounted on the main surface side, and an insulating plate.
A plurality of pads 12-2 are arranged on one surface of 12-1 at a constant pitch in the vertical direction, and wiring patterns that are electrically connected to the pads 12-2 are formed up to both side edges in the vertical direction, and the upper and lower end surfaces are formed. Molded so as to be vertically erected at a constant pitch between a pair of connection boards 12 that are inclined in opposite directions and are erected parallel to the main surface of the motherboard 1 and the pair of connection boards 12 that are erected. The insulating bases 13-1, 23-1, 33-1 are composed of a wafer scale 13, 23, 33 on the main surface of which a large number of semiconductor elements 13-2 are formed at high density. The mother board 1 is provided with a pair of the connection boards 12 so that the upper end sides of the connection boards are widened so that they are inside each other.
The semiconductor element is erected on the main surface of the
With the formation surface of 13-2 facing upward, the wafer scales 13, 23,
33 are sequentially installed, and the semiconductor element 13-2 and the pad 12-2 are connected by bonding wires 14 having different lengths.

Further, as shown in FIG. 2, a unit having a trapezoidal cross section formed by a pair of the connection substrates 12 and a plurality of wafer scales 13, 23, and 33 is provided on a mother board so that the trapezoidal cross sections are alternated in forward and reverse directions. A plurality of semiconductor elements 13-2 are three-dimensionally mounted on the mother board 1 by arranging them in parallel with the main surface of 1.

(Operation)

According to the present invention, as shown in FIG. 1, a pair of connection boards 12 are supported in parallel so that the pads 12-2 are located inside each other and the upper portions are widened. Wafer scale 2 that gradually expands from scale 13
Wafer scale 13,2 by inserting 3,33
3,33 are automatically installed vertically at a fixed pitch, and semiconductor elements of each wafer scale 13,23,33 are installed.
Since the arrangement surface 13-2 and the pad 12-2 of the connection board 12 form an obtuse angle, each semiconductor element 13-2 of the wafer scales 13, 23, 33 by the bonding wire 14 and each pad of the connection board 12 are formed. It is possible to easily connect to 12-2.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 and 2.

FIG. 1 is a diagram showing a mounting structure of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view of a mother board mounting according to the present embodiment. In FIG. The other 12 are connection boards that stand upright on a mother board and hold a plurality of wafer scales three-dimensionally, 13, 23, 33 are wafer scales in which various semiconductor elements are formed in high density, and 14 Is a bonding wire that connects the wafer-scale semiconductor element and the wiring pattern of the connection substrate.

As shown in FIG. 1, the connection board 12 has a fixed upper and lower dimension, for example, 2 mm, when the upper end surfaces of the main surface of the mother board 1 are widened to each other, for example, when they are supported in parallel at an elevation angle of 60 °.
Insulating plate 12-
1 is a printed board which is arranged on the inner surface side of 1 and has a wiring pattern (not shown) which is electrically connected to the pad 12-2.

The wafer scales 13, 23, 33 are made of silicon or the like in a vertical dimension when they are installed between the connection substrates 12 supported in parallel at an elevation angle where the upper ends of the wafers are widened. Insulating base 13-
Various semiconductor elements 13-2 such as a memory are formed in high density on the main surfaces of 1,23-1, 33-1 by a repeating pattern forming method similar to the conventional wafer scale.

As shown in FIG. 1, the mounting structure of a semiconductor device using the above members is supported in parallel at an elevation angle of 60 ° so that the pads (not shown) of the two connection boards 12 are inside each other and the upper portions are widened. Then, inside the facing connection substrate 12, the wafer scale 13 having a narrow width is sequentially expanded to the wafer scale 2 having a wide width.
Build 3,33. By connecting the respective semiconductor elements 13-2 of the wafer scales 13, 23, 33 and the respective pads of the connection substrate 12 with the respective bonding wires 14 having different lengths,
Wafer scale erected at the top of the two connecting substrates 12
At 13,33, a unit with an inverted ladder cross section is formed.

The unit formed in the inverted trapezoidal cross section is placed parallel to the main surface of the mother board 1, and the wiring pattern (not shown) and the semiconductor elements of the wafer scales 13, 23, 33 are placed.
A large number of wafer scales 13, 23, 33 can be mounted on the main surface of the mother board 1 by connecting the wiring patterns of the connection board 12 connected to 13-2.

Further, as shown in FIG. 2, a unit having a trapezoidal cross section in which wafer scales 13, 23 and 33 are erected between a pair of connection boards 12 has a trapezoidal cross section on the main surface of the motherboard 1.
A plurality of units are placed in parallel so that they are inverted alternately (upper and lower sides of the trapezoidal cross section), and the motherboard 1
The wiring pattern of (4) and the wiring pattern of each connection board 12 may be connected.

As a result, the wafer scales 13, 23, 33 are automatically installed at a constant pitch between the connection substrates 12 facing each other, and the wafer scales 13, 23, 33 and the connection substrates 12 are also installed.
Since the angle formed by is an obtuse angle, each semiconductor element 13 of the wafer scales 13, 23, 33 by the bonding wire 14 is formed.
-2 and each pad 12-2 of the connection substrate 12 can be easily connected.

Although the present invention has been described above based on the illustrated embodiment, the present invention is not limited to the embodiment described above. For example, a plurality of printed boards on which a package type semiconductor device is mounted by a pair of connection boards are three-dimensionally formed. It may be installed on a mother board and mounted on a mother board, and need not be limited to a wafer scale.

〔The invention's effect〕

As is clear from the above description, according to the present invention, with a very simple structure, a plurality of wafer scales are automatically erected at a constant pitch between opposing connecting substrates, and each of the wafer scales is formed by bonding wires. It is possible to provide a mounting structure of a semiconductor element, which has advantages such as easy connection between the semiconductor element and each pad of the connection substrate, and which can be expected to achieve significant economic and reliability improvement effects.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a semiconductor element mounting structure according to an embodiment of the present invention, FIG. 2 is a sectional view showing a mother board mounting of the present embodiment, and FIG. 3 is a schematic view showing a conventional semiconductor element mounting structure. FIG. 4 is a perspective view showing a wafer scale. In the figure, 1 is a mother board, 12 is a connection board, 12-1 is an insulating plate, 12-2 is a pad, 13,23,33 are wafer scales, 13-1, 23-1, 33-1 are insulating bases, 13 Reference numeral -2 is a semiconductor element, and 14 is a bonding wire.

Claims (2)

(57) [Claims] 1. A mother board (1) on which various semiconductor elements are three-dimensionally and densely mounted on a main surface side, and a plurality of pads (12-2) are vertically fixed on one surface of an insulating plate (12-1). Wiring patterns that are arranged at a pitch and that are electrically connected to the pads (12-2) are formed up to both side edges in the vertical direction, and upper and lower end surfaces are inclined in opposite directions and parallel to the main surface of the motherboard (1). And a pair of connection boards (12) standing upright on the insulating base (13-1, molded to be vertically erected at a constant pitch between the pair of standing connection boards (12).
23-1, 33-1) has a large number of semiconductor elements (13
-2) with high density formed on wafer scale (13,23,3
3), the pair of connection boards (12) are erected on the main surface of the mother board (1) so that the pads (12-2) are inside each other and the upper ends thereof are widened to each other. 12), the wafer scale (13, 23, 33) is sequentially installed between the semiconductor element (13-2) and the pad (12-) with the formation surface of the semiconductor element (13-2) facing upward. 2. A semiconductor element mounting structure, characterized in that 2) is connected by bonding wires (14) having different lengths. 2. A unit having a trapezoidal cross section formed by a pair of the connection boards (12) and a plurality of the wafer scales (13, 23, 33) is arranged so that the trapezoidal cross sections are alternated in forward and reverse directions. Arranged in parallel with the main surface of the motherboard (1),
A large number of the semiconductor elements (13
-2) is three-dimensionally mounted.
The semiconductor element mounting structure according to the item.