JP2669327B2 - Field effect transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an element structure of a field effect type compound semiconductor device for high frequency power using a heterojunction in a channel.

[0002]

2. Description of the Related Art Conventionally, development of a field-effect compound semiconductor device using a heterojunction as a channel usually involves the formation of GaAs and In which are heterojunction with AlGaAs as an electron supply layer.
The operation is performed using a two-dimensional electron gas generated at the GaAs interface. In particular, since it is spatially separated from the donor level in the electron supply layer, it is less susceptible to electrical scattering, enabling high-speed operation, and is now being put to practical use as a low noise element for satellite communication. I have.

Recently, there has been a movement to develop a field-effect compound semiconductor device using such a heterojunction as a channel as a field-effect semiconductor device for high-frequency power. In order to make a device for high-frequency power, the method used in the development of a low-noise device must be modified. Therefore, first, a method of increasing the two-dimensional electron gas concentration has been adopted in order to obtain a large current. FIG. 3 shows a cross-sectional view of the element of the conventional example.

In FIG. 3, a buffer layer AlGaAs 12 is provided on a semi-insulating GaAs substrate 11, an n-AlGaAs layer 13 is provided as an electron supply layer, and undoped GaA is provided thereon.
A channel layer 14 of s or InGaAs, an n-AlGaAs layer 15 serving as an electron supply layer, a gate electrode 18, and a source electrode 17 and a drain electrode 19 are provided on the n-GaAs layer serving as a cap layer. Usually, the electron supply layer is provided only above the channel layer. However, since the electron supply layer is a double hetero junction, n is provided below the channel layer.
Since the two-dimensional electron gas concentration generated from the -AlGaAs layer increases, the two-dimensional electron gas concentration in the channel layer becomes higher than usual.

FIG. 4 shows a conventional n-AlGaAs / InGa.
The energy band diagram of As type | system | group heterojunction FET is shown.
An increase in current is expected due to the two-dimensional electron gas concentration occurring at both interfaces of the channel. By the way, in such a heterojunction FET, as a parasitic factor that hinders high performance,
A high electric field is generated by the high-concentration two-dimensional electron gas in the channel, so that the threshold electric field at which holes are generated in the channel by impact ionization or the like is reduced. As a result, the channel current remarkably increases above the threshold electric field pressure, deteriorating the withstand voltage characteristic of the device. Further, the high-concentration ohmic contact layer has an advantage of reducing the source resistance, but increases the electric field concentration in the vicinity of the gate current and deteriorates the breakdown voltage characteristic of the device in addition to the above.

[0006]

As described above, the double heterojunction increases the two-dimensional electron gas concentration in the channel, but under a high electric field, holes are generated in the channel due to impact ionization, etc. To the source, etc. In particular, the holes flowing into the gate cause a gate leakage current, which causes a problem that the breakdown voltage characteristic of the device is significantly deteriorated.

Further, the high-concentration ohmic contact layer is
There is a problem that the electric field concentration immediately below the gate electrode is increased, and in addition to the above, the breakdown voltage characteristics of the element are deteriorated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a field effect transistor which avoids an increase in gate leak current due to generated holes in connection with the above problems.

[0009]

SUMMARY OF THE INVENTION The present invention relates to AlGaAs.
An AlGaAs / GaAs heterojunction field-effect transistor having a heterostructure, in which a hole barrier (hole barrier) layer AlAs layer is provided in a spacer layer, or AlGaAs.
/ InGaAs based heterojunction field effect transistor.

Further, in the above field effect transistor, the field effect transistor is characterized in that two ohmic contact layers of highly-doped GaAs and lightly-doped GaAs are provided on AlGaAs (electron supply layer). .

[0011]

The hole barrier layer Al is formed in the spacer layer AlGaAs layer.
GaAs with As layer and low doping
The reason for providing two ohmic contact layers of GaAs with high doping on AlGaAs will be described.

FIG. 1 is a sectional view of a field effect transistor according to the present invention. The hole barrier layer AlAs layer has a band gap of about 2.67 eV at room temperature and a spacer AlGaAs.
There is a large energy gap with the interface.
Therefore, of the energy of holes generated in the channel under a high electric field, the probability of reaching the gate through the AlAs layer is significantly reduced. This indicates that the gate leakage current is reduced.

In addition, two ohmic contact layers of low-doped GaAs and highly-doped GaAs are provided on AlGaAs to promote the relaxation of the electric field just below the gate and to suppress the generation of holes. In particular, when a two-step recess is formed by using a low-doped GaAs layer, relaxation of the electric field immediately below the gate is remarkably promoted, which is effective. This is to suppress the gate leak of holes due to the AlAs layer and at the same time increase the threshold electric field generated,
This has the effect of significantly improving the withstand voltage characteristics of the device.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The field effect transistor having a heterojunction as a channel according to the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 is a cross-sectional view of an element immediately below a gate of a field effect transistor according to an embodiment of the present invention. FIG. 2 is an energy band diagram thereof.

As shown in FIG. 1, the buffer layer A is formed on the semi-insulating GaAs substrate 1 by epitaxial growth.
lGaAs2, on which an electron supply layer of AlGaAs
The layer 3, the spacer layer AlGaAs layer 4, the undoped InGaAs channel layer 4 thereon, and the spacer layer AlGaAs layer 6 thereon are provided. Here, the spacer layer Al
Hole barrier layer (hole barrier) AlAs in the GaAs layer 6
Layer 7 is provided. Further, a Schottky layer AlGaAs layer 8 is provided. In addition to the gate electrode 12, a low concentration of n-
A GaAs layer 9 and a high concentration n-GaAs layer 10 are provided.
A step recess is formed. In addition, a gate electrode 12, a source electrode 11, and a drain electrode 13 are provided. As a result, holes generated under a high electric field are generated in the hole blocking layer AlAs layer 7
Is reduced. At the same time, due to the effect of the two-step recess, the electric field immediately below the gate is reduced, and the hole generation rate is reduced.

[0016]

As described in detail in the above embodiments, according to the present invention, the hole blocking layer AlAs layer has a high probability of reaching the gate among the holes generated in the channel under a high electric field. Significantly reduced. This reduces the gate leak current. Also, two ohmic contact layers of low-doped GaAs and high-doped GaAs are formed by Al.
The provision of GaAs promotes relaxation of the electric field immediately below the gate, and produces an effect of suppressing generation of holes.

This is particularly effective when a two-step recess is formed using a low-doped GaAs layer. That is, since the gate leakage of holes due to the AlAs layer is suppressed and the threshold electric field generated is increased, the withstand voltage characteristic of the element is significantly improved.

The present invention is extremely large in that it contributes to the improvement of the withstand voltage characteristic of the field effect transistor for high frequency power using a heterojunction in the channel.

[Brief description of the drawings]

FIG. 1 is a sectional view of an element of a field-effect transistor of the present invention.

FIG. 2 is an energy band diagram of the field-effect transistor of the present invention shown in FIG.

FIG. 3 is an element cross-sectional view of a conventional field-effect transistor.

FIG. 4 is an energy band diagram of the conventional field-effect transistor shown in FIG.

[Explanation of symbols]

 Reference Signs List 1 semi-insulating GaAs substrate 2 undoped AlGaAs buffer layer 3 n-AlGaAs electron supply layer 4 n-AlGaAs electron supply layer 5 InGaAs channel layer 6 AlGaAs spacer layer 7 AlAs hole barrier layer 8 n-AlGaAs electron supply layer 9 n-GaAs Ohmic contact layer 10 n-GaAs ohmic contact layer 11 source electrode 12 gate electrode 13 drain electrode

Claims (2)

(57) [Claims] 1. Al having an AlGaAs spacer layer
GaAs / GaAs heterojunction FET or AlGa
In the As / InGaAs-based heterojunction FET, AlAs serving as a hole barrier layer is provided in the AlGaAs spacer layer.
A field-effect transistor characterized in that a layer is provided. 2. Al having an AlGaAs spacer layer
GaAs / GaAs heterojunction FET or AlGa
In an As / InGaAs heterojunction FET, a hole barrier layer AlAs layer is provided in the AlGaAs spacer layer, and GaAs doped with a high concentration of n-type impurities and GaAs doped with a lower concentration of an n-type impurity are used.
A field-effect transistor having two ohmic contact layers.