JP2667664B2 - Manufacturing method of silicon single crystal thin film - Google Patents
Manufacturing method of silicon single crystal thin filmInfo
- Publication number
- JP2667664B2 JP2667664B2 JP62168203A JP16820387A JP2667664B2 JP 2667664 B2 JP2667664 B2 JP 2667664B2 JP 62168203 A JP62168203 A JP 62168203A JP 16820387 A JP16820387 A JP 16820387A JP 2667664 B2 JP2667664 B2 JP 2667664B2
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- thin film
- substrate
- hydrogen
- crystal thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【発明の詳細な説明】
〔技術分野〕
本発明はシリコン単結晶薄膜の低温形成に関する。
〔発明の背景〕
半導体装置の高集積化に伴いシリコンエピタキシャル
基板の低温形成法が注目を集めている。このために各種
のアプローチがなされている。しかしながら、例えば、
モノシランの熱CVD(Chemical Vapor Deposition:化
学気相成長)法では約1000〜1100℃の高温が必要であ
る。このような高温では膜形成時の基板からの不純物の
固相拡散ないしはオートドーピングが不可避に惹起する
ため、良質のエピ薄膜を得ることは困難である。
我々はシランおよび水素の混合ガスにフルオロシラン
を加え、水銀増感光CVD法により分解すると、300℃の基
板温度において、シリコン基板上にエピタキシャル生長
することを見出したが、残念ながら、このような低温で
形成された膜中には少なからぬ量の水素が含まれている
ことが、水素の加熱分析試験の結果から明らかになっ
た。膜中への水素の混入は半導体装置の製造上問題があ
り望ましくないと考えられる。
本発明者らは、かかる問題を解決すべくさらに検討を
進めた結果、基板温度を600℃以上に保ちつつ、シラ
ン、フルオロシランおよび水素の混合ガスを基板上に導
入し成膜すると、水素を含まないシリコン単結晶薄膜を
得ることができることを見出し本発明を完成した。
〔発明の開示〕
すなわち、本発明は、シラン、フルオロシランおよび
水素からなる混合ガスを加熱された単結晶基板上に導き
単結晶薄膜を成長させることを特徴とするシリコン単結
晶薄膜の製法である。
以下、本発明を詳細に説明する。
本発明は、基本的には、水素およびシランの混合ガス
にフルオロシランを添加することが特徴である。
本発明において使用する、かかるフルオロシランとし
ては、SiH4-nFn(nは1〜4の整数)で表現されるモノ
シランのフルオロシランまたはフルオロジシラン特にSi
2F6が有効に用いられる。なおシランとしてはSimH2m+2
(mは1〜3の整数)で表されるモノシラン、ジシラ
ン、トリシランなどが有効に用いられる。
本発明はかかるフルオロシラン含有ガスを加熱された
基板上に導きCVD法により単結晶薄膜を形成する。そし
て特に好ましい態様として該単結晶薄膜を単結晶基板上
に成長させるものであり、該基板としてはシリコンウエ
ハーやサファイアなどが好ましく用いられる。
すなわち、総括するに、本発明は水素およびシランガ
スにフルオロシランを混合してなる混合ガスを、600℃
以上に加熱された単結晶基板上へ導きCVD法により成膜
することによりシリコン単結晶薄膜を形成する方法であ
る。
該混合ガス比については単結晶薄膜を形成する形成装
置への原料ガスの供給流量(容量)比で表すことが便利
である。
好ましいフルオロシラン/シラン比は0.1〜50、さら
に好ましくは0.2〜20の範囲である。フルオロシラン/
シラン比が0.1程度もしくはそれ未満であると、基板温
度が600℃近傍もしくはそれ以下の場合には多結晶が形
成され易い。またフルオロシラン/シラン比が50を越え
ると単結晶薄膜の成長速度が低下するので好ましくな
い。
好ましい水素/(フルオロシラン+シラン)比は5〜
500、さらに好ましくは50〜200の範囲である。
水素/(フルオロシラン+シラン)比は、ある程度大
きい領域で単結晶薄膜は形成され易い傾向にあるが、水
素添加量をあまり多くしすぎると、単結晶薄膜の成長速
度が低下するので好ましくない。
成膜時の基板温度としては600℃以上が、より好まし
くは700℃以上が、さらに好ましくは800℃以上が有効に
用いられる。
成膜時の基板温度が600℃より低いと、多結晶薄膜が
形成され易い。そして成膜時の基板温度が高いほど単結
晶薄膜の形成速度が大きくなる傾向にあるが、1000℃以
上の高温は実用上必要はなく、また薄膜の低温形成の観
点から好ましくない。しかして、基板の加熱方法は何ら
臨界的な因子ではなく特に限定されるものではない。例
えば、SiCでコートしたカーボンサセプターを用い高周
波により誘導加熱することや、石英サセプターを用い赤
外線ランプにより加熱することなどはいずれも有用であ
る。
また、混合ガスの形成方法も臨界的な因子ではなく特
に限定されるものではない。たとえば、該形成装置外で
あらかじめ混合したガスを導入することや、外形成装置
内で上記の希釈度合と満足すべく水素を混合することの
いずれも有用である。もちろん、水素希釈のフルオロシ
ランやシランを使用することもなんら支障がない。
本発明において該形成装置内の圧力も臨界的な因子で
はない。成膜時の混合ガスの圧力は常圧であっても減圧
であってもかまわない。前述したガスの流量比および成
膜時の基板温度を適時変更することで良好な単結晶薄膜
を得ることができるのである。
〔発明を実施するための好ましい形態〕
つぎに本発明の好ましい実施の態様についてしるす。
基板導入取り出し手段、基板保持手段、基板加熱手段、
ガス導入手段、ガス排出手段を少なくとも有する薄膜形
成装置内に、洗浄したシリコン基板を設置する。水素気
流中で1000〜1200℃に加熱し、清浄な基板表面を露出さ
せた後、600℃以上の所定の成膜温度まで降温する。し
かる後に、所定の流量のシラン、フルオロシランおよび
水素からなる原料ガスを流しCVD法により基板上に単結
晶薄膜を成膜する。成膜速度を考慮にいれて必要な膜厚
になる時間においてガスを水素に切り換えた後、降温除
熱しウエハーを取り出す。
〔発明の効果〕
本発明において得られるシリコン単結晶薄膜は、成膜
時の基板温度が1000〜600℃という低温において形成さ
れ、かつ膜中に水素を含まない良好なシリコン単結晶薄
膜である。半導体装置の高集積化に伴い半導体薄膜や半
導体装置の低温形成技術が熱望されている半導体装置の
製造分野に対して、本発明は極めて有用な技術を提供す
るものである。
また本発明は、水銀増感光CVD法のように、有害な水
銀を必要としないので公害防止面からもすぐれた技術で
ある。さらに、水銀増感光CVD法よりも高速成膜が達成
されるので実用面からもすぐれた技術であると云える。
〔実施例〕
基板導入取り出し手段、基板保持手段、基板加熱手
段、ガス導入手段、ガス排出手段を設備された薄膜形成
装置を用いて本発明を実施した。
基板導入取り出し手段を用いて洗浄済のn型シリコン
ウエハー(100)を導入し基板保持手段に設置した。ガ
ス導入手段から水素ガスを毎分2の流量で導入しつ
つ、ガス排出手段から排出し該形成装置内を常圧に保ち
基板を1120℃まで昇温し、その温度に10分間保ち基板表
面を清浄にした。しかる後に基板温度を所定の成膜温度
まで降温し、水素ガスを混合ガスに切り変えた。この混
合ガスは水素、シラン、フルオロシランを所定の流量比
で混合されたものである。CVD法により30分間膜を堆積
させた後混合ガスを水素ガスに切り変え、水素ガスを毎
分2流しつつ基板温度を室温まで降温した。しかる後
に基板導入取り出し手段を用いて基板を取り出した。表
面を反射電子線回折(RHEED)により観察して、ストリ
ーク状の回折像が現れることで単結晶薄膜が成長したこ
とを確認した後、加熱分析装置により単結晶薄膜にから
の水素放出試験を実施した。表−1および表−2に実施
例および比較例の、ガス流量比,成膜時の基板温度、RH
EEDによる測定結果、水素放出試験の測定結果を示す。
表中のRHEEDの測定結果の項目において、◎印は回折像
がストリーク状を示し良好な単結晶薄膜であったこと
を、○印は回折像がストリーク状を示しはしたが、結晶
性においてやや劣る単結晶薄膜であったことを、×印は
回折像がストリーク状を示さず単結晶薄膜が形成されな
かったことを示している。また、表中の水素放出試験の
結果の項目において○印は水素が不検出であったことを
示している。
また実施例5で得られた単結晶膜中の不純物(炭素、
酸素、窒素)元素を2次イオン質量分析(SIMS)によっ
て分析した結果炭素濃度1×1017 原子/cm3、酸素濃度5×1017原子/cm3、窒素濃度は定量
限界(1×1017原子/cm3)以下であった。また実施例5
で得られた単結晶薄膜の導電率を測定したところ1000Ω
cmと良好な結果を得た。Description: TECHNICAL FIELD The present invention relates to low-temperature formation of a silicon single crystal thin film. BACKGROUND OF THE INVENTION With the high integration of semiconductor devices, low temperature formation methods for silicon epitaxial substrates have been attracting attention. Various approaches have been taken for this purpose. However, for example,
Thermal CVD of monosilane: In (Ch emical V apor D eposition chemical vapor deposition) method requires a high temperature of about 1000 to 1100 ° C.. At such a high temperature, solid phase diffusion or autodoping of impurities from the substrate at the time of film formation is unavoidably caused, so that it is difficult to obtain a high-quality epitaxial thin film. We found that when fluorosilane was added to a mixed gas of silane and hydrogen and decomposed by mercury-sensitized CVD, epitaxial growth on a silicon substrate occurred at a substrate temperature of 300 ° C. It was clarified from the results of the thermal analysis test of hydrogen that the film formed in 1 contains a considerable amount of hydrogen. It is considered that the incorporation of hydrogen into the film is undesirable because it has a problem in the manufacture of semiconductor devices. As a result of further studies to solve such a problem, the present inventors have found that when a mixed gas of silane, fluorosilane, and hydrogen is introduced onto a substrate to form a film while keeping the substrate temperature at 600 ° C. or higher, hydrogen is generated. The present inventors have found that a silicon single crystal thin film containing no silicon can be obtained, and completed the present invention. DISCLOSURE OF THE INVENTION That is, the present invention is a method for producing a silicon single crystal thin film, which comprises introducing a mixed gas consisting of silane, fluorosilane and hydrogen onto a heated single crystal substrate to grow a single crystal thin film. . Hereinafter, the present invention will be described in detail. The present invention is basically characterized by adding fluorosilane to a mixed gas of hydrogen and silane. As the fluorosilane used in the present invention, fluorosilane or fluorodisilane of monosilane represented by SiH 4-n F n (n is an integer of 1 to 4), particularly Si
2 F 6 is effectively used. The silane is Si m H 2m + 2
Monosilane, disilane, trisilane and the like represented by (m is an integer of 1 to 3) are effectively used. In the present invention, such a fluorosilane-containing gas is introduced onto a heated substrate to form a single crystal thin film by the CVD method. In a particularly preferred embodiment, the single crystal thin film is grown on a single crystal substrate, and a silicon wafer or sapphire is preferably used as the substrate. That is, in summary, the present invention provides a mixed gas of hydrogen and silane gas mixed with fluorosilane at 600 ° C.
This is a method of forming a silicon single crystal thin film by guiding it onto the heated single crystal substrate and forming a film by the CVD method. Concerning the mixed gas ratio, it is convenient to express it as a supply flow rate (capacity) ratio of the raw material gas to the forming apparatus for forming the single crystal thin film. Preferred fluorosilane / silane ratios range from 0.1 to 50, more preferably 0.2 to 20. Fluorosilane /
When the silane ratio is about 0.1 or lower, polycrystals are easily formed when the substrate temperature is around 600 ° C. or lower. On the other hand, if the ratio of fluorosilane / silane exceeds 50, the growth rate of the single crystal thin film is decreased, which is not preferable. The preferred hydrogen / (fluorosilane + silane) ratio is 5
It is in the range of 500, more preferably 50-200. A single crystal thin film tends to be formed in a region where the hydrogen / (fluorosilane + silane) ratio is relatively large, but if the amount of hydrogen added is too large, the growth rate of the single crystal thin film decreases, which is not preferable. The substrate temperature during film formation is effectively 600 ° C. or higher, more preferably 700 ° C. or higher, and even more preferably 800 ° C. or higher. When the substrate temperature during film formation is lower than 600 ° C., a polycrystalline thin film is easily formed. The higher the substrate temperature during film formation, the higher the single crystal thin film formation rate tends to be. However, a high temperature of 1000 ° C. or higher is not necessary in practice, and it is not preferable from the viewpoint of forming a low temperature thin film. The method of heating the substrate is not a critical factor and is not particularly limited. For example, induction heating with a high frequency using a carbon susceptor coated with SiC and heating with an infrared lamp using a quartz susceptor are both useful. Also, the method of forming the mixed gas is not a critical factor and is not particularly limited. For example, it is useful to introduce a premixed gas outside the forming apparatus or to mix hydrogen in the outside forming apparatus so as to satisfy the above-mentioned dilution degree. Of course, there is no problem in using fluorosilane or silane diluted with hydrogen. In the present invention, the pressure in the forming apparatus is not a critical factor. The pressure of the mixed gas during film formation may be normal pressure or reduced pressure. A good single crystal thin film can be obtained by appropriately changing the gas flow rate ratio and the substrate temperature during film formation. [Preferred Embodiments for Carrying Out the Invention] Next, preferred embodiments of the present invention will be described.
Substrate introduction / extraction means, substrate holding means, substrate heating means,
A cleaned silicon substrate is placed in a thin film forming apparatus having at least gas introduction means and gas discharge means. After heating to 1000 to 1200 ° C in a hydrogen stream to expose a clean substrate surface, the temperature is lowered to a predetermined film forming temperature of 600 ° C or higher. Thereafter, a raw material gas consisting of silane, fluorosilane and hydrogen is flown at a predetermined flow rate to form a single crystal thin film on the substrate by the CVD method. The gas is switched to hydrogen at a time required to achieve the required film thickness in consideration of the film forming speed, and then the temperature is lowered and the heat is removed to take out the wafer. [Effects of the Invention] The silicon single crystal thin film obtained in the present invention is a good silicon single crystal thin film that is formed at a low substrate temperature of 1000 to 600 ° C. and does not contain hydrogen. The present invention provides an extremely useful technique in the field of semiconductor device manufacturing, in which a semiconductor thin film or a low-temperature forming technique for a semiconductor device is eagerly awaited as the semiconductor device is highly integrated. Further, the present invention is an excellent technique in terms of pollution prevention because it does not require harmful mercury unlike the mercury-sensitized CVD method. Furthermore, it can be said that this technique is superior from the practical point of view because it achieves higher speed film formation than the mercury-sensitized CVD method. Example The present invention was carried out using a thin film forming apparatus equipped with a substrate loading / unloading means, a substrate holding means, a substrate heating means, a gas introducing means, and a gas discharging means. The cleaned n-type silicon wafer (100) was introduced by using the substrate loading / unloading means and set on the substrate holding means. While introducing hydrogen gas at a flow rate of 2 per minute from the gas introducing means, the gas is discharged from the gas discharging means and the inside of the forming apparatus is kept at a normal pressure to raise the temperature of the substrate to 1120 ° C. Cleaned up. Thereafter, the substrate temperature was lowered to a predetermined film forming temperature, and the hydrogen gas was switched to a mixed gas. This mixed gas is a mixture of hydrogen, silane, and fluorosilane at a predetermined flow rate ratio. After depositing a film by the CVD method for 30 minutes, the mixed gas was switched to hydrogen gas, and the substrate temperature was lowered to room temperature while flowing hydrogen gas at 2 per minute. Thereafter, the substrate was taken out using the substrate introduction / extraction means. After observing the surface by backscattered electron diffraction (RHEED) and confirming that a single crystal thin film has grown by the appearance of streak-like diffraction images, a hydrogen desorption test from the single crystal thin film was performed using a heating analyzer. did. Tables 1 and 2 show gas flow ratios, substrate temperatures during film formation, and RH of the examples and comparative examples.
The measurement result by EED and the measurement result of hydrogen release test are shown.
In the items of the RHEED measurement results in the table, ⊚ indicates that the diffraction image was a streak-like good single crystal thin film, and ○ indicates that the diffraction image showed a streak-like shape, but the crystallinity was a little. The inferior single crystal thin film indicates that the diffraction pattern did not show a streak pattern and that the single crystal thin film was not formed. Further, in the items of the results of the hydrogen release test in the table, a circle indicates that hydrogen was not detected. Further, impurities (carbon, carbon, etc.) in the single crystal film obtained in Example 5 were used.
Analysis of oxygen and nitrogen) elements by secondary ion mass spectrometry (SIMS) indicated that the carbon concentration was 1 × 10 17 Atoms / cm 3 , oxygen concentration 5 × 10 17 atoms / cm 3 , and nitrogen concentration were below the limit of quantification (1 × 10 17 atoms / cm 3 ). Example 5
When the conductivity of the single crystal thin film obtained in step 1 was measured, it was 1000 Ω.
Good results were obtained with cm.
Claims (1)
素/(フルオロシラン+シラン)比が50〜200の範囲で
ある水素で高度に希釈された混合ガスを600℃以上に加
熱された基板上に導き紫外光の照射を行うことなくCVD
法により成膜することを特徴とするシリコン単結晶薄膜
の製法。 2.フルオロシランがSiH4-nFn(n=1〜4)であらわ
されるフルオロモノシランまたはSi2F6なるフルオロジ
シランである特許請求の範囲第1項記載の製法。 3.シランがSimH2m+2(m=1〜3)である特許請求
の範囲第1項記載の製法。 4.基板が単結晶基板である特許請求の範囲第1項記載
の製法。(57) [Claims] A highly gaseous mixture of silane, fluorosilane and hydrogen, wherein the hydrogen / (fluorosilane + silane) ratio is in the range of 50 to 200, is introduced onto a substrate heated to 600 ° C. or higher, and ultraviolet light is introduced. CVD without irradiation
A method for producing a silicon single crystal thin film, characterized by being formed by a method. 2. Preparation of fluorosilane SiH 4-n F n (n = 1~4) fluoro monosilane or Si 2 F 6 Scope first claim of claims is fluoro disilane represented. 3. The method according to claim 1, wherein the silane is Si m H 2m + 2 (m = 1 to 3). 4. 2. The method according to claim 1, wherein the substrate is a single crystal substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62168203A JP2667664B2 (en) | 1987-07-06 | 1987-07-06 | Manufacturing method of silicon single crystal thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62168203A JP2667664B2 (en) | 1987-07-06 | 1987-07-06 | Manufacturing method of silicon single crystal thin film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6411321A JPS6411321A (en) | 1989-01-13 |
JP2667664B2 true JP2667664B2 (en) | 1997-10-27 |
Family
ID=15863699
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62168203A Expired - Fee Related JP2667664B2 (en) | 1987-07-06 | 1987-07-06 | Manufacturing method of silicon single crystal thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2667664B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101842875B1 (en) * | 2015-06-19 | 2018-03-28 | 주성엔지니어링(주) | Thin film deposition method and thin film deposition structure |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5422306A (en) * | 1991-12-17 | 1995-06-06 | Matsushita Electric Industrial Co., Ltd. | Method of forming semiconductor hetero interfaces |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6330398A (en) * | 1986-07-23 | 1988-02-09 | Toshiba Corp | Epitaxy |
JPS6347920A (en) * | 1986-08-18 | 1988-02-29 | Hitachi Ltd | Manufacture of crystalline semiconductor device |
-
1987
- 1987-07-06 JP JP62168203A patent/JP2667664B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101842875B1 (en) * | 2015-06-19 | 2018-03-28 | 주성엔지니어링(주) | Thin film deposition method and thin film deposition structure |
Also Published As
Publication number | Publication date |
---|---|
JPS6411321A (en) | 1989-01-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3707726B2 (en) | Silicon carbide manufacturing method, composite material manufacturing method | |
JP2005503000A (en) | Film formation on mixed substrate using trisilane | |
JP2018522412A (en) | Growth of epitaxial 3C-SiC on single crystal silicon | |
JPH05182920A (en) | Epitaxial semiconductor wafer with low oxygen region, spread of which can be adjusted, and manufacture thereof | |
JPH0650730B2 (en) | Method for manufacturing semiconductor thin film | |
EP0241204B1 (en) | Method for forming crystalline deposited film | |
JP2667664B2 (en) | Manufacturing method of silicon single crystal thin film | |
JPH10189695A (en) | Vapor growth susceptor and manufacture thereof | |
JP4782670B2 (en) | Epitaxial Ge-containing film growth method and epitaxial semiconductor film forming system | |
JPH05259091A (en) | Manufacture of semiconductor device | |
TW202230462A (en) | Method for manufacturing epitaxial wafer | |
JP2004363510A (en) | Manufacturing method of semiconductor substrate | |
JP2004186376A (en) | Apparatus and method for manufacturing silicon wafer | |
JPS6012775B2 (en) | Method for forming a single crystal semiconductor layer on a foreign substrate | |
JPH09255495A (en) | Silicon carbide film and its production | |
JP2618407B2 (en) | Manufacturing method of single crystal alloy thin film | |
JPH071753B2 (en) | Method for manufacturing semiconductor device | |
JPS61141118A (en) | Vapor growth method | |
JPH04184921A (en) | Vapor growth method | |
CN101882572B (en) | Method for realizing selectively growing Ge-containing material layer through low temperature | |
JPH0733316B2 (en) | Manufacturing method of single crystal thin film | |
JPS63222096A (en) | Production of single crystal thin film | |
JPS63159295A (en) | Production of p type single crystal thin film | |
JPS63157872A (en) | Production of thin semiconductor film | |
JPH0733317B2 (en) | Manufacturing method of n-type single crystal thin film |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |