JP2654965B2 - High Definition Television Receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial application field) The present invention relates to a cinemascope-size NTSC (National Tel).
The present invention relates to a high-definition television receiver for automatically outputting an image of a signal over the entire screen of a high-definition display.

(Prior Art) In recent years, the appearance of high-definition televisions as next-generation televisions is becoming more concrete. Among them, a circuit has been devised to display a conventional NTSC signal on a display of a high-definition television by applying some processing.

Conventionally, as this kind of technology, for example, Japanese Patent Application Laid-Open No. 62-2637
As described in Japanese Patent Publication No. 83, a high-definition television signal, a current NTSC television signal, and an external signal are provided as input signals, and the current NTSC signal and the external signal are arranged on the same screen as a parent screen and a child screen. In addition, the screen size of high-definition television is fully utilized.

FIG. 5 shows a display state of a conventional high-definition television receiver. In FIG. 5, reference numeral 61 denotes a high-definition television output screen, 62 denotes a current television output screen, 63 denotes an external signal output screen, and 64 denotes a current television output screen of a cinemascope signal.

As is apparent from FIG. 5, both the current NTSC television signal output screen 62 and the external signal output screen 63 can be arranged on the same screen in the high-definition television output screen 61.

FIG. 6 is a block diagram of a conventional high-definition television receiver. In FIG. 6, reference numeral 10 denotes a signal conversion circuit, 11 denotes a composite image creation circuit, 12 denotes a switching circuit, and 13 denotes a high-definition television output device.

Next, the operation of the above conventional example will be described. In the sixth figure, the signal conversion circuit 10 NTSC signals a ₁ and the external input signal a ₂
Is input, scan conversion processing and signal reduction processing are performed according to the main screen / small screen, the main screen signal a ₄ and the sub screen signal a ₅ are output, and input to the composite image creating circuit 11 to output the composite image. a ₆ Switching circuit 12 switches the either of the input synthetic image output a ₆ a high definition television signal a ₃ Output signal
a _{7 is} assumed. High definition television output device 13 outputs in the final image as input signals a _7, is displayed in response to the input signal as a result Figure 6.

(Problems to be Solved by the Invention) However, in the above-mentioned conventional method, when the NTSC signal is of a cinemascope size, the NTSC signal becomes small in order to display the NTSC signal on a CRT for high-definition television, as is apparent from FIG. The size of the screen is further reduced, and the characteristics of the large screen cannot be obtained.

The present invention solves the above-mentioned conventional problems, and provides a high-definition television receiver having a signal detection circuit that automatically detects an NTSC signal of a cinema scope when the signal is input. It is the purpose.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides a signal detection circuit for determining the properties of an NTSC signal, a signal conversion circuit, a composite image generation circuit, and an input signal of the composite image generation circuit. And a switching circuit for switching the output signal using the output signal as an input signal, a switching circuit for receiving the high definition signal and the converted NTSC signal as input, and a high definition television output device.

(Operation) According to the above configuration, when a normal NTSC signal is input, the NTSC signal passes through a signal conversion circuit and a composite image creation circuit to output a parent image and a child image. When a signal is input, the output of the signal detection circuit causes the NTSC signal to pass through only the signal conversion circuit and output the image to the entire CRT.

(Embodiment) FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention. In FIG. 1, reference numeral 10 denotes a signal conversion circuit, 11 denotes a composite image creation circuit, 12 and 15 denote switching circuits, 13 denotes a high-definition television output device, and 14 denotes a signal detection circuit.

FIG. 2 is a block diagram of a signal detection circuit according to an embodiment of the present invention. FIG. 2 (a) shows a block diagram of the entire signal detection circuit, and FIG. 2 (b) shows details of the gate circuit and the detection circuit. (A portion surrounded by a broken line in FIG. 2A). In FIG. 2, 21 is a low-pass filter (LPF), 22 is a counter circuit, 23 is a gate circuit, 24 is a detection circuit, 41 to 43 are gate circuits, 44 to 46 are addition circuits, and 47 to
49 is a core circuit, 50 is a NOR circuit, and 51 is an AND circuit. Third
FIG. 4 shows the positional relationship between various signals, and FIG. 4 shows a vertical scanning signal for outputting a scanning conversion signal generated from a normal NTSC signal and a cinemascope signal.

Next, the operation of the above embodiment will be described with reference to FIGS. In FIG. 1, the NT separated from the sync
SC signal a ₁ and the synchronization signal a ₁₂ is input to the signal detection circuit 14. The signal detection circuit 14 has the configuration shown in FIG. Fig. 3 (a) shows a schematic diagram of a general NTSC signal for one field.
Shown in In FIG. 3, V _S is a vertical synchronizing signal pulse. In the case of a cinema scope, the NTSC signal does not exist at the top and bottom of the screen, so that when represented in a schematic diagram, it becomes as shown in FIG. 3 (b). Here, (1), (2), (262), and (263) are the non-signal periods.

Counter circuit 22 of FIG. 2 is reset by the falling edge of the vertical sync pulse, the count value a ₁₃ starts the counter operation at the rising is input to the gate circuit 41 to 43. The gate circuits 41 to 43 are provided with (1), (2), (262), and (26) in FIG.
In the section 3), that is, d ₁ to d ₂ , d _{5 in} the counter value of FIG.
Opening the gate of the gate circuit 41 and 43 of FIG. 2 during to d ₆ (b), also cinemascope in normal NTSC signal NTSC
The section where the video signal exists even when the signal is present, that is, FIG. 3 (d)
The gate of the gate circuit 42 between the d ₃ to d ₄ are opened. Fig. 2 (a) to suppress malfunction while the gate is open
In the amplitude of the video signal a ₁₁ passing through the LPF21 is gradually being respectively added by adder circuit 44 to 46 of FIG. 2 (b). Outputs a _{21 to} a ₂₃ of the adders 44 to 46 are input to core circuits 47 to 49, and the core circuits 47 to 49 output thresholds Th ₁ and Th set respectively.
If the input is equal to or greater than the threshold value at the boundary of ₂ , ₃ (not shown), “1” is output as a signal is present, and if the input is less than the threshold value, “0” is output as no signal is present (a ₂₄ to
a ₂₆ ). The core circuit output signals a ₂₄ and a ₂₆ are input to the NOR circuit 50, and the output a ₂₇ of the NOR circuit 50 is the output signals a ₂₅ and A of the core circuit 48.
It is input to the ND circuit 51 becomes the output a ₁₅ signal detection circuit 4.
Table 1 shows the logic of the detection circuit.

If the core circuit output signals a ₂₄ and a ₂₆ are both “0”, there is a high probability of being a cinemascope signal, but if the core circuit output signal a ₂₅ also becomes “0”, it is determined that no video signal exists. The screen output is displayed on the screen in the same manner as the normal television output screen 62 in FIG. 5, and the core circuit output signal a
₂₄ and a ₂₆ are both “0” and the core circuit output signal a ₂₅ is “1”
At this time, since the screen is for a cinemascope, it is displayed on the screen in the same manner as the high-definition television output screen 61 as the screen size in FIG.

The signal conversion circuit 10 shown in FIG.
a ₁ and the external input signal a ₂ is input, the scanning conversion processing in accordance with the main screen, sub-screen, the signal contraction increase process is performed, the main screen signal
a ₄ , a small screen signal a ₅ is output, and a composite image input to the composite image generation circuit 11 is generated as a composite image output a ₆ . The switching circuit 15 is controlled by the output signal a ₁₅ for the signal detection circuit 14, a normal signal a ₆ have been processed NTSC signal or cinema shea Coop signal synthesizing image creation circuit 11 through no signal for
switching one of a ₄ outputs (a _16). Further, the switching circuit 12 receives the NTSC signal a ₁₆ and the high-definition television signal a ₃ as input, and switches any of them to produce an output signal a ₇ . High definition television output unit 13 outputs a signal a ₇ as the input final image. The output signal 525 by scan conversion process if the input signal a ₁ is an NTSC signal: for the double speed signal (1 1), the vertical scanning signal is a 4 (a), Cinemascope signal Is input, it is necessary to remove the upper and lower ends (in this case, 2H) in which there is no signal as shown in FIG. 4 (b). This switching is performed at the output a ₁₆ signal detection circuit 14.

(Effects of the Invention) As is clear from the above embodiment, the present invention adds an LPF for suppressing malfunction, a counter circuit serving as a parameter for opening a gate, a gate circuit, and an input signal while the gate is open. Detecting a cinemascope signal using an adder circuit, a core circuit, and a logic gate, changing the intermediate processing and the vertical scanning signal, and outputting the cinemascope signal to the entire high-definition television output screen Having.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, FIG. 2 is a block diagram of a signal detection circuit in one embodiment of the present invention, FIG. 3 is a diagram showing a positional relationship between various signals, and FIG. FIG. 5 is a diagram showing a display state of a conventional high-definition television receiver, and FIG. 6 is a conventional high-definition television for outputting a scan conversion signal formed from an NTSC signal and a cinemascope signal. It is a block diagram of a John receiver. 10 ... Signal conversion circuit, 11 ... Synthesized image creation circuit, 12,15
…… Switching circuit, 13 …… High-definition television output device, 14
…… Signal detection circuit, 21 …… Low-pass filter, 22 …… Counter circuit, 23 …… Gate circuit, 24 …… Detection circuit, 41-
43 ...... gate circuit, 44 to 46 ...... adder circuit, 47 to 49 ...... core circuit, 50 ...... NOR circuit, 51 ...... the AND circuit, a ₁ ...... input signal (NTSC signal), a ₂ ...... External input signal, a ₃ ...... high-definition television signal, a ₁₂ ...... synchronization signal.

Claims (3)

(57) [Claims] An NTSC signal and a synchronizing signal are inputted, and a signal detecting circuit for judging the nature of the NTSC signal is provided.
A signal conversion circuit that receives an SC signal as input, converts and outputs the signal, a composite image generation circuit that receives at least two or more outputs of the signal conversion circuit as input and forms one image, and input signals and outputs of the composite image generation circuit A switching circuit that selects an output signal according to an output signal of the signal detection circuit with a signal as an input signal,
A high-definition television receiver comprising: a switching circuit that receives the switching circuit output and a high-definition signal as input and outputs one of them; and a high-definition television output signal device. 2. A low-pass filter for suppressing a high-frequency component of an input signal, a counter circuit reset and started by a synchronization signal, a gate circuit for opening a gate in response to a counter output, and a signal output from the low-pass filter and a gate circuit. A signal detection circuit for a high-definition television receiver, comprising: a detection circuit that determines a property of the input signal by using the output signal of the above as an input signal. 3. A detection circuit comprising: an addition circuit for adding an input signal between gate signals output by a gate circuit; a core circuit for suppressing an output malfunction; and a logic gate. The signal detection circuit for a high-definition television receiver according to the above (1).