JP2653471B2 - Semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a light emitting diode having a high current injection efficiency, a low noise photodetector, and a transistor having a high current amplification factor.

(Prior art)

Conventionally, there is a light emitting diode made of a II-VI compound semiconductor such as ZnS, ZnSe, and ZnTe. For example, as shown in FIG. 7, there is a ZnSe light emitting diode impurity concentration of from 10 ¹³ ~0 ¹⁴ P-type ZnSe layer in cm ^-3 1 and the impurity concentration of 10 ¹⁶ cm ^-3 of N-type ZnSe layer 2 which . 7A and 7B are energy diagrams of the ZnSe light emitting diode of FIG. 7, FIG. 7A is an energy diagram at zero bias, and FIG. 7B is an energy diagram at positive bias.

There is a multiplication type photodetector using a compound semiconductor. For example, as shown in FIG. 8, p ⁺ · GaAs layer 3 and the i ·
There is a GaAs avalanche photodiode composed of a GaAs layer 4 and an n ⁺ GaAs layer 5. FIG. 8A is an energy diagram of the GaAs avalanche photodiode of FIG.

There is a current amplifier using a compound semiconductor. For example, as shown in FIG. 9, an N-type GaAlAs layer 6 is
There is a hetero bipolar transistor using a P-type GaAs layer 7 as a base and an N-type GaAs layer 8 as a collector. FIG. 9A is an energy diagram of the heterobipolar transistor of FIG.

[Problems to be solved by the invention]

However, the conventional light-emitting diode using a II-VI compound semiconductor has a problem in that a light-emitting diode having good injection efficiency cannot be manufactured in the II-VI compound semiconductor. The reason is that it is difficult to obtain high-concentration, low-resistance P-type and N-type II-VI compound semiconductor layers. For example, ZnS and ZnSe are blue and ZnTe are green light emitting element materials, but it was difficult to obtain a P-type layer for ZnS and ZnSe and an N-type layer for ZnTe.

For example, in the ZnSe light emitting diode of FIG.
As shown in FIG. 7A, a P-type with an impurity concentration of 10 ¹³ to 10 ¹⁴ cm ^-3
ZnSe layer 1, N-type ZnSe layer 2 having an impurity concentration of 10 ¹⁶ cm ^-3 ,
Since the carrier concentration of the P-type ZnSe layer 1 is low, the width of the depletion layer of the PN junction is large and the recombination efficiency of minority carriers is poor.

Further, in the conventional multiplication type photodetector using a compound semiconductor, since the ratio of the ionization coefficient between electrons and holes is close to 1, a satisfactory noise characteristic and response speed cannot be obtained. was there.

For example, in the GaAs avalanche photodiode shown in FIG. 8, as shown in FIG. 8A, the ionization coefficient due to electrons and the ionization coefficient due to holes are almost equal, a positive feedback loop is formed, and the whole system becomes unstable. The noise characteristics and response characteristics of the device are impaired.

Further, in the amplifier using the conventional compound semiconductor, for example, in the heterobipolar transistor of FIG.
As shown in the figure, the bandgap energy of the emitter region composed of the N-type GaAlAs layer 6 is larger than that of the base region composed of the P-type GaAs layer 7 and the collector region composed of the N-type GaAs layer 8. The hole flow into the emitter can be prevented, and the impurity concentration in the base region composed of the P-type GaAs layer 7 can be increased. However, the valence band discontinuity of GaAs of GaAlAs is as small as 0.06 eV, and the P-type GaAs When the impurity concentration in the base region composed of the layer 7 is high, the P-type
There is a problem that holes flow from the GaAs layer 7 to the N-type GaAlAs layer 6 in the emitter region is inevitable, and the current amplification factor is reduced. For example, when it is 10 ¹⁸ cm ⁻³ or more, the inflow of holes into the emitter region composed of the N-type GaAs layer 8 cannot be ignored, leading to a decrease in current amplification factor.

The present invention has been made to solve the above problems.

An object of the present invention is to provide a technique capable of increasing current injection efficiency in a semiconductor device using a compound semiconductor.

Another object of the present invention is to provide a light emitting semiconductor device using a compound semiconductor having high current injection efficiency.

Another object of the present invention is to provide a semiconductor device for photodetection using a compound semiconductor with low noise and high response.

Another object of the present invention is to provide a current amplification semiconductor device using a compound semiconductor having a high current amplification factor.

The above and other objects and novel features of the present invention are as follows.
It will become apparent from the description of the present specification and the accompanying drawings.

[Means for solving the problem]

In order to achieve the above object, a semiconductor device according to a first aspect of the present invention comprises an undoped II-VI compound semiconductor layer having a thickness of 10 to 50 ° and a III-type impurity doped with an N-type impurity having a thickness of 10 to 50 °. A first stacked body in which -V group compound semiconductor layers are alternately stacked; an undoped II-VI group compound semiconductor layer having a thickness of 10 to 50 mm; and a P-type impurity having a thickness of 10 to 50 mm. A second stacked body in which the group III-V compound semiconductor layers are alternately stacked, and an undoped II-VI formed between the first stacked body and the second stacked body.
It is mainly characterized by being composed of a group III compound semiconductor layer.

According to a second aspect of the present invention, there is provided a semiconductor device comprising a group III-V compound semiconductor layer doped with a P-type impurity, a group III-V compound semiconductor layer doped with an N-type impurity, and a group III doped with the P-type impurity. A predetermined thickness of an undoped II-VI compound semiconductor layer and a predetermined thickness of an undoped III- formed between the group V compound semiconductor layer and the III-V compound semiconductor layer doped with the N-type impurity; The main feature is that it is composed of a group V compound semiconductor layer and a stacked body alternately stacked.

A semiconductor device according to a third aspect of the present invention provides an
A stacked body in which a group-VI compound semiconductor layer and a group III-V compound semiconductor layer doped with an N-type impurity having a predetermined thickness are alternately stacked, and a group III-V compound semiconductor doped with an N-type impurity And a P-type impurity-doped III-V compound semiconductor layer formed between the layered product and the N-type impurity-doped III-V compound semiconductor layer. Main features.

[Action]

According to the means, a central undoped II-VI compound semiconductor layer is formed as a first undoped II-VI compound semiconductor layer and a III-V compound semiconductor layer doped with an N-type impurity are alternately stacked. And a second stacked body in which an undoped II-VI compound semiconductor layer and a III-V compound semiconductor layer doped with a P-type impurity are alternately stacked. Since a high-concentration, low-resistance P-type semiconductor layer and an N-type semiconductor layer can be formed by the stacked body, minority carriers can be efficiently injected from each of the stacked bodies into the central undoped II-VI compound semiconductor layer. Thus, a visible light emitting diode with high injection efficiency can be obtained.

According to the above means, a stacked body in which a central undoped II-VI compound semiconductor layer and an undoped III-V compound semiconductor layer are alternately stacked is converted into a P-type doped II.
Group IV compound semiconductor layer and N-type doped I
Since it was sandwiched between the II-V compound semiconductor layers,
When a large electric field is applied, the II-VI compound semiconductor layer
Due to the large valence band discontinuity of the group III-V compound semiconductor layer, the ionization rate of holes becomes larger than that of electrons.
An avalanche photodiode with low noise can be obtained.

According to the means, the central P-type impurity is doped
The III-V compound semiconductor layer is composed of a III-V compound semiconductor layer doped with an N-type impurity, an undoped II-VI compound semiconductor layer and a III-V compound semiconductor layer doped with an N-type impurity. Since it is sandwiched between the stacked layers alternately stacked, the large valence band discontinuity of the II-VI group compound semiconductor layer and the III-V group compound semiconductor layer causes the central P-type impurity to be doped with III-type impurity. It is possible to prevent a hole injection from a group V compound semiconductor layer into a stacked body in which a II-VI compound semiconductor layer and a III-V compound semiconductor layer are alternately stacked, and a hetero bipolar transistor having a high current amplification factor. Can be obtained.

(Example of the invention)

Hereinafter, an embodiment of the present invention will be specifically described with reference to the drawings.

In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and their repeated description will be omitted.

FIG. 1 is an explanatory diagram for explaining a schematic configuration of a semiconductor device using a compound semiconductor according to a first embodiment of the present invention. FIG. 2A (at zero bias) and FIG. 2B (at positive bias) () Is an energy diagram of the semiconductor device of FIG.

The semiconductor device according to the first embodiment, as shown in FIG.
The structure is such that a II-VI group compound semiconductor layer (C) is sandwiched between a P-type semiconductor layer (A) and an N-type semiconductor layer (B).

The P-type semiconductor layer (a) has an undoped ZnSe layer 11 having a thickness of about 20 ° and a carrier concentration of 1 × 10 2 having a thickness of about 20 °.
^{It is} made of a laminate in which Zn-doped p-GaAs layers 12 of about ¹⁹ cm ^-3 are alternately laminated, and the average carrier concentration is 5 × 10 ¹⁸
cm- ³ .

The N-type semiconductor layer (b) has an undoped ZnSe layer 11 having a thickness of about 20 ° and a carrier concentration of 1 × 10 2 having a thickness of about 20 °.
^It is composed of a laminate in which Se-doped n-GaAs layers 13 of ¹⁹ cm ^-3 are alternately laminated, and the average carrier concentration is 5 × 10 ¹⁸ cm ^-3.
It is about.

The II-VI compound semiconductor layer (C) is composed of an undoped ZnSe layer having a thickness of about 50 to 100 °.

As shown in FIGS. 1, 2A and 2B, the Zn-doped p
The large valence band discontinuity ΔEv between GaAs of the GaAs layer 12 and ZnSe of the undoped ZnSe layer 11 is 1.4 eV (ΔEv = 1.4 eV),
As a result, the Zn-doped p-GaAs layer 12 and the undoped ZnSe layer
When the film thickness of 11 is as thin as 50 ° or less, a mini band is formed. On the other hand, the conduction band has a small discontinuity value (ΔEc <0.1e
V), no mini band is formed. When a positive bias is applied as shown in FIG. 2B, electrons are injected from the N-type semiconductor layer (B) into the II-VI group compound semiconductor layer (C) composed of the undoped ZnSe layer at the center, and the P-type semiconductor layer ( Holes are injected from the hole mini-band of b). At this time, both the N-type semiconductor layer (B) and the P-type semiconductor layer (A) have a high concentration (5 × 10 ^18).
cm ⁻³ ), carriers are efficiently injected to emit light.

Here, in a structure in which ZnSe layers and GaAs layers are alternately stacked, it is a necessary condition that the thickness of each layer is as thin as 50 ° or less. It should be noted that the central undoped ZnSe layer II-
Even without the group VI compound semiconductor layer (c), it can operate as a light emitting diode (LED), in which case the emission wavelength corresponds to the energy cap difference between the conduction band and the hole mini band.

FIG. 3 is an explanatory diagram for explaining a schematic configuration of a semiconductor device using a compound semiconductor according to a second embodiment of the present invention, and FIG. 4 is an energy diagram of the semiconductor device of FIG. .

The semiconductor device of the second embodiment is, as shown in FIG.
II-VI by P-type semiconductor layer (d) and N-type semiconductor layer (e)
It has a structure in which a stacked body layer (f) in which group III compound semiconductor layers and group III-V compound semiconductor layers are alternately stacked is sandwiched.

The P-type semiconductor layer (d) is composed of a p ⁺ GaAs layer.

The N-type semiconductor layer (e) is composed of an N ⁺ GaAs layer.

The laminate (f) in which the II-VI group compound semiconductor layers and the III-V group compound semiconductor layers are alternately laminated has an undoped ZnSe layer 14 having a thickness of about 500 ° and an undoped GaAs layer having a thickness of about 500 °. 15 are alternately stacked.

Then, as shown in FIG. 3 and FIG.
When flowing from the layer to the GaAs layer, the potential energy is rapidly converted to kinetic energy and the carrier temperature rises sharply. At this time, severe ionization occurs. Since this effect is effective only for holes, the ratio of ionization rate can be increased and an avalanche photodiode with low noise can be obtained.

FIG. 5 is an explanatory diagram for explaining a schematic configuration of a semiconductor device using a compound semiconductor according to a third embodiment of the present invention, and FIG. 6 is an energy diagram of the semiconductor device of FIG. .

The semiconductor device according to the third embodiment has a structure as shown in FIG.
It has a structure in which a P-type semiconductor layer (R) is sandwiched between a stacked body (G) in which II-VI group compound semiconductor layers and III-V group compound semiconductor layers are alternately stacked and an N-type semiconductor layer (H). .

The stacked body (g) in which the II-VI group compound semiconductor layers and the III-V group compound semiconductor layers are alternately stacked includes an undoped ZnSe layer 16 having a thickness of about 100 ° and an N-type impurity having a thickness of about 100 °. It is composed of a laminate in which doped N-type GaAs layers 17 are alternately laminated, and constitutes an emitter.

The N-type semiconductor layer (H) is made of N-type GaAs and constitutes a collector.

The P-type semiconductor layer has a high concentration (1 × 10 ¹⁹ cm ⁻³ ).
Of P-type GaAs, and constitutes a base.

As shown in FIGS. 5 and 6, the valence band discontinuity between the emitter layer and the base layer is as large as 1.4 eV, and the base is 1 × 1
Even at a high concentration of 0 ¹⁹ cm ^-3 , hole injection from the base to the emitter is negligible. As a result, the current gain was greatly improved as compared with the conventional structure.

As mentioned above, although the present invention was explained concretely based on an example, the present invention is not limited to the above-mentioned example.
It goes without saying that various changes can be made without departing from the scope of the invention.

〔The invention's effect〕

As described above, according to the present invention, the central undoped II-VI compound semiconductor layer includes the undoped II-VI compound semiconductor layer and the III-V compound semiconductor layer doped with the N-type impurity. First stacked bodies alternately stacked;
Since the undoped II-VI group compound semiconductor layer and the III-V group compound semiconductor layer doped with a P-type impurity are sandwiched by the second stacked body which is alternately stacked, a high density , A low-resistance P-type semiconductor layer and an N-type semiconductor layer can be formed.
Since minority carriers can be efficiently injected into the II-VI compound semiconductor layer, a visible light emitting diode with high injection efficiency can be obtained.

Further, a stacked body in which a central undoped II-VI compound semiconductor layer and an undoped III-V compound semiconductor layer are alternately stacked is formed by a III-V compound semiconductor layer doped with a P-type impurity and an N-type compound semiconductor layer. Since it is sandwiched between the III-V compound semiconductor layer doped with impurities, when a large electric field is applied, the large valence band discontinuity of the II-VI compound semiconductor layer and the III-V compound semiconductor layer causes Since the ionization rate of holes is larger than that of electrons, a low-noise avalanche photodiode can be obtained.

Further, a III-V compound semiconductor layer doped with a P-type impurity at the center, a III-V compound semiconductor layer doped with an N-type impurity, an undoped II-VI compound semiconductor layer and an N-type impurity are doped. And the III-V compound semiconductor layer is sandwiched between the stacked layers alternately stacked, so that the large valence band discontinuity of the II-VI compound semiconductor layer and the III-V compound semiconductor layer causes From the III-V compound semiconductor layer doped with the central P-type impurity, II-VI
Holes can be prevented from being injected into a stacked body in which group III compound semiconductor layers and group III-V compound semiconductor layers are alternately stacked.
It is possible to obtain a hetero bipolar transistor having a high current amplification factor.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram for explaining a schematic configuration of a semiconductor device using a compound semiconductor according to a first embodiment of the present invention. FIGS. 2A and 2B are energy diagrams of the semiconductor device of FIG. FIG. 3 is an explanatory diagram for explaining a schematic configuration of a semiconductor device using a compound semiconductor according to a second embodiment of the present invention. FIG. 4 is an energy diagram of the semiconductor device of FIG. FIG. 3 is an explanatory view for explaining a schematic configuration of a semiconductor device using a compound semiconductor according to a third embodiment of the present invention. FIG. 6 is an energy diagram of the semiconductor device in FIG. 5, FIG. 7, FIG. FIG. 7, FIG. 7B, FIG. 8, FIG. 8A, FIG.
FIG. 9A is an explanatory diagram for describing a problem of a semiconductor device using a conventional compound semiconductor. In the figure, (A), (D), (R) ... P-type semiconductor layer,
(B), (e), (h) N-type semiconductor layer, (c)
II-VI group compound semiconductor layer, (f), (g) ... laminated layer, 11 ... undoped ZnSe layer, 12 ... Zn-doped P-type GaAs
Layer, 13 ... Se-doped n-GaAs layer, 14 ... Undoped ZnSe
Layer, 15 undoped GaAs layer, 16 undoped ZnSe
Layer 17, 17 N-type GaAs layer.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification number Agency reference number FI Technical indication location H01L 31/107

Claims (3)

(57) [Claims] 1. An undoped II-VI film having a thickness of 10 ° to 50 °.
A first stacked body in which a group III compound semiconductor layer and a group III-V compound semiconductor layer doped with an N-type impurity with a thickness of 10 to 50 degrees are alternately stacked; A second stacked body in which a group-VI compound semiconductor layer and a group III-V compound semiconductor layer doped with a P-type impurity having a thickness of 10 to 50 degrees are alternately stacked; Undope formed between the second laminate and the second laminate II
And a group VI compound semiconductor layer. 2. A group III-V compound semiconductor layer doped with a P-type impurity, a group III-V compound semiconductor layer doped with an N-type impurity, and a group III-V compound semiconductor doped with the P-type impurity.
Group V compound semiconductor layer and the N-type impurity-doped II
A stacked body formed between an IV group compound semiconductor layer and an undoped II-VI compound semiconductor layer having a predetermined thickness and an undoped III-V compound semiconductor layer having a predetermined thickness alternately stacked; A semiconductor device comprising: 3. An undoped II-VI compound semiconductor layer having a predetermined thickness and a III-V doped with an N-type impurity having a predetermined thickness.
A stacked body in which group III compound semiconductor layers are alternately stacked, a group III-V compound semiconductor layer doped with an N-type impurity, and a group III-V compound semiconductor layer doped with the stacked body and the N-type impurity Is doped with a P-type impurity formed between
A semiconductor device comprising a III-V compound semiconductor layer.