JP2653088B2 - Frequency multiplier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a frequency multiplier used as a local signal source of a transceiver in a microwave or quasi-millimeter wave band, for example, which has a small exchange loss over a wide frequency range and a D / U of an output signal. Input matching device for impedance matching between the multiplier and the signal source at the fundamental frequency, the multiplier having non-linear characteristics, and impedance matching between the multiplier and the load at the desired frequency. In the frequency multiplier having an output-side matching device, the desired-multiplied frequency component of the output of the output-side matching device is passed, and a frequency component other than the desired multiplied frequency is reflected. By moving the open end position and providing a band-pass filter that enables phase adjustment of the reflected component, the impedance change of the band-pass filter due to the phase adjustment Constructed as to be corrected by the output side matching device.

[Industrial applications]

The present invention relates to a frequency multiplier used as a local signal source in a transceiver in a microwave or quasi-millimeter wave band.

For example, as a means of obtaining a local signal source having a high frequency and high stability, there is a method of multiplying the frequency of a low-frequency oscillator output. In addition, a three-terminal element such as a field-effect transistor (hereinafter abbreviated as FET) for easily adjusting an input / output matching device is often used.

At this time, it is necessary for the frequency multiplier to have a small conversion loss over a wide frequency range and a large D / U of the output signal.

[Conventional technology]

 FIG. 3 is a diagram illustrating the operation of the FET frequency multiplier.

In the following, the operation of the frequency multiplier will be described with reference to the drawing, assuming that the multiplier order is 2, for example.

First, a signal having a frequency f ₁ (hereinafter abbreviated as f ₁ ) is applied to an FET 2 in which a bias voltage is set to 0 or pinch-off via an input-side matching device 1. The input matching device 1 is adjusted so that the loss is minimized.

Next, nonlinearity utilized to output f ₁ component of the FET2, (n is a positive integer) nf ₁ component or the like but can be obtained, the load and the FET2 by 2f ₁ using the output-side matching unit 3 with matching, bandpass type filter 4 of the center frequency 2f ₁ (hereinafter abbreviated as BPF) small conversion loss by the use of, D / U large 2f (level level / unnecessary signal of the desired signal) _One component is obtained.

FIG. 4 is a block diagram of a conventional example.
It is an example of a specific example of the reference numeral in the figure.

As shown in the figure, an input side matching unit 1 and an output side matching unit 3 are formed on a first alumina substrate 11 by microstrip lines, and an FET 2 is arranged between these matching units. The center frequency is 2f on the second alumina substrate 41.
_One BPF 4 is formed, and the output-side matching unit 3 and the BPF 4 are connected by a conductor to form an FET frequency multiplier.

When the signal f ₁ is inputted to the FET frequency multiplier, 2f ₁ ingredient.

[Problems to be solved by the invention]

In general, the frequency multiplier employing a FET such as illustrated in Figure 3 are reflected by the BPF 4, f ₁ component is returned to the FET, that is, it is characterized that the fundamental frequency component amplitude and phase greatly affect the exchange loss is there.

Therefore, the following is necessary to reduce the exchange loss. That is, by total reflection of the f ₁ component BPF 4, again FET, is doubled.

In this case, adjusting the phase θ of the reflected wave that has returned to the FET as 2f ₁ component is more.

However, although the term can be satisfied in the configuration of FIG. 4, the term cannot be sufficiently satisfied because the reflection phase is fixed.

Therefore, there is a problem that it is difficult to further reduce the exchange loss even if the matching devices 1 and 3 on the input and output sides are adjusted.

An object of the present invention is to reduce the exchange loss over a wide frequency range and increase the D / U of an output signal.

[Means for solving the problem]

 FIG. 1 is a block diagram showing the principle of the present invention.

In the drawing, reference numeral 1 denotes an input-side matching device for performing impedance matching between a multiplier and a signal source at a fundamental frequency, and 5 denotes a multiplier having nonlinear characteristics.

Reference numeral 3 denotes an output-side matching device for obtaining impedance matching between the multiplying element and the load at a desired multiplied frequency. This is a band-pass filter that reflects components but moves the open end position of the input-side line to adjust the phase of the reflected components. Then, the impedance change of the band-pass filter due to the phase adjustment is corrected by the output-side matching device.

[Action]

As described above, a part of the fundamental frequency component appearing on the output side of the multiplier 5 is reflected by the output-side matching unit 3, but most of the fundamental frequency component is reflected by the band-pass filter 6.

At this time, as described above, since the amplitude and phase of the fundamental frequency component returned to the multiplier have a great effect on the conversion loss, the phase length θ from the multiplier 5 to the bandpass filter 6 can be finely adjusted to some extent. It is necessary to do.

Here, there are two types of reflection, that is, reflection at an open point and reflection at a short point. In the former case, the reflection point can be easily moved, whereas in the latter case, the reflection point can be easily reflected. Point movement is difficult. Therefore, in the present invention, a band-pass filter 6 is used in which the reflection point of the fundamental frequency component is an open point, and the position of this point is adjusted, and the band by adjusting this position (that is, phase adjustment) is adjusted. By correcting the impedance change of the pass filter by the output-side matching device, the conversion loss can be reduced over a wider frequency range and the D / U of the output signal can be increased.

〔Example〕

 FIG. 2 shows a configuration diagram of an embodiment of the present invention.

The FET 51 is a component of the multiplier 5. The same reference numerals indicate the same objects throughout the drawings.

Below, f ₁ is the fundamental frequency, 2f ₁ is as desired multiplied frequency,
The operation and configuration of FIG. 2 will be described.

First, the input-side matching box 1, the output-side matching box 3, and the BPF 6 are formed by microstrip lines on the same substrate such as flow glass or alumina ceramic, and a FET 51 is provided between the input-side matching box 1 and the output-side matching box 3. Is arranged.

Here, BPF6 is, for example, 2f
_Since only _one component is extracted, the f ₁ component is totally reflected at the open point a of the line 61 and returns to the FET 51 through the output-side matching device 3. Therefore, the line 61, for example, shortened as an arrow, can be adjusted f ₁ component of the phase back to FET 51.

Although the impedance of BPF6 This adjustment is changed by the change take heart variable to match the length of the stub 31, 32 so as to 2f ₁ component at the output matching unit 3 is maximum, the change It has been confirmed that the change in the reflection phase due to this compensation and the change in the passing characteristic of the BPF 6 due to the movement of the point a are small enough to cause no practical problem. For example, a fundamental frequency of 13 GHz and a desired multiplication frequency of 26 GHz
In the case of 4, a conversion loss of about 1 to 2 dB can be obtained by moving the point a to the vicinity of the best point so that the output of 26 GHz becomes maximum. Further, a stub provided in the output-side matching device 3
By adjusting the length of 31, 32, the conversion loss can be improved by about 1d. That is, by adjusting the output-side matching device and the band-pass filter, the conversion loss is reduced to about 0 to 1 dB.

〔The invention's effect〕

As described in detail above, according to the present invention, there is an effect that conversion loss is small over a wide frequency range and D / U of an output signal can be increased.

[Brief description of the drawings]

 FIG. 1 is a block diagram showing the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, FIG. In the figure, 1 is an input-side matching device, 3 is an output-side matching device, 5 is a multiplier, and 6 is a band-pass filter.

Claims (1)

(57) [Claims] An input-side matching device (1) for impedance matching between a multiplier element (5) and a signal source at a fundamental frequency, the multiplier element (5) having nonlinear characteristics, and the multiplier element at a desired frequency. And a load matching device (3) for impedance matching between the load and the load, wherein the frequency of the desired multiplied frequency component of the output of the output matching device (3) is passed and the frequency other than the desired multiplied frequency is passed. A band-pass filter that reflects the component but moves the open end of the input line to adjust the phase of the reflected component (6)
Wherein the output-side matching device corrects the impedance change of the band-pass filter due to the phase adjustment.