JP2649529B2 - Semiconductor laser output control device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to an output control device when a semiconductor laser is used for writing data in a laser printer, a facsimile, a digital copying machine, or the like.

(Prior Art) In order to improve the accuracy of the semiconductor laser power, as shown in FIG. 6, a first output control circuit (counter 15, flip-flop F / F16, edge detection circuit 19) and a first D / A
In addition to the converter 18, a similar second output control circuit (counter 25, flip-flop F / F26, edge detection circuit 29) and second D / A converter 28 are added.

In brief, the power set signal (S ₁ ) is always connected to the flip-flop F / F16, so that the flip-flop F / F16 is set during power setting and the EN of the counter 15 (up / down counter) is set. H
Level and release the disabled state. In addition, the flip-flop F / F26 is reset by the ripple carry RC of the counter 25 (up / down counter) to disable the counter 25, and the flip-flop F / F16 is set to disable the counter 15. Since it is canceled, it can be said that the operation is the same as the normal power set.

FIG. 7 shows an example of the output state of the first and second D / A converters 18 and 28. First, in the first power set (PS ₁ ), the first D / A converter 18 gradually increases the output to an output (P ₀ ) serving as a criterion. This laser light of the semiconductor laser 10 of Figure 6 received in the photosensor 12, and a voltage converting the current in the amplifier 13 are compared by the comparator 14 and the voltage V _M with a reference voltage V _ref1. The output from the comparator 14 is used as a counter 1 of the first and second output control circuits.
5, 25, and count up or down according to the input from the comparator, and control the output of the D / A converters 18, 28.

That is, the output value is maintained by the counter 15 at the place where the output (P ₀ ) serving as the determination criterion is roughly determined, and then finely adjusted by the output of the second D / A converter 28,
Maintain the output value when it becomes the reference output. In this case, as shown in FIG. 7, the amount of change in the output of the second D / A converter 28 is smaller than the amount of change in the output of the first D / A converter 18.

In the second and subsequent power sets (PS ₂ ), the output value of the second D / A converter 28 is preset by the counter 25, and the first D / A converter 18 performs control from the point where the output is maintained. Will start. Then, when the reference output is obtained, the second D / A converter 28 is used in the same manner as the first power set (PS ₁ ).
Operates and adjusts to become the reference output.

As described above, in the second and subsequent power sets after the first power set, the operation of the second D / A converter 28 takes time (t ₁ ≒ t ₂ ) as shown in FIG. The optical output of the semiconductor laser 10 is often used before the setting is completed.

In addition, while monitoring the output of the semiconductor laser and performing adjustment of the circuit for applying feedback, the semiconductor laser is turned on (DC lighting). However, the fluctuation of the D / A conversion output at that time sometimes becomes large, which is not preferable. .

FIG. 8 shows an example in which the above-mentioned second D / A converter 28 becomes uncontrollable. That is, when the light amount of the semiconductor laser (LD) is controlled by the second output control circuit,
Since the range that can be controlled by the second output control circuit is small, if it exceeds that range, control becomes impossible. Then, the control temporarily shifts to the first output control circuit. Here, the second D / A
Although the description will be made assuming that the converter 28 controls with a 3-bit digital output (0 to 7), the same can be said for any number of bits. That is, the output is gradually lowered, and when a borrow (carry output) is generated from the counter 25 and the ripple carry RC is generated, the second D / A converter 2
The output value of 8 is preset (load value 7) and the first D / A
The converter 18 starts outputting from the position where the output value is maintained (count value 9). If it is determined that the output is the criterion output (P ₀ ), the output value of the first D / A converter 18 (count value 8)
Is maintained, and the second D / A converter 28 starts output control (count value 7 → 6 → 5 → 4 → 3 → 4...). That is, while the first D / A converter 18 is changing between the count values 9 and 8, there is no change in the output from the second D / A converter 28 and the first D / A conversion Power control based on the output from the unit 18 is performed.

(Problems to be Solved by the Invention) As described above, according to the conventional circuit in which the semiconductor laser is controlled by the first and second D / A converters based on the digital signal obtained in two stages, The output fluctuation at the time of DC lighting is large, and it takes time to set the power for the second and subsequent times, and it may not be possible to drive the semiconductor laser with an appropriate optical output.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned drawbacks of the conventional circuit and to obtain a stable semiconductor laser output with a small output fluctuation of the D / A converter.

To achieve the above object, the present invention provides a first output control circuit and a second output control circuit for digitally storing an operating current of a semiconductor laser, and digital values of both output control circuits. A first D / A converter and a second D / A converter for converting the analog value into an analog value, a circuit for calculating the analog value of the two D / A converters, and a load value switching circuit, The first output control circuit and the first D / A converter approach a desired optical output, and then the second output control circuit and the second D / A converter further increase the desired optical output. Once a desired light output is obtained, control is performed by the second output control circuit.
Is controlled by the output control circuit described above.

In the present invention, the first output control circuit exceeds the control range by the first power set and the second output control circuit,
It operates only when control becomes impossible, and in all other cases, the power control of the semiconductor laser is performed by the second output control circuit. When the output cannot be controlled by the second output control circuit and the first output control circuit operates, the operation is performed so as to minimize the operation. For example, when the output of the semiconductor laser is too large, the output is reduced. One stage operation is performed, and the second output control circuit is loaded by the first load value switching circuit. Also, when the output of the semiconductor laser is too small, one-stage operation is performed to increase the output,
The second load value is loaded to the second output control circuit by the load value switching circuit.

In this way, control is performed so that a desired light output can be obtained quickly, and a stable power set is executed.

(Embodiment) FIG. 1 is a circuit diagram showing an embodiment of the present invention.
The same numerals as those in the figures are the same. In the figure, reference numeral 21 denotes a load value switching circuit which inputs a load value corresponding to the comparison output of the comparator 14 to a counter 25 constituting a second output control circuit. Reference numeral 22 denotes a flip-flop F / F to which the reset signal RESET is input, which switches the power set signal (S ₁ ) to the flip-flop F / F 16 or 26. 23 and 24 are edge detection circuits for outputting detection signals to the counters 25 and 15.

First, the generation of the first reference signal will be described with reference to the operation timing chart of FIG.

The first reference signal is a signal necessary to roughly realize the light emission intensity required for optical writing scanning.

First, as shown in FIG. 5 (1) as a main routine, a clock pulse {FIG. 2 (1)} is input from the clock pulse generation circuit 17 to each counter 15, 25 of the first and second output control circuits. And the initial value is set. Further, a constant drive signal (not shown) is applied to an LD drive circuit 11 for driving the semiconductor laser 10. Therefore, laser light having a constant intensity is emitted from the semiconductor laser 10 forward and backward.

The laser beam emitted backward from the semiconductor laser 10 is received by the photo sensor 12. The photosensor 12 outputs a current proportional to the intensity of the received light.
It is converted into a voltage V _M by 13. The comparator 14 compares the voltage V _M with the reference voltage V _ref1 , and the comparison output voltage is the voltage V _M
H level or L depending on the magnitude of the reference voltage V _ref1 and
It becomes level and controls the count mode of counter 15 (up / down counter). Thereafter, a processing routine {FIG. 5 (2)} for generating the first reference signal is performed. For example, when V _M <V _ref1 , when the output intensity of the semiconductor laser 10 does not reach the criterion value (P ₀ ) (FIG. 3),
The output of the comparator 14 becomes H level, and the counter 15 enters a count mode in which it operates as an up counter, that is, an up mode. On the other hand, when V _M > V _ref1 , the count mode operates as a down counter, ie, the down mode.

The operation of the counter 15 is such that the reset input {FIG. 2 (2)} changes from H level to L level, and the signal path of the power set signal (S ₁ ) {FIG. / F16 side, counter 1 through this
The EN terminal 5 goes to the H level, and the operation starts ((a) in FIG. 2 (8)).

According to FIG. 2, since the output of the comparator 14 is at the H level {FIG. 2 (4)}, the counter 15 is in the up mode, and the output of the D / A converter 18 {FIG. 11)｝ is sequentially increased, and the output of the semiconductor laser 10 is increased by the LD drive circuit 11 via the adder 20. Further, the output voltage V _M which is monitored by the photosensor 12, the output is inverted from the comparator 14 by comparing the reference voltage V _ref1 (L level from H) Then, detected by the falling edge detection circuit 19, the detection signal { (B) in FIG. 2 (5) occurs. This detection signal is input to the R terminal of the flip-flop F / F16, and the EN of the counter 15 is
Stop the operation of the counter 15 by setting the terminal to L level.
(C) in FIG. These first actions are the first
And the digital value is held by the output control circuit, and is roughly set to the judgment reference value (P ₀ ). At the same time, the edge detection circuit 24 detects the falling edge (c) of the EN input signal {FIG. 2 (8)} of the counter 15 and generates the detection signal {(d)} of FIG. 2 (6). I do. This signal sets the EN terminal of the counter 25 to the H level through the flip-flop F / F26, and the counter 25 operates {(e) in FIG. 2 (9)}.
To start. That is, a second reference value signal generation processing routine {FIG. 5 (3)} is performed.

The above-described detection signal {(d) in FIG. 2 (6)} is set by setting the flip-flop F / F22 (S terminal) to generate the path of the power set signal (S ₁ ) {FIG. 2 (3)}. To the flip-flop F / F26 side. As described above, since the output of the comparator 14 is at the L level, the counter 25 is in the down mode, and the D / A converter 28
The output of the LD decreases through the adder 20 (FIG. 2 (11)).
By changing the drive signal of the drive circuit 11, the output of the semiconductor laser 10 is also reduced.

Next, when the output of the comparator 14 is inverted and changes from L to H level {(f) in FIG. 2 (4)}, the counter 25 also counts up, and the output of the D / A converter 28 is inverted. Then L
The semiconductor laser 10 is also inverted by the D drive circuit 11 to increase. When the output of the comparator 14 is again inverted (from H level to L level), the falling edge is detected by the edge detection circuit 19, and a detection signal {(g) in FIG. 2 (5)} is generated. This detection signal causes the EN terminal of the counter 25 to go low through the flip-flop F / F26 to stop the operation of the counter 25 ((h) in FIG. 2 (9)). These operations hold the digital value by the second output control circuit.

Next, when the next power set signal (S ₁ ) shown in FIG. 2 (3) is input, the subsequent operation is performed by the second output control circuit, and the path of the power set signal is set to the flip-flop F / Because it is on the F26 side, through this counter 25
Set EN terminal of H to H level and operate counter 25.
(I) in FIG. Here, since the output of the comparator 14 is at the L level, the output of the D / A converter 28 decreases {FIG. 2 (11)}, and the output of the LD drive circuit 11 decreases.
The laser light output of the semiconductor laser 10 decreases.

Next, when the output of the comparator 14 is inverted (from L to H level) {(j) in FIG. 2 (4)}, the counter 25 also counts up, and the output of the D / A converter 28 is inverted to increase. , LD
The output of the drive circuit 11 is inverted to increase. When the output of the comparator 14 is again inverted (from H level to L level), the falling edge is detected by the edge detection circuit 19, and a detection signal {(k) in FIG. 2 (5)} is generated. This signal is applied to the flip-flop F /
Set the EN terminal of counter 25 to L level through F26,
The operation of the counter 25 is stopped {(l) in FIG. 2 (9)}.

Next, a description will be given of the RC processing routine {FIG. 5 (4)}. If a carry occurs during the operation of the counter 25 in the up mode and the second output control circuit cannot be controlled, the counter 25 is controlled. When the RC terminal of the counter 15 becomes H level {(m) in FIG. 2 (10)}, the EN terminal of the counter 15 becomes H in accordance with the signal of the RC terminal (carry in FIG. 4: carry).
Level, and the counter 15 of the first output control circuit starts operation {(n) in FIG. 2 (8)}, and the output is increased stepwise (counter value 8 → 9 in FIG. 4). EN of counter 25 through flip-flop F / F26 (R terminal)
The terminal goes low, and the counter 25 stops operating ((o) in FIG. 2 (9)).

Alternatively, the EN terminal of the counter 15 becomes H level, and the rising edge {(n) in FIG. 2 (8)} is detected by the edge detecting circuit 23, and the detection signal {FIG. At (p), the counter 25 of the second output control circuit is loaded (load value 7 in FIG. 4... Second load value). At this time, since the count value of the counter 15 has increased by one stage, the output of the first D / A converter 18 increases {FIG. 2 (11)}.
However, the output from the LD drive circuit 11 also increases.

Output voltage V _M and reference voltage V monitored by photo sensor 12
By comparison with _ref1 , the output of the comparator 14 is inverted (from H to L).
Then, the edge detection circuit 19 detects {(q) in FIG. 2 (4)} and its falling edge, and a detection signal {FIG. 2 (5)}
Occurs, the RC terminal of the counter 25 goes low, the EN terminal of the counter 15 goes low accordingly, and the counter 15 stops operating.
(S) in FIG. H to L of EN terminal of counter 15
The edge detection circuit 24 detects the fall to the level, and generates a detection signal {(t) in FIG. 2 (6)}. This detection signal is output from the EN of counter 25 through flip-flop F / F26.
The terminal is set at the H level {(u) in FIG. 2 (9)}, and the counter 25 starts operating. Since the digital value of the counter 25 is the maximum value and the output of the comparator 14 is at L level, the output of the D / A converter 28 decreases and the output of the LD drive circuit 11 also decreases. Further, the signal of the RC terminal of the counter 25 (carry signal: carry in FIG. 4) becomes L level when the output of the comparator 14 becomes L level. Then, the counter 15 is subjected to the second load (load value 7) by this carry, and the output of the D / A converter 18 is increased.

Load value used here (second load value)
Is a load value selected by the load value switching circuit 21. This load value switching circuit 21 can output two load values (a first load value and a second load value). That is, when the output of the comparator 14 is at the L level, the first load value is output, and when the output of the comparator 14 is at the H level, the second load value is output. These load values are input to the counter 25, and are loaded into the counter 25 when the LD input of the counter 25 is at the H level.

The above operation has been described as an example. The output of the comparator 14 causes the H level to be in the down mode, the output of the D / A converters 18 and 28 increases, the output of the LD drive circuit 11 decreases, and the counter values of the counters 15 and 25 increase. Thus, an inverse configuration such as a reduction in the number of D / A converters may be adopted.

The first load value (carry-down) and the second load value (carry) by the load-value switching circuit 21 are stored in a counter 25.
Although the maximum value and the minimum value have been described, this value may be another value.

FIG. 3 shows the D / A converters 18, 28 described in FIGS. 1 and 2.
The first power set (PS ₁ ) is the same as the conventional power set, but the second and subsequent power sets (PS ₂ )
Then, while the output value of the first D / A converter 18 is maintained,
The second D / A converter 28 starts the control from the point where the output value is maintained, and the second D / A converter 28 determined to be the reference power (P ₀ ) maintains the output value.

FIG. 5 shows a flowchart of the present invention, and FIG.
Is a main flow, (2) is generation of a first reference value signal,
(3) shows the generation of the second reference value signal, and (4) shows the ripple carry RC handling routine.

In (1), the initial values of the reset counters 15, 25 of the flip-flop F / F22 are set first. Wait until the power set signal (S ₁ ) is input, and when it is input, the first or second reference value signal is generated by the output of the flip-flop F / F22. Since the signal is at the L level, the signal becomes the first reference value signal, then the second reference signal is generated, and the state returns to the state before the input of the power set signal. The generation of the first and second reference value signals is performed as a subroutine in FIG.
It is shown in (3).

The generation of the first reference value signal in FIG.
Releasing the disabled state of 15, compares the V _M and V _ref1, down or up the counter 15 accordingly. Thus, V _M also changes from the LD output, and the photosensor 12 to the LD driving circuit 11 from the D / A converter 18.
If exit this routine is V _M> V _ref1 is No, then the up-counting, V _M> V after the LD output is increased
_{When ref1} is Yes, the output of the comparator 14 is inverted and its edge is detected. When the loop is skipped, the counter 15 is returned to the disabled state, and the output of the flip-flop F / F22 is set to the H level.
Thus, there is no input processing operation from the main routine in this subroutine.

Next, in the generation of the second reference value signal, the disabled state of the counter 25 is first released as shown in FIG.
See the occurrence of ripple carry RC. The comparison of the V _M and V _ref1 unless RC is generated, the first reference value signal generator and a similar process operation is performed.

Here, the RC corresponding routine is as shown in FIG.
The counter 25 is returned to the disabled state, and the disabled state of the counter 15 is released. This allows the first reference value signal to change and the second reference value signal to be locked. RC occurrence counter 25
Is determined by the carry or borrow, and the counter 15 is counted up or down accordingly. The first or second load value (borrow, carry) is also loaded into the counter 25, respectively.

In this way, the counter 15 is returned to the disabled state again, the disabled state of the counter 25 is released, and the routine returns to the second reference value signal generation routine {(3)} in FIG. These can also be implemented by software.

(Effect of the Invention) As described above, according to the present invention, in the first and second output control circuits and the D / A converter, the second and subsequent power sets after completing the power set once are the second and subsequent power sets. The present invention (FIG. 3) has a shorter follow-up performance than the conventional one (FIG. 7) because the power control circuit and the second D / A converter perform this operation.

In addition, when DC lighting is performed in the adjustment step, the output of the A / D converter is smaller in the present invention (FIG. 4) since the second output control circuit performs only a small amount of control operation as compared with the conventional (FIG. 8). A stable semiconductor laser output with small fluctuations can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention, and FIG.
FIG. 3 is an operation timing chart of FIG. 3, FIG. 3 is an explanatory diagram of the first and second and subsequent power sets according to FIG. 1, and FIG.
State explanatory diagram of the first and second D / A converter outputs of the RC corresponding processing,
FIG. 5 is a flowchart of the present invention, FIG. 6 is an example of a conventional semiconductor laser output control circuit, FIG. 7 is an explanatory diagram of the first and second power sets in FIG. 6, and FIG.
FIG. 9 is an explanatory diagram of states of first and second D / A converter outputs in a corresponding process. 10: semiconductor laser, 11: LD drive circuit, 12: photosensor, 13: amplifier, 14: comparator, 15: first counter, 16: first flip-flop F / F, 17 …… Clock pulse generation circuit, 18 …… First D / A converter, 19…
... first edge detection circuit, 20 ... adder, 21 ... load value switching circuit, 22 ... flip-flop F / F, 23,24 ...
... Second edge detection circuit, 25 ... Second counter, 26
... Second flip-flop F / F, 28... Second D / A converter.

Claims (1)

(57) [Claims] A first output control circuit and a second output control circuit for digitally storing an operating current of a semiconductor laser, and a first D for converting digital values of both output control circuits into analog values. A / A converter and a second D / A converter, and a circuit for calculating analog values of both D / A converters,
A load value switching circuit, wherein the first output control circuit and the first D / A converter approach a desired optical output, and thereafter, the second output control circuit and the second D / A The converter further sets the desired light output, and once the desired light output is obtained, control is performed by the second output control circuit, and control is performed by the first output control circuit only when the control range is exceeded. And a semiconductor laser output control device.