JP2648842B2 - Active matrix display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix display device having a structure provided with switching elements corresponding to pixels, data bus lines for inputting data, and scan bus lines for line addresses.

[0002]

2. Description of the Related Art An active matrix display device is used as a thin display device for an information terminal together with a simple matrix display device, and a liquid crystal is used as a display medium.

In the active matrix type, since a large number of pixels can be driven independently of each other, even if the number of lines increases as the display capacity increases, the driving duty ratio may decrease as in the simple matrix type. Therefore, there is an advantage that problems such as a decrease in contrast and a decrease in viewing angle do not occur.

[0004] On the other hand, the active matrix type has problems such as a reduction in manufacturing yield and an increase in cost due to its complicated structure. The matrix method has been developed and has been effective.

[0005] FIG. 4 is a cross-sectional view of JP-A-61-235815 (UK).
This is an equivalent circuit for a panel similar to the panel of the conventional opposing matrix type active matrix display device disclosed in Cyril Hilms et al.). This panel is
Two bus lines, a scan bus line 1 and a reference bus line 2, are provided in parallel on one of the glass substrates facing each other, and a display electrode 4 and a TFT 3 for the liquid crystal cell 6 are formed. In this case, the TFT 3 has its control electrode 31 connected to the scan bus line 1, one controlled electrode 32 connected to the pixel electrode 4, and the other controlled electrode 33 connected to the reference bus line 2. On the other glass substrate, a data bus line 5 indicated by a dotted line is formed as a counter electrode of the liquid crystal cell 6.

As described above, the scan bus lines 1 and the data bus lines 5 arranged orthogonally are formed separately on one and the other of the glass substrates arranged opposite to each other, so that the bus lines cross each other on the same substrate. Since no portion is generated, the production yield can be improved.

[0007]

By the way, in the opposed matrix system, the liquid crystal cells 6 are connected at the same time through TFTs that are turned on during line-sequential writing operation. Due to the large capacitance value, there is a problem that the voltage of the data bus line 5, which is the counter electrode, is easily changed by a signal.

FIG. 5 conceptually shows this by an equivalent circuit. That is, during the line-sequential write operation, all the TFTs 3 connected to one reference bus line 2 are turned on, so that the reference bus line 2 and the data bus line 5 are connected to the liquid crystal having a relatively large capacitance value _CLC. The connection is established by the cell 6. Therefore, the reference bus line potential V _REF that needs to be maintained at a constant value is:
It fluctuates due to the fluctuation of the data voltage _VDATA as shown. This change in the voltage V _REF results in a change in the voltage written in the liquid crystal cell 6, which results in a horizontal stripe pattern on the display surface, which causes a significant reduction in display quality.

In FIG. 5, the data bus lines 5 are commonly connected to simplify the equivalent circuit. This common connection state corresponds to a case where the same data is written to all pixels. Further, a parasitic capacitance 8 excluding the liquid crystal cell capacitance is provided between the reference bus line 2 and the data bus line 5 corresponding to the pixel row on which the writing operation is not performed.
(C _P ) is interposed.

The present invention can reduce the distortion of the drive waveform due to the resistance of the bus line wiring, which is a problem in increasing the display capacity and increasing the area of the active matrix type display device of the opposed matrix type. It is an object to provide an active matrix display device.

[0011]

In order to solve the above problems, according to the first aspect of the present invention, a plurality of scan bus lines provided on one of the insulating substrates are adjacently arranged in parallel corresponding to the plurality of scan bus lines. A reference voltage bus line, a pixel electrode arranged in a matrix, a switching element connected to the bus line and the pixel electrode, and a data bus line provided on the other insulating substrate. In an active matrix display device including a pixel electrode and an electro-optical element electrically connected to a data bus line and controlled by the switching element, a pixel matrix is formed between reference bus lines corresponding to adjacent pixel rows. It is characterized by being electrically connected by at least one connection portion in the region.

Further, in the invention according to claim 2,
The number of connection points between the reference bus lines is n per one reference bus line, the connection resistance per connection point is rc, and the resistance at both ends of the reference bus line when there is no connection part When the value is rв, r _c <r _B / (n
+1).

Further, in the invention according to the third aspect, the position of the connection portion between the reference bus lines is made different for each row. The connection between the bus lines is performed using connection electrodes crossing the scan bus lines, and the connection electrodes at the crossing portions are formed on the substrate surface side of the scan bus line electrode layer.

[0014]

The current supply to the reference bus line is simultaneously performed from the other reference bus lines via the connection electrodes. As a result, the current flowing through the reference bus line corresponding to the pixel row on which the writing operation is performed is reduced, and the voltage drop at both ends is suppressed.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. First, the principle of the present invention will be described with reference to FIG. FIG. 5 shows an equivalent circuit for two rows as a pixel row, but FIG. 1 shows an equivalent circuit for three rows.

First, as shown in FIG. 1, adjacent reference bus lines 2, 2,... In a matrix pixel forming area are connected to each other by n connection portions 7 for one reference bus line. In this case, assuming that the connection electrode resistance per one portion of the connection portion 7 is r _C , the connection electrode resistance r _C is smaller than the reference bus line resistance {r _B / (n + 1)} divided into (n + 1). If the voltage is small, the supply of the current from the reference voltage source 9 is simultaneously performed from a path (see an arrow in the drawing) passing through another reference bus line and the connection electrode resistance. As a result, the current flowing in the reference bus line corresponding to the pixel row on which the writing operation is performed is reduced as compared with the case where there is no connection portion, thereby suppressing a voltage drop occurring across the reference bus line resistance. The fluctuation of the reference voltage V _REF will decrease as shown.

Next, an embodiment will be described. FIG. 2 is a diagram showing a part of the pixel matrix according to the first embodiment of the present invention. In this embodiment, the connection electrodes 10 are formed at the same positions on the respective reference bus lines 2 so that the connection electrodes 10 are connected in the vertical direction in the drawing. Also, connection electrode 1
Are arranged in gaps between the adjacent pixel electrodes 4, 4,.... This is to prevent the light transmission characteristics of the pixel portion from being affected and to prevent the occurrence of parasitic capacitance due to proximity or superposition between the connection electrode 10 and the pixel electrodes 4 and 4.

As shown in the figure, an intersection 12 is formed between the connection electrode 10 and the scan bus line 1. In this case, in order to prevent a step from occurring due to the lower electrode of the crossing portion 12, it is desirable to arrange the connection electrode 10 on the lower side using a thin electrode layer.

Next, a second embodiment of the present invention will be described with reference to FIG. In this embodiment, the connection electrodes 10
Are located in different directions. Thus, the installation positions are different for the following reasons. Connection electrode 1
In the pixel 4 adjacent to 0, the light transmission characteristics and the parasitic capacitance of the pixel portion may be affected by the connection electrode 10. In this case, the display characteristics are slightly different from those of the other pixels 4 not adjacent to the connection electrode 10. However, as described above, if the position of the connection electrode 10 is made different for each row, a difference in display characteristics occurs at a different position for each row, and the difference can be canceled out to make the display inconspicuous. .

The position of the connection electrode 7 may be changed for each pair of reference bus lines as in the present embodiment, may be changed regularly, or may be arranged periodically.

[0021]

According to the present invention, the voltage drop in the bus line can be suppressed, and the fluctuation of the voltage written in the liquid crystal cell can be greatly reduced, so that the display quality can be greatly improved. In addition, as a result of reducing the effective resistance value of the bus line, the bus line length can be increased without increasing the bus line width, and the display screen can be enlarged and the resolution can be improved. Become.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of a matrix for explaining the principle of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a first embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a second embodiment of the present invention.

FIG. 4 is an equivalent circuit diagram of a conventional opposed matrix type active matrix display device.

FIG. 5 is an equivalent circuit diagram of a matrix for explaining a disadvantage of the conventional opposed matrix system.

[Explanation of symbols]

 Reference Signs List 1 scan line 2 reference bus line 3 TFT (switching element) 4 pixel electrode 5 data bus line 6 liquid crystal cell (electro-optical element) 7 connection electrode (connection section)

Claims (4)

(57) [Claims] A plurality of scan bus lines provided on one insulating substrate, reference voltage bus lines provided so as to be adjacent to each other in parallel, and pixel electrodes arranged in a matrix, A switching element connected to the bus line and the pixel electrode; a data bus line provided on the other insulating substrate; and an electro-optical element electrically connected to the pixel electrode and the data bus line and controlled by the switching element. An active matrix display device comprising an element, wherein reference bus lines corresponding to adjacent pixel rows are electrically connected by at least one connection portion in a pixel matrix formation region. Matrix display device. 2. The number of connection portions between the reference bus lines is n per reference bus line, the connection resistance per connection portion is rc, and the reference bus when there is no connection portion. when the rв the resistance value across the line, the active matrix display device according to claim 1, characterized in that so as to satisfy _{r c <r B / (n} + 1). 3. The position of a connection between the reference bus lines is different for each row.
The active matrix type display device according to the above. 4. The connection between the reference bus lines is performed using connection electrodes crossing the scan bus lines, and the connection electrodes at the crossing portions are formed closer to the substrate surface than the scan bus line electrode layers. The active matrix display device according to claim 1.