JP2646571B2 - Video signal processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A Industrial Fields B Outline of the Invention C Prior Art D Problems to be Solved by the Invention E Means for Solving Problems (FIG. 1) F Function G Example G1 Configuration of Reproduction Device G2 Stereoscopic Image Operation at the time of reproduction H Effect of the invention A Field of industrial application The present invention relates to a method of displaying an image reproduced by, for example, a television receiver with a left eye and a right eye through different shutters such as liquid crystal. The present invention relates to a video signal processing device suitable for being applied to a stereoscopic video playback device of a binocular parallax time-division system for stereoscopic viewing.

B SUMMARY OF THE INVENTION The present invention relates to a video signal processing device suitable for application to, for example, a binocular parallax time-division stereoscopic video playback device, and a separation circuit for separating a video signal obtained at an input terminal into a luminance signal and a chroma signal. And a first storage unit in which the separated luminance signal is switched for each field and written alternately in a plurality of blocks, and a color demodulation for demodulating the separated chroma signal and outputting two color difference signals. A circuit, a second storage unit in which the two color difference signals subjected to color demodulation are switched for each field and written alternately in a plurality of blocks, and a read speed of the first and second storage units. And a read controller for controlling the color difference signals to be twice or more of the second storage means. The second storage means has the same capacity as the first storage means, and the two color difference signals are stored in the capacity of the second storage means. By the to be stored is compressed so that, in which as such stereoscopic video can be processed with a simple configuration by a small memory capacity.

C Prior Art Conventionally, a television receiver as shown in FIG. 3 has been proposed as a television receiver capable of stereoscopically viewing an image. This television receiver receives a stereoscopic video signal called a dual system, and shifts two cathode ray tubes of a left eye cathode ray tube (1) and a right eye cathode ray tube (2) by 90 °. And polarizing filters (3) and (4) are provided in front of the respective cathode ray tubes (1) and (2), and at positions where the video light from the respective cathode ray tubes (1) and (2) intersect. A half mirror (5) is provided. By doing so,
The video light from the two cathode ray tubes (1) and (2) overlaps, and the viewer (6) wears glasses (7) made of an orthogonal polarization filter, so that the left eye uses the left eye cathode ray tube (1). And the right eye can see the image light from the right eye cathode ray tube (2). Then, the respective cathode ray tubes (1) and (2) receive the left-eye image and the right-eye image of the stereoscopic image and output the image light, so that the viewer (6) receives the left-eye image and the right image. The video for the eyes can be viewed separately, and the video can be stereoscopically viewed.

As another stereoscopic method, there is a method called a binocular parallax time division method. In this method, only one cathode ray tube is used, and an image received by the cathode ray tube is alternately divided into a left-eye image and a right-eye image for each field. In this case, the viewer wears glasses including a liquid crystal shutter that alternately opens on the left eye side and the right eye side for each field. By doing so, different images can be alternately viewed by the left eye and the right eye, and a video can be stereoscopically viewed.

D Problems to be Solved by the Invention However, since the television receiver as shown in FIG. 3 uses two cathode ray tubes (1) and (2), the structure is complicated and the receiver becomes larger. In addition, there is a disadvantage that the light use efficiency is poor because the light passes through the polarizing filters (3) and (4) and the half mirror (5).

Further, in the case where the image for the left eye and the image for the right eye are alternately output from one cathode ray tube for each field, the configuration of the receiver is simplified, but the left eye and the eye are alternately output for each field. The flicker was conspicuous because the right eye was switched, and there was the inconvenience of being very tired when viewing for a long time.

In order to solve these problems, for example, a video signal having a field frequency of 60 Hz is converted to a double field frequency (120H).
It has been proposed to convert the video signal into a video signal of z) and to quickly switch between the left and right video to eliminate flicker. However, in order to convert the field frequency of the video signal from 60 Hz to 120 Hz, a large number of field memories for storing the video signal have to be used, and the configuration of the video signal conversion device is complicated.

The present invention has been made in view of the above circumstances, and has as its object to provide a video signal processing device capable of converting a video signal for stereoscopic viewing with a simple configuration.

E Means for Solving the Problems A video signal processing apparatus according to the present invention comprises, as shown in FIG. 1, for example, a separation circuit for separating a video signal obtained at an input terminal into a luminance signal and a chroma signal; A first storage unit in which a signal is switched for each field and written alternately in a plurality of blocks; a color demodulation circuit for demodulating a separated chroma signal and outputting two color difference signals; A second storage unit in which two color difference signals are switched for each field and written alternately in a plurality of blocks; a read controller for controlling the read speed of the first and second storage units to be at least twice the write speed; And the second storage means has the same capacity as the first storage means, and the two color difference signals are compressed and stored so as to fit in the capacity of the second storage means. Than it is.

F Function According to the video signal processing device of the present invention, the luminance signal and the color difference signal can be configured by using memories of the same capacity, and two video signals such as stereoscopic video can be processed with a simple configuration with a small memory capacity. .

G Embodiment Hereinafter, an embodiment of the video signal processing apparatus of the present invention will be described with reference to the first embodiment.
This will be described with reference to FIG. 2 and FIG.

FIG. 1 is a diagram showing a main part of the reproducing apparatus of the present embodiment.
In the figure, reference numeral (11) denotes a video signal input terminal, to which a stereoscopic video signal (field frequency 60 Hz) of a binocular parallax time division method or the like described later is supplied. The video signal obtained at the input terminal (11) is supplied to a comb filter (13) via a buffer circuit (12), and the comb filter (13) converts the video signal into a luminance signal Y and a chroma signal C. The luminance signal Y is supplied to an analog / digital converter (hereinafter, referred to as an A / D converter) (14), and is converted into a digital signal by the A / D converter (14). Then, the digital signal of the luminance signal Y is stored in a memory (3) for storing a luminance signal of a video signal for the right eye described later.
1) and (32) and the luminance signals of the left-eye video signal are supplied to memories (61) and (62). Each of the memories (31), (32), (61) and (62) is a set of right-eye memories (31) and (32) and left-eye memories (61) and (62). A memory block is formed, and has a capacity capable of storing a video signal for one field. In the case of this example, each of these field memories is composed of eight 256 Kbit memories.

Further, the separated chroma signal C is supplied to a decoder (16) via an amplifier (15), and the decoder (16) separates the chroma signal into a color difference signal RY and a color difference signal BY.
Then, the separated color difference signal RY is supplied to an A / D converter (19) via a low-pass filter (17), and the A / D converter (19) converts the color difference signal RY to be described later. The signal is compressed at a predetermined ratio and converted into a digital signal. Similarly, the A / D converter (2) converts the color difference signal BY through a low-pass filter (18).
0), and the A / D converter (20) compresses the color difference signal BY at a predetermined ratio to be described later and converts it into a digital signal.

Then, the color difference signal RY output by the A / D converter (19)
And the digital signal of the color difference signal BY output from the A / D converter (20) are supplied to one and the other fixed contacts of the switch circuit (21). The switching of the movable contacts of the switch circuit (21) is controlled by a memory controller (30), which will be described later, and the digital signal obtained on the movable contact side of the switch circuit (21) is converted to a right-eye image to be described later. The signals are supplied to memories (33) and (34) for storing the color difference signals of the signals and memories (63) and (64) for storing the color difference signals of the video signal for the left eye. Each of the memories (33), (34), (63), and (64) is a memory for the right eye (3
3), (34) and left eye memory (63), (64)
A set of memory blocks, each of which is capable of storing video signals for one field (each memory is a 256K bit memory x 8
), And the color difference signal RY has the above-described A / A so that the information amount of the memory (33), (34), (63), and (64) is 2/3 of the information amount. The data is compressed at the time of conversion by the D converter (19), and the color difference signals BY are stored in the respective memories (33) and (3).
A / D conversion (20) compresses the data at the time of conversion so that the information amount becomes 1/3 of the capacity of (4), (63) and (64). For this reason,
The color difference signal RY and the color difference BY have an information amount of 2: 1. Then, the memories (31), (32),
(33) and (34) are gate circuits (31a), (32a), (33a) and (34a) for supplying a write pulse signal, and gate circuits (31b), (32b) and (32b) for supplying a read timing signal. (33
b) and (34b) and a gate circuit (31
c), (32c), (33c), and (34c), and the memories (61) to (64) for the left eye also have similar gate circuits (not shown).

The video signal output from the buffer circuit (12) is supplied to a synchronization separation circuit (22), and the synchronization separation circuit (22) extracts a vertical synchronization signal and a horizontal synchronization signal from the video signal. Is supplied to the right eye memory controller (30). The horizontal synchronization signal output from the synchronization separation circuit (22) is supplied to a PLL circuit (23). The PLL circuit (23) generates a 14 MHz clock signal based on the horizontal synchronization signal. Is supplied to the right-eye memory controller (30), and the 14-MHz clock signal is converted into a 7-MHz clock signal by the 1/2 frequency divider (24), and then supplied to the right-eye memory controller (30).

The right-eye memory controller (30) creates a write pulse signal for each memory based on the above-mentioned clock signal and the like, and writes the write pulse signals for the memories (31) and (32) to the respective memories (31). , (32) gate circuit (31a),
(32a) and write pulse signals for the memories (33) and (34) to the gate circuits (33a) and (34a) of the memories (33) and (34), respectively. The right-eye memory controller (30) outputs a vertical read timing signal of each right-eye memory output to the phase shifter (41). This phase shifter (41) is connected to a variable resistor (41a),
The phase shift state changes depending on the adjustment state of the variable resistor (41a), and the output signal of the phase shifter (41) is supplied to the mixing circuit (42). The horizontal read timing signal of each right eye memory output by the memory controller (30) is supplied to the phase shifter (43). The phase shifter (43) is connected to a variable resistor (43a), and the phase shift state changes depending on the adjustment state of the variable resistor (43a), and the output signal of the phase shifter (43) is changed. Supply to the mixing circuit (42). The mixing circuit (42) mixes the vertical read timing signal output from the phase shifter (41) with the horizontal read timing signal output from the phase shifter (43), and mixes the mixed signal with each right eye memory ( 31) ~
Gate circuits for read timing of (34) (31b), (3
2b), (33b) and (34b). In this example, the vertical and horizontal read timing signals output from the memory controller (30) have a field frequency (12 Hz) that is twice the field frequency (60 Hz) of a normal video signal.
0 Hz) for reading the video signal stored in the memories (31) to (34). Also, by changing the phase shift state by the variable resistors (41a) and (43a) connected to the respective phase shifters (41) and (43), each of the right eye memories (31) to
The readout timing of the video signal stored in (34) can be shifted, and the display position on the screen can be slightly moved up and down and left and right.

The right-eye memory controller (30) is connected to the right-eye timing controller (44), and the right-eye memory (31)-
Switching between writing and reading of (34) is controlled. That is,
This timing controller (44)
(34) Gate circuits (31a), (31b), (31c), (32)
a), (32b)... (34c) to supply a write / read switching signal. Then, the respective gate circuits (31a),
(31b), (32a), (32b), (33a), (33b), (34
When a signal of a predetermined level predetermined for each of a) and (34b) is supplied, writing or reading is performed in synchronization with a write pulse or a read timing pulse supplied to each gate circuit. Here, the gate circuits (31a) and (32b)
Is a signal obtained by inverting a signal supplied to the gate circuits (31b) and (32a) by an inverter circuit (45), and a signal supplied to the gate circuits (33a) and (34b) is a gate circuit ( The signals supplied to (33b) and (34a) are inverted by an inverter circuit (46). For this reason, the memories (31) and (33) and the memories (32) and (34) do not perform the same operation.
During the write operation, the memory (32) performs the read operation. In addition, the gate circuits (31c), (32c), (33c), (3
4c) is supplied with an output pulse signal from the timing controller (44), and when the output pulse signal is in a predetermined state, it is written into the memory from the gate circuit corresponding to the read timing of the above read timing pulse and stored. The output video signal is output. The timing controller (44) includes a mode changeover switch (44).
a) is connected and this mode changeover switch (44a)
The switching is performed depending on whether the video signal obtained at the input terminal (11) is a binocular parallax time-division stereoscopic video signal or a dual stereoscopic video signal, and each memory (3
1) to (34) are performed appropriately for each method.

And a memory (31) for storing a luminance signal for the right eye,
Gate circuits (31c) and (32) for outputting the read signal of (32)
Connect the output side of c) to the luminance signal input terminal for the right eye of the encoder (54). Also, the output side of the readout signal output gate circuits (33c) and (34c) of the memories (33) and (34) for storing the color difference signals for the right eye is connected to the movable contact side of the switch circuit (51). The switch circuit (51) has one fixed contact connected to the right-eye color difference signal RY input terminal of the encoder (54) via the amplifier (52), and the other fixed contact of the switch circuit (51). The fixed contact is connected to the right-eye color difference signal BY input terminal of the encoder (54) via the amplifier (53). The switching of the movable contact of the switch circuit (51) is controlled by the memory controller (30) for the right eye.

Although not shown, the memories (61) to (64) for storing video signals for the left eye include a gate circuit for supplying a write pulse, a gate circuit for supplying a read timing signal, and a read signal similar to those for the right eye. An output gate circuit is provided, and the operation of each of the memories (61) to (64) is controlled by a memory controller and a timing controller (neither is shown) for the left eye. The luminance signals output from the output gate circuits of the memories (61) and (62) for storing the luminance signal for the left eye are supplied from the terminal (53a) to the luminance signal input terminal for the left eye of the encoder (54). The color difference signals RY and BY output from the output gate circuits of the memories (63) and (64) for storing the color difference signals for the left eye are transmitted from the terminals (53b) and (53c) to the encoder (54). ) Left-eye color difference signal R−
It is supplied to the Y and BY input terminals. However, no phase shifter is connected to the memory controller for the left eye, and the read timing is not adjusted and is constant.

In the encoder (54), the supplied right-eye and left-eye luminance signals Y and color difference signals RY and BY are supplied.
Are converted into composite video signals for the left and right eyes and output from the output terminal (55). The encoder (54) also converts each signal from a digital signal to an analog signal at the time of conversion. At the time of conversion from the digital signal to the analog signal, the color difference signal is expanded at a rate opposite to the compression performed by the A / D converters (19) and (20).
Then, the video signal obtained at the output terminal (55) is connected to a television receiver (not shown) for receiving a video signal having a field frequency of 120 Hz.

G2 Operation at the time of reproducing a stereoscopic video Next, an operation at the time of reproducing a stereoscopic video using the reproduction device of the present example will be described. First, when a stereoscopic video is reproduced by the reproducing apparatus, eyeglasses including a liquid crystal shutter in which a left eye and a right eye are alternately opened in synchronization with switching of an image receiving screen of this receiver for each field are prepared. The output terminal (55) of the reproducing apparatus of this example is connected to a video signal input terminal of a television receiver that receives a video signal having a field frequency of 120 Hz.

Then, an operation when a stereoscopic video signal of the binocular parallax time division method is supplied to the input terminal (11) will be described. In the case of this example, the binocular parallax time-division stereoscopic video signal obtained at the input terminal (11) has a field frequency of 60 Hz and is the same as a normal video signal, but as shown in FIG. Each of the video signals is a composite left-eye video signal VL and right-eye video signal VR. At this time, first, the mode selector switch (44) of the timing controller (44)
It is set that the video signal of the binocular parallax time division method is input by the operation of a). For example, it is assumed that the video signal of the n-th field is supplied to the input terminal (11). This n-field video signal is a left-eye video signal VL.
_1, the luminance signal YL ₁ with the comb filter of this left-eye image signal VL ₁ (13) (FIG. 2 B) and the chroma signal CL ₁ (FIG. 2 C)
Separating the bets, the memory for the left eye luminance signal YL ₁ as shown in FIG. 2 D under the control of the memory controller for the left eye (61)
To be written. Also, the n-field chroma signal CL
After separating the color difference signal R-Y / L ₁ and the color difference signal B-Y / L ₁ by the _first decoder (16), A / D converter (19) and (20)
Then, the respective color difference signals are compressed at a ratio of 2: 1. Then, the switch circuit (21) is switched in accordance with the compressed ratio in the control of the memory controller (30), the color difference signal R-Y / L ₁ and the B-Y / L to the movable contact of the switch circuit (21) ₁ and 2: 1 should be obtained. Then, under the control of the memory controller for the left eye, as shown in FIG.
A color difference signal RY / L obtained at a ratio of 2: 1 on the movable contact side.
Memory for left eye (63) with ₁ and BY / L ₁ at this ratio
To be written.

When the next right-eye image signal VR ₁ of n + 1 fields to the input terminal (11) is supplied, the comb filter (1
In 3), the luminance signal YR ₁ (FIG. 2B) and the chroma signal CR ₁ (2nd
C), and the right-eye memory controller (30) controls each gate circuit to generate a luminance signal as shown in FIG. 2F.
Write YR ₁ into the right eye memory (31). Moreover, after separation into color difference signals R-Y / R ₁ and the color difference signal B-Y / R ₁ by chroma signal CR ₁ of the n + 1 field decoder (16), A / D converter (19) and (20 ), The respective color difference signals are compressed at a ratio of 2: 1 and the right-eye memory controller (3
0) controls each gate circuit, as shown in FIG.
The color difference signal obtained on the movable contact side of the switch circuit (21) is written in the right eye memory (33) with this ratio.

Then, the next time the input terminal (11) to the n + 2 fields of the left-eye video signal VL ₂ is supplied, the comb filter (1
In 3), the luminance signal YL ₂ (FIG. 2B) and the chroma signal CL ₂ (2nd
Separated in FIG. C) and, under the control of the memory controller for the left eye, as shown in Fig. 2 E, to write the luminance signal YL ₂ to the memory (62) for the left eye. The color difference signals R-Y and chroma signal CL ₂ of the n + 2 fields by the decoder (16)
/ L ₂ and the color difference signal BY / L _2, and then the A / D converter (1
9) and (20), the color difference signal RY / L ₂ is controlled by the left-eye memory controller as shown in FIG.
And BY / L ₂ are written into the left eye memory (64).

Then, the next time the input terminal (11) to the n + 3 field right eye image signal VR ₂ of is supplied, the comb filter (1
In 3), the luminance signal YR ₂ (FIG. 2B) and the chroma signal CR ₂ (2nd
Separated in FIG. C) and, under the control of the memory controller for the right eye (30) as shown in Fig. 2 G, thereby written into the memory (32) for the right eye luminance signal YR _2. Moreover, after separation into color difference signals R-Y / R ₂ and the color difference signal B-Y / R ₂ with the chroma signal CR ₂ in the n + 3 field decoder (16), A / D converter (19) and (20 ), And the color difference signals RY / R ₂ and BY / R ₂ are written in the right eye memory (34) as shown in FIG. 2L under the control of the right eye memory controller (30). Let it go.

Then, when the video signals of the (n + 2) th field and the (n + 3) th field are obtained at the input terminal (11), they are stored in the left eye memory (61) in the first half of each field as shown in FIG. and supplies the read, the encoder (54) for the left eye luminance signal YL ₁ of n field is two consecutive field frequency 120 Hz. Then, in the latter half of each field, as shown in FIG. 2H, the right-eye luminance signal YR ₁ of the (n + 1) -th field stored in the right-eye memory (31) is successively repeated twice at a field frequency of 120 Hz. Read and supply to encoder (54).

Similarly, as shown in FIG. 2M, in the first half of each field when the video signals of the (n + 2) th field and the (n + 3) th field are obtained at the input terminal (11),
Color difference signal R-Y / L ₁ and field frequency B-Y / L ₁ for the left eye of n fields is stored in the memory (63) for the left eye
Reading is performed twice at 120 Hz and supplied to the encoder (54). Then, as shown in FIG. 2M, n + stored in the right eye memory (33)
One-field right-eye color difference signals RY / R ₁ and BY / R ₁
Is successively read at a field frequency of 120 Hz and supplied to the encoder (54).

Then, as shown in FIG. 2N, the encoder (54) supplies the luminance signal Y and the color difference signals RY, B-
Y is converted into a composite video signal V having a field frequency of 120 Hz and output. At this time, when converting the digitized signal supplied from each memory into an analog signal, the color difference signal compressed at the ratio of 2: 1 as described above is returned to the original information amount. Therefore, the right-eye image signal VR ₁ of the left-eye video signal VL ₁ and n + 1 fields of n fields delayed by two fields from being supplied to the input terminal (11) is alternately output twice in Firudo frequency 120Hz Terminal (55)
Output from

Then, when video signals of the next n + 4 and n + 5 fields are obtained at the input terminal (11), they are written and stored in each memory in the same manner as in the above-mentioned n and n + 1 fields, and are shown in FIG. 2H. as supplies respective fields early in the n + 2 Firudo having stored in the memory (62) for the left eye to the left eye luminance signal YL ₂ of the read twice in succession at field frequency 120 Hz, the encoder (54). In the latter half of each field, as shown in FIG. 2H, the right-eye luminance signal YR ₂ stored in the right-eye memory (32) is stored at a field frequency of 120 Hz.
Is read out twice in succession and supplied to the encoder (54).

Similarly, as shown in FIG. 2M, in the first half of each field when the video signals of the (n + 4) th field and the (n + 5) th field are obtained at the input terminal (11),
Reading two consecutive color difference signal R-Y / L ₂ and B-Y / L ₂ for the left eye of the n + 2 fields is stored in the memory (64) for the left eye field frequency 120 Hz, the encoder (54) Supply. Then, in the second half of the field of the respective, as shown in FIG. 2 M, the color difference signal R-Y / R ₂ and for the right eye of the n + 3 field is stored in the memory (34) for the right eye B-
Y / R ₂ is read twice consecutively at a field frequency of 120 Hz and supplied to the encoder (54).

Then, as shown in FIG. 2N, the encoder (54) supplies the luminance signal Y and the color difference signals RY, B-
Y is converted into a composite video signal V having a field frequency of 120 Hz and output. Also at this time, the color difference signal compressed when converted to an analog signal is returned to the original information amount, and n +
Twice two fields of the left-eye video signal VL ₂ and n + 3 Firudo a right-eye video signal VR ₂ at a field frequency 120Hz is output alternately. Then, after the video signal obtained at the input terminal (11) is written into each memory in the same manner,
Reading is alternately performed at a field frequency of 120 Hz as shown in FIG. 2N.

In this example, the video signal obtained at the output terminal (31) is supplied to a receiver for receiving a video signal having a field frequency of 120 Hz, and the image is received at a field frequency of 120 Hz. By using the glasses including the liquid crystal shutter as described above, the viewer alternates the left-eye and right-eye video signals VL ₁ , VL ₂ ,. The video signals VR ₁ , VR ₂ … can be viewed separately,
This video can be viewed stereoscopically. By stereoscopically viewing at a field frequency of 120 Hz in this manner, switching between left and right screens is faster than a field frequency of 60 Hz, switching between left and right screens does not flicker, flicker does not occur, and good stereoscopic viewing can be achieved. For this reason, compared to the case where the video signal having the field frequency of 60 Hz obtained at the input terminal (11) is received as it is and stereoscopically viewed, there is an advantage that the user does not get tired even when viewing for a long time. Further, according to the reproducing apparatus of the present example, the display position of the image for the right eye on the screen can be slightly moved by the variable resistors (41a) and (43a), so that the stereoscopic effect can be changed as desired. .

According to the reproducing apparatus of the present embodiment, when the video signal is stored in the memory, the luminance signal Y and the color difference signals RY, B
Since the signal is stored separately for -Y, the signal obtained at the output terminal (55) does not deteriorate, a good video signal is output, and a good stereoscopic image is reproduced. Further, since the color difference signals RY and BY are compressed so as to have a ratio of 2: 1 and stored in a set of field memories, a reproducing apparatus can be configured with a small memory capacity. For example, in the case where the reproducing apparatus as in this example is configured not to compress the color difference signal, 96 memories of 566 k bits are required, whereas in the case of the configuration of FIG. 2/3. Note that the color difference signal B
-Y has a large compression amount, but in the case of a normal video signal, the color difference signal BY has less color difference information in one field than other color difference signals, and there is almost no signal deterioration due to compression and storage. It should be noted that the present invention is not limited to the above-described embodiment, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

H Advantageous Effects of Invention According to the video signal processing apparatus of the present invention, there is an advantage that a video signal can be processed with a simple configuration using a small amount of memory and with which a good video can be reproduced without fatigue even in long-time viewing without flicker.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal processing apparatus according to the present invention, FIG. 2 is a diagram for explaining the example of FIG. 1, and FIG. 3 shows an example of a conventional stereoscopic television receiver. It is a block diagram. (30) is a memory controller for the right eye, (31), (32),
(33) and (34) are right eye memory, (61), (62),
(63) and (64) are left eye memories, respectively.

Claims (1)

(57) [Claims] A separation circuit for separating a video signal obtained at an input terminal into a luminance signal and a chroma signal; and a separation circuit in which the separated luminance signal is cut out for each field and written alternately in a plurality of blocks. 1 storage means, a color demodulation circuit that demodulates the separated chroma signal and outputs two color difference signals, and switches the two color-demodulated color difference signals for each field to form a plurality of blocks. A second storage unit that is written alternately; and a read controller that controls the reading speed of the first and second storage units to twice or more the writing speed, wherein the second storage unit is configured to store the second storage unit. Video signal processing having the same capacity as the first storage means, wherein the two color difference signals are compressed and stored so as to fit within the capacity of the second storage means. Location.