JP2642408B2 - Dividing circuit device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency dividing circuit device which divides an input frequency and outputs the divided frequency, and which can operate at high speed.

[Conventional technology]

FIG. 3 shows a configuration of a conventional very common frequency dividing circuit device. In the figure, reference numeral 1 denotes a voltage output circuit provided between a positive voltage power supply line 13 and a negative voltage power supply line 16 (an earth line in the example of FIG. 3). Reference numeral 7 in the voltage output circuit 1 denotes a resistor, 8 denotes a transistor whose base and collector are connected to each other.
Is a circuit which operates as a diode function, a constant current I ₁ flows through the voltage output circuit 1, also the point P constant voltage
Vp is output as a predetermined bias voltage.

Reference numerals 2 and 4 denote 1/2 frequency divider circuits constituted by flip-flops, which divide the signal input to the input terminal 6 by 1/2.

3 is a level shift circuit for adjusting the potential between the 1/2 frequency divider circuits 2 and 4, and 5 is a buffer circuit for stabilizing the output of the frequency divider circuit 4 and reducing the influence of the output on the input side. And the circuits 2 to 5 together constitute frequency dividing circuit means. Reference numerals 9, 10, 11, and 12 denote constant current circuits each including a transistor, and a constant current I ₁ flowing through the voltage output circuit 1.
, The constant currents of I ₂ , I ₃ , I ₄ , and I ₅ are passed.

Reference numeral 14 denotes a smoothing capacitor inserted between the power supply lines 13 and 16, reference numeral 15 denotes an output terminal of a frequency-divided frequency signal divided by the frequency dividing circuit means, and reference numeral 17 denotes a power switch for a power supply 18. Reference numeral 19 denotes an integrated circuit including the above circuits 1 to 5, 7 to 12.

In this case, each of the circuits 2, 3, 4, 5 provided for each of the constant current circuits 9, 10, 11, 12 is composed of an ECL (emitter coupled logic) circuit centered on a differential amplifier. This is a high-speed operation circuit.

FIG. 4 shows the 1/2 frequency divider 2, the level shifter 3,
This shows a specific circuit when the constant current circuits 9 and 10 are configured by the ECL circuit. In the figure, reference numerals 21 and 22 denote input terminals and reference numerals 23 and 24 denote output terminals. The constant current circuit 10 in FIG. 3 is a constant current circuit including only a level shift circuit. However, in FIG. 4, the current of the flip-flop circuit of the level shift circuit 3 and the 1/2 frequency dividing circuit 2 is shared. Constant current circuit.

 Next, the operation will be described.

In FIG. 3, the relationship between the output voltage of the voltage output circuit 1 and the current can be expressed by the following approximate expression.

Vp + IR ₇ = V ₁₃ (2) I ₀ : Saturation current of transistor 8 K: Boltzmann constant T: Absolute temperature q: Electric charge Vp: Voltage between base and emitter of transistor 8 I: Voltage between base and emitter of transistor 8 Emitter current when Vp is applied R ₇ : Resistance value of resistor 7 V ₁₃ : Voltage between both terminals of resistor 7 and transistor 8 when resistor 7 and transistor 8 are connected in series and current I flows (1) The voltage Vp at the point P is determined from the equation (2). Now, if the characteristics of the constant current circuits (transistors) 9 to 12 are the same as those of the transistor 8, the point P indicates the constant current circuits (transistors).
By connecting the bases 9 to 12, each transistor 8 to
The voltage Vp is applied to the base 12. Therefore, a current equal to the calculated value of the equation (1) is applied to the constant current circuit (transistor) 9.
Flows to ~ 12. When N transistors 8 are arranged in parallel instead of the constant current circuits (transistors) 9 to 12, N times the current NI flows.

In FIG. 4, the frequency f input to the input terminals 21 and 22 is shown.
₁ signals are 1/2-divided by the frequency f from the output terminal 23
It is output as signal ₂ . Level shift circuit 3
Shifts the voltage between both terminals of the diode of the circuit 3 by the action of the constant current circuit 10.

As described above, each of the circuits 2 to 5 shown in FIG. 3 is a circuit centered on the ECL which functions by fixing the voltage at the point P by the transistor 8 and flowing a constant current to the constant current circuits 9 to 12. It is.

In the circuit shown in FIG. 3, since a constant voltage is supplied from the transistor 8 to the constant current circuits 9 to 12, when the operation of the circuit shown in FIG. 3 is controlled, the power switch 17 of the circuit must be turned on / off. Thus, the supply of voltage to the load circuit of the switch 17 is controlled, and the operation and stop of the function are performed.

[Problems to be solved by the invention]

Since the conventional frequency dividing circuit device is configured as described above, the operation stability of the integrated circuit 19 is improved and the power switch
To suppress power fluctuations caused by turning on / off 17, a large-capacity capacitor is placed between the power switch 17 and the integrated circuit 19.
14 are installed. Therefore, for example, the power switch 17
Even if the switch is turned off, the electric charge accumulated in the capacitor 14 flows into the integrated circuit 19, so that it takes a time on the order of milliseconds (ms) until the function of the integrated circuit 19 stops. It is built into the uniform mobile radio. Sufficient control for high-speed operation such as high-speed frequency switching of a synthesizer circuit that performs frequency control cannot be performed. In addition, there is a problem in that turning on / off the power switch 17 wastes energy of the capacitor 14 in the power supply.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to provide a frequency dividing circuit device capable of easily performing control for executing a high-speed operation.

[Means for solving the problem]

A frequency dividing circuit device according to the present invention includes a voltage output circuit for extracting a predetermined bias voltage from a power supply, a plurality of constant current circuits for supplying a constant current according to the predetermined bias voltage, and frequency division as a load of the constant current circuit. A frequency dividing circuit device comprising circuit means and external control means for externally controlling the operation of the constant current circuit can operate at high speed.

[Action]

The frequency dividing circuit device according to the present invention turns on / off a constant current circuit in response to an external control signal from a control terminal, and increases the rising and falling operation speeds of the frequency dividing circuit formed on the constant current circuit. I have. For example, if the frequency division number of the frequency divider on the constant current circuit is N, after the control terminal 20 operates,
At least the frequency-divided signal is the N-th pulse, and the correct post-frequency-divided signal is output from the output terminal 15 to be executed at high speed. Further, a voltage is continuously applied to the power supply terminal, and a stable circuit operation of the frequency dividing circuit is executed.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a circuit diagram of a frequency dividing circuit device of this embodiment. still,
In the figure, the same or corresponding parts as in the conventional example of FIG. 3 are denoted by the same reference numerals, and the description thereof will be omitted.

In Figure 1, 20 denotes a control terminal connected to the base of each transistor in the constant current circuit 9-12, is entered an external control signal, the constant current I ₂ ~ flowing through the constant current circuit 9-12 I ₅ is to be turned on / off. Therefore, the control terminal 20 functions as one of the external control means.

 Next, the operation will be described.

As described in the prior art shown in FIGS. 3 and 4, if the standard of the transistor 8 functioning as a diode and the transistor of the constant current circuit 9 are the same, the current I ₁ is stored in the voltage output circuit _1. When flows, the voltage Vp generated in the point P by the current I ₁ flows. The addition of base, for example, the voltage Vp of the transistor of the constant current circuit 9, the emitter current of the current I ₁ equal to current I ₂ of the transistor flows.

As is apparent from the equation (1), the current flowing through the constant current circuits 9 to 12 can be varied by varying the voltage Vp.

In this embodiment, the voltage Vp in the equation (1) is
When it is desired to stop the outputs of the frequency dividing circuit means 2 to 5 by setting the control terminal 20 to the ground voltage, each current I of the constant current circuits 9 to 12 is controlled. ₂ ~I ₅ becomes zero, the operation of該分divider means 2-5 is stopped. When the control terminal 20 is opened, the voltage Vp is supplied from the voltage output circuit 1 to the control terminal 20, and the frequency dividing circuit means 2 to 5 perform a frequency dividing operation. As described above, by externally controlling the potential of the control terminal 20, the frequency dividing circuit means 2 to 5 can be operated or stopped.

Next, another embodiment will be described with reference to FIG. In this other embodiment, the base or collector voltage of the differential amplifier configured as a load of the constant current circuit is set to the "H" level by the potential of the control terminal 20 at the same time as stopping the current of the constant current circuits 9 to 12. Alternatively, the operation of the frequency dividing circuit means 2 to 5 is stopped by setting the level to "L" level, so that a further effect can be obtained.

In FIG. 2, reference numerals 25 and 26 in the buffer circuit 5 denote transistors constituting a differential amplifier, reference numerals 32 and 33 denote resistors, and reference numerals 27 to 3
1, 38 and 39 are transistors, and 34 to 37 and 40 are resistors. still,
The circuit including the transistors 27 to 31 and the resistors 34 to 37 is a TTL or CMO for making the differential amplified output (double-ended output) which is the output of the buffer circuit 5 into an “H” or “L” signal.
It constitutes an S-level conversion circuit. The transistors 38 and 39 are circuits for fixing the output voltage of the output terminal 15 when the voltage of the control terminal 20 is at "L" level and minimizing the current consumption of the subsequent circuit.

The conversion circuit and the transistors 38 and 39 constitute output signal fixing means.

With the above configuration, the operation in the other embodiment of FIG. 2 is as follows. That is, in the normal operation, the current I ₁ flows through the voltage output circuit 1 to the control terminal 20, and the voltage V ₂₀ is applied to the control terminal 20, whereby the transistor 3
The current I ₆ flows through 8. In this case, two voltage points on the collector of the transistor 38 when the voltage of the power source 18 and V _18, is as follows.

V = V ₁₈ −R ₄₀ × I ₆ (3) Then, in this case, the voltage V becomes equal to or less than the cut-off voltage of the transistor 39, and the transistor 39 is cut off.
Therefore, the voltages at points A and C become voltages determined only by the buffer circuit 5, and the frequency dividing circuit means 2 to 5 execute the frequency dividing operation.

On the other hand, the control terminal 20 is set to “L” (for example,
To the negative voltage power supply line 16) and the constant current circuit 9
12, the current I ₂ ~I ₆ does not flow to the transistor 38, (3) a voltage V of Ten'ni approaches V ₁₈ from the equation, it is higher than the cut-off voltage of the transistor 39. As a result, the transistor 39 is turned on, all the current flowing through the resistor 32 flows through the transistor 39, the voltage at point A decreases due to the voltage drop by the resistor 32, the transistors 29 and 31 are cut off, and the output voltage at the output terminal 15 becomes “H”. Fixed to "

In the embodiment shown in FIG. 2, an NPN transistor is used as a transistor. However, a similar effect can be obtained by using a MOS transistor, a field effect transistor, a PNP transistor, or a hybrid circuit of these transistors. Obtainable.

〔The invention's effect〕

As described above, according to the present invention, the frequency divider circuit device
A frequency dividing circuit means including an ECL circuit around a differential amplifier circuit is provided as a load of the constant current circuit, and an external control signal is applied via a control terminal to control a current flowing through the constant current circuit. As a result, a voltage is continuously applied to the power supply terminals, and stable circuit operation can be performed. In addition, by turning on / off the current of the constant current circuit, the operation / stop of the frequency dividing circuit can be performed in a short time. Can be performed, and the frequency dividing circuit can be operated at high speed. Further, the circuit formed on the constant current circuit has an effect that when the frequency dividing circuit is stopped, current does not flow through the frequency dividing circuit and low power consumption can be achieved.

Furthermore, since the output signal fixing means fixes the output signal of the frequency dividing circuit means to a predetermined value when the external control means controls the constant current circuit to be turned off, the current consumption of the subsequent circuit can be minimized. effective.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a frequency dividing circuit device according to one embodiment of the present invention,
FIG. 2 is a circuit diagram of a frequency dividing circuit device according to another embodiment of the present invention, FIG. 3 is a circuit diagram of a conventional frequency dividing circuit device, and FIG. 4 is a flip-flop circuit using ECL in the conventional frequency dividing circuit device. FIG. 1 is a voltage output circuit, 2 to 5 are frequency dividing circuit means, 9 to 12 are constant current circuits (transistors), 18 is a power supply, and 20 is a control terminal (external control means). In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

(57) [Claims] A voltage output circuit for extracting a predetermined bias voltage from a power supply; a frequency divider circuit comprising a frequency divider circuit, a level shift circuit, and a buffer circuit, for dividing an input signal;
A plurality of constant current circuits for supplying a constant current to each of the frequency dividing circuit, the level shift circuit, and the buffer circuit in accordance with the predetermined bias voltage; external control means for controlling on / off of the plurality of constant current circuits; An output signal fixing means for fixing an output signal of the frequency dividing circuit means to a predetermined value when the external control means turns off the plurality of constant current circuits.