JP2636861B2 - Analog / digital converter - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to an analog / digital converter, and more particularly, to an analog / digital converter that can be set to have non-linear conversion characteristics.

[Related Art] For example, when reading image information and displaying the result, a CCD image sensor is often used as an image input device, and a CRT (CRT) display device is often used as an image display device. By the way, although the imaging characteristics of the CCD image sensor are linear, the relationship between the input signal level and the luminance of the CRT display device has an exponential function. Therefore, in order to associate the density of the input image with the brightness of the displayed image, the CRT
In order to cancel the influence of the exponential function characteristic of the display device, it is necessary to provide a correction circuit having a logarithmic function characteristic which is an inverse function of the exponential function between the image sensor CRT display device. This type of correction circuit is generally called a γ correction circuit.

2. Description of the Related Art Conventionally, in a digital image processing circuit, an input level is determined using a memory table such as a ROM in which information of an output level to be converted is previously written to all addresses of a memory in which one address is assigned to each input level. A gamma correction method for performing a non-linear conversion between an output level and an output level is generally used.

However, this type of method has a disadvantage that the quantization error increases because the conversion characteristic is curved. For example, in the case of gamma correction of 8-bit image information, as is apparent from the conversion characteristics shown in FIG. 4, the step interval of the output level is large in the region of small input level, and the input level is large in the region of large output level. Since the interval is large, all of the 256 gradations are not effectively used. Actually, when this kind of conversion is performed, when the number of input gradations is 256, the number of output gradations is reduced to about 140, and the quantization error is considerably increased.

Further, other correction methods are disclosed in, for example, JP-A-62-183678 and JP-A-62-183679. In these, an A / D converter for converting an analog signal into a digital signal has a correction function. That is, by connecting an external resistor in parallel to a part of the ladder resistor inside the A / D converter, the A / D conversion characteristic is set to a non-linear characteristic approximated by a broken line, thereby performing γ correction. is there.

I explain it a little more clearly. The internal structure of the 8-bit A / D conversion is as shown in FIG. 5a. That is, as the terminals, the analog input terminal Vin and the digital output terminals (B1 to B1
8), Clock input pin (CL
K), chip enable terminal, reference voltage terminal (REF +, REF
−, R / 4, R / 2, 3R / 4).

Inside, there are provided 256 comparators, a latch for holding output information of the comparator, an encoder for converting the output of the latch into an 8-bit binary code, and a flip-flop. An analog input voltage is commonly applied to one input terminal of each of the comparators. The other input terminals of the comparator are the reference voltage terminals REF + and R
256 reference voltages equally divided by 256 ladder resistors connected to the EF- are applied. The reference voltage terminals R / 4, R / 2, and 3R / 4 are connected to positions that divide the 256 ladder resistors connected between the terminals REF + and REF− into four equal parts.

The input / output characteristics of the A / D converter are usually linear, but by connecting an external resistor to the terminals R / 4, R / 2, and 3R / 4, the characteristics can be changed to a non-linear characteristic approximated to a broken line. For example, as shown in FIG. 5b, if an external resistor having the same resistance value as the combined resistance value of the ladder resistance in that portion is connected between the terminal REF− and the terminal R / 2, the terminal R / 2 is connected to terminals REF + and REF−
And 1/4 potential between them. Accordingly, for the full scale of the A / D conversion, output values 0 to 127 are assigned to 1/4 of the lower level, and output values 128 to 255 are assigned to 3/4.

In other words, the input / output characteristic becomes a broken line as shown in FIG. 5c, and the inclination of the characteristic changes at a level of 1/4 of the full scale. By using other terminals, further broken lines can be obtained, and characteristics similar to the required correction characteristics can be realized. However, this type of correction is only an approximation and high-precision γ correction cannot be expected.

[Object of the Invention] The present invention relates to an analog / digital converter having a highly accurate nonlinear input / output characteristic and a relatively small quantization error which can be used for γ correction and the like.
A first object of the present invention is to provide a digital converter, and an analog / digital converter in which characteristic setting change to a target curve is easy.
A second object is to provide a digital conversion device.

[Configuration of the invention]

(1) The analog / digital converter of the present invention has a plurality of analog comparators, applies an analog input voltage to one input terminal of each analog comparator, and applies a different reference voltage to the other input terminal. In an analog-to-digital converter that applies and outputs a plurality of comparison results output from an analog comparator into a plurality of bits of a signal, the level changes according to an elapsed time (t) from the application of a predetermined voltage (Vref). Voltage generating means (Rcc) for generating an analog voltage (V) and holding the analog voltage addressed to each of the analog comparators, and applying the held analog voltage to the analog comparator; , A reset voltage (earth potential) is applied thereto, and an analog voltage held by the reset voltage (earth potential) is initialized to a base value (earth potential). Switch means for holding the analog voltage of the analog comparator each destined giving pressure (Vref) (AS1, AS
2); and threshold data specifying each reference voltage to be given to each analog comparator is converted into each time representing an elapsed time to become each reference voltage according to the elapsed time versus analog voltage characteristics of the voltage generating means. The data is converted to data and the switch means (AS
After applying a reset voltage (earth potential) to the voltage generating means (Rcc) through the first voltage (Vref)
And a reference voltage setting means (CPU) for holding an analog voltage to each analog comparator after a time represented by each time data.

In addition, in order to facilitate understanding, reference numerals and the like of corresponding elements of the embodiment shown in the drawings and described later are added for reference in parentheses.

With this configuration, the reference voltage of each analog comparator can be arbitrarily adjusted by individually changing or adjusting the threshold data specifying each reference voltage to be applied to each analog comparator. If these reference voltages are set in accordance with a predetermined nonlinear curve, an accurate correction curve that is not a broken line approximation can be obtained. In this case, the quantization error does not increase due to the change in the characteristics. For example, in the case of 8-bit A / D conversion, the number of possible gradations of the output data is 26.

For example, when changing or adjusting the reference voltage by including a variable resistor in each of the ladder resistors,
An 8-bit A / D converter requires 256 variable resistors, and in order to adjust the characteristics, it is necessary to adjust all 256 variable resistors, which requires enormous effort and time. ,
In the present invention, the reference voltage of each analog comparator is specified by threshold data given to the reference voltage setting means (CPU), and the reference voltage is automatically set, so that the operator does not need to adjust the variable resistor. It is.

[Embodiment of the invention]

(2) The voltage generating means (Rcc) is based on a plurality of reset voltages (earth potentials) each interposed between the switch means (AS1, AS2) and each of the analog comparators (CMP). This is a capacitor charge / discharge type time constant circuit including a capacitor that is initialized to (ground potential) and changes in potential with the passage of time when a predetermined voltage (Vref) is applied (FIG. 1).

According to this, when a reset voltage (earth potential) is applied to each time constant circuit to initialize it to a base value (earth potential) and then a predetermined voltage (Vref) is applied, each time constant circuit becomes, for example, an exponent. Generate an analog voltage for the function curve. When the predetermined voltage application terminal of each time constant circuit is opened when the elapsed time reaches each reference voltage, the analog voltage of each time constant circuit remains at each reference voltage. That is, each time constant circuit is in a state of holding the reference voltage.

(3) The voltage generating means (Rcc) includes a capacitor which is initialized to a base value (earth potential) by a reset voltage (earth potential) and changes in potential with the passage of time after a predetermined voltage (Vref) is applied. A capacitor charge / discharge type time constant circuit, each of which samples and holds the voltage of the capacitor, and compares the held voltage with an analog comparator (CM
P), and a plurality of sample-and-hold means for giving a reference voltage to each of P.

According to this, a reset voltage (earth potential) is applied to the time constant circuit to initialize it to a base value (earth potential), and then a predetermined voltage (Vref) is applied. Generates analog voltage. By holding the analog voltage in each sample and hold unit when the elapsed time becomes the reference voltage, each hold voltage of each sample and hold unit becomes each reference voltage. That is, the reference voltage is set in the sample and hold means.

Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the drawings.

[Embodiment] FIG. 1 shows a configuration of an A / D converter of a type for carrying out the present invention. Referring to FIG. 1, this A / D converter includes an analog switch unit AS1, AS2, an integrating circuit unit RCC, a comparator unit CMP, a latch LT, and an encoder E.
An NC, a flip-flop FF, a three-state buffer, and a microcomputer CPU are provided, and an 8-bit digital output is obtained.

In FIG. 1, a latch LT, an encoder ENC, a flip-flop FF, and a three-state buffer have a configuration similar to that of a conventional A / D converter and operate similarly.

In order to obtain an 8-bit digital output, the comparator unit CMP has 256 analog comparators. One input terminal of the analog comparator is commonly connected to an analog signal input terminal Ain of the A / D converter. Different reference voltages are applied to the other input terminals of the analog comparator.

The reference voltage is output by the integrating circuit unit RCC.
The integrating circuit unit RCC has 256 independent RC integrating circuits each including one resistor and one capacitor, and the output terminal of the stirring RC integrating circuit is connected to the stirring analog comparator of the comparator unit CMP. Connected to input terminal.

One analog switch unit AS1 has two analog switches, and the other analog switch unit AS2 has 256 analog switches. One end (input side) of the 256 analog switches of the analog switch unit AS2 is commonly connected to the output terminal of the analog switch unit AS1, and the other end (output side) of each analog switch of the AS2 is an integration circuit. Connected to each input terminal of unit RCC. ON / OFF of each analog switch of the analog switch unit AS2 is controlled by the microcomputer CPU. The analog switch unit AS1 responds to a control signal (binary signal) from the microcomputer CPU.
The level applied to the input terminal of AS2 is set to a predetermined reference potential Vre
Set to either f or earth potential.

Next, a description will be given of a basic principle in a case where processing such as γ correction is performed in the A / D converter. In order to perform γ correction, for example, as shown in FIG. 4, the relationship between input and output may be made nonlinear. However, when a digital signal is processed and γ correction is performed, an increase in quantization error is inevitable. Therefore, in this embodiment, by adjusting the reference voltage (that is, the threshold level) of each of the 256 analog comparators, a non-linear characteristic can be obtained when an analog signal is converted into a digital signal. It is configured in. Therefore, the quantization error of the A / D converter including the γ correction processing is the same as that of a normal A / D converter, and is not particularly deteriorated by the γ correction.

The reference voltage applied to each analog comparator is automatically set by the microcomputer CPU. The integration circuit unit RCC has a function of changing the reference voltage and holding the set reference voltage. That is, when a DC voltage is applied to each integrating circuit, a voltage that changes with time and changes exponentially is obtained at its output terminal.

In other words, while the capacitors of each integrating circuit are completely discharged, the analog switch units AS1 and AS2
When the constant voltage Vref is applied through the following equation, the output voltage V of the integration circuit is expressed by the following equation (1), where the capacitance C of the capacitor and the resistance value are R.

That is, the voltage V output from the integration circuit increases with time as shown in FIG. However, the unit
When the analog switch of AS2 is turned off, the input impedance of the analog comparator connected to the output terminal of the integration circuit is very large, so that the charge stored in the capacitor of the integration circuit is hardly discharged. Therefore, the reference voltage applied to the analog comparator is held at the voltage output by the integration circuit when the analog switch of the unit AS2 is turned off.

Therefore, as shown in FIG. 2, each analog switch SWa, SWb, SWc, SWd, SWe,... In the unit AS2 is turned on for a time Ta, Tb, Tc, Td, Te,. And constant voltage V
When ref is applied to the integrating circuit, the output of the integrating circuit to which each analog switch is connected is Va, Vb, Vc, Vd, V
The different voltages e,... are held. Therefore, the reference voltage of each analog comparator can be individually set by controlling the time during which the analog switch is turned on.

This time is controlled by the microcomputer CPU.
Threshold data for γ correction is externally applied to the microcomputer CPU. That is, 256 threshold values that determine each of the 256 gradation levels are applied to the microcomputer CPU as digital data. These threshold data DV0 to VD255 are stored in a threshold table M1 shown in FIG. 3a.

The operation of the microcomputer CPU is schematically shown in FIG. 3b. This will be described with reference to FIG. 3b. First, the threshold data input from the outside is stored in the area of the table M1 of the internal memory (RAM). Next, based on the above equation (1) showing the relationship between voltage and time, each threshold on the table M1 is converted into time data T0 to T255, and these are stored in the area of the table M2.

Next, the reference voltage held in the integration circuit RCC is reset. That is, in order to discharge the electric charge of the capacitor, all the switches of the analog switch unit AS2 are turned on, the analog switch unit AS1 is controlled, and the input terminal of AS2 is set to the ground potential. Thus, the output charge of the integrating circuit RCC becomes 0 within a predetermined time. Output voltage is 0
Then, to release the reset state, the analog switch unit AS1 is controlled to apply a constant voltage Vref to the input terminal of the unit AS2.

Next, the counter register CN is cleared to 0, and all switches SW (0) to SW (2) of the analog switch unit AS2 are cleared.
Set 55) to ON and start the internal timer TM.

Then, the count value of the timer TM is monitored. That is, the time data indicated by the count register CN on the table M2 is compared with the count value of TM. Wait until TM ≧ M2 (CN), and when that state is reached, turn off the analog switch SW (CN) indicated by the count register CN, increment the count register CN, and repeat this process until CN exceeds 255. .

As a result, the 256 analog switches are sequentially turned off, and each time the output voltage of one integration circuit is determined (fixed). This voltage is applied to the analog comparator as a reference voltage.

Therefore, the conversion characteristics (input / output characteristics) of the A / D converter can be arbitrarily changed by changing the threshold data DV0 to DV255 applied to the microcomputer CPU.

In the above embodiment, the time constant circuit is C
Although an integrating circuit composed of R and R is used, another circuit may be used as long as the characteristic that the output level changes with time is obtained. Further, as is apparent from the above equation (1), the output voltage V of the integrating circuit changes not only with time but also with the time constant (CR) and the input voltage (Vref). The circuit configuration may be such that the reference voltage applied to each analog comparator is set.

Further, in the above embodiment, 256 independent integrating circuits are provided at the input terminals of all the 256 analog comparators, and a constant voltage (Vref) is applied to the common input terminals. However, it may be changed to the following configuration. That is, there is only one time constant circuit (for example, an integrating circuit), a constant voltage Vref is applied to its input terminal, 256 sample-hold circuits are connected to its output terminal, and each output terminal of the sample-hold circuit is connected to each output terminal. The resulting voltage is
The reference voltage may be applied to each analog comparator.

[Effects] As described above, according to the present invention, an arbitrary conversion characteristic can be obtained by adjusting the analog reference voltages applied to a large number of comparators for performing A / D conversion.
No increase in quantization error occurs. In addition, since all of the quantization levels can be adjusted, accurate correction characteristics that are not approximate can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an electric circuit configuration of one type of A / D converter embodying the present invention. FIG. 2 is a timing chart showing the setting operation of the reference voltage in the apparatus shown in FIG. FIG. 3a is a memory map showing a table on the microcomputer CPU shown in FIG. 1, and FIG. 3b is a flowchart showing an outline of the operation of the CPU. FIG. 4 is a graph showing an example of a gamma correction characteristic by digital processing. FIG. 5a is a block diagram showing a conventional example of an A / D converter, FIG. 5b is a block diagram showing an example of a configuration of an A / D converter for obtaining a broken line conversion characteristic, and FIG. 5c is an input of the circuit shown in FIG. 5b. 4 is a graph showing output characteristics. AS1: Analog switch unit AS2: Analog switch unit RCC: Integrator circuit unit (voltage adjusting means) CMP: Comparator unit LT: Latch ENC: Encoder FF: Flip-flop CPU: Microcomputer RX: Ladder resistor (Voltage adjusting means)

Claims (3)

(57) [Claims] An analog comparator having a plurality of analog comparators, wherein an analog input voltage is applied to one input terminal of each analog comparator, and a different reference voltage is applied to the other input terminal. An analog / digital converter that encodes and outputs a plurality of comparison results into a signal of a plurality of bits to generate an analog voltage whose level changes according to the elapsed time from the application of a predetermined voltage, and outputs an analog voltage to each of the analog comparators Voltage generating means having a function of holding a voltage, and applying a held analog voltage to an analog comparator; applying a reset voltage to the voltage generating means to initialize an analog voltage held by the reset voltage to a base value; Switch means for applying the predetermined voltage to hold an analog voltage addressed to each of the analog comparators; The threshold value data specifying each reference voltage to be supplied to the analog comparator is converted into time data representing an elapsed time to become each reference voltage according to the characteristic of the elapsed time versus the analog voltage of the voltage generating means, Applying the predetermined voltage to the voltage generating means via the means after applying the reset voltage, and then holding the analog voltage to each analog comparator after a time represented by each time data,
Reference voltage setting means; and an analog / digital conversion device. 2. The method according to claim 1, wherein the voltage generating means is initialized to a base value by a plurality of reset voltages interposed between the switch means and each of the analog comparators, and then applied when a predetermined voltage is applied. 2. The analog / digital conversion device according to claim 1, wherein the analog / digital conversion device is a capacitor charge / discharge type time constant circuit including a capacitor whose potential changes with time. 3. A capacitor charging / discharging type time constant circuit including a capacitor which is initialized to a base value by a reset voltage and changes in potential as time elapses from the application of a predetermined voltage, and 2. The analog / digital converter according to claim 1, further comprising a plurality of sample-and-hold means each of which samples and holds the voltage of said capacitor and applies the held voltage as a reference voltage to each of the analog comparators.