JP2636464B2 - Transfer gate circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transfer gate circuit, and more particularly to a BiCMOS transfer gate circuit configured by combining a MOS transistor and a bipolar transistor.

[Conventional technology]

In recent years, in order to improve the speed performance of LSI, a CMO comprising a pair of N-channel and P-channel MOS transistors
BiCMOS combining S-gate and bipolar transistor
Attention has been focused on logic circuits of the type. This BiCMOS logic circuit combines the low power consumption and high integration of a CMOS gate with the high speed of a bipolar transistor.
It is an increasingly useful circuit for future LSIs. Therefore, BiCMOS type logic circuits are applied to LSIs such as memories and microprocessors as drivers for driving a large number of capacitive loads at high speed.

However, a conventional CMOS type is used for a transfer gate circuit frequently used in a multiplier or an adder. The transfer gate is an essential circuit for the carry signal propagation circuit.

[Problems to be solved by the invention]

The above-mentioned conventional CMOS type transfer gate circuit,
The conduction resistance between the source and the drain of the MOS transistor is large, and the rise or fall time of the output signal is high.
Since the time constant is determined by the conduction resistance of the transistor and the capacitance connected to the output terminal, there is a disadvantage that the propagation time becomes longer.

An object of the present invention is to solve the above-mentioned disadvantages and to provide a transfer gate circuit capable of transmitting a signal at high speed.

[Means for solving the problem]

Therefore, the transfer gate circuit of the present invention includes a bipolar transistor having an emitter and a collector connected between an input terminal and an output terminal, a source / drain path connected between the input terminal and a base of the bipolar transistor, and a gate connected to a control terminal. A connected first MOS transistor, an inverter having the control terminal as an input, and a second MOS transistor having a source / drain path connected between a base and a ground terminal of the bipolar transistor and having an output and a gate connected to the inverter And a third MOS transistor having a source / drain path connected between a base and an output terminal of the bipolar transistor and a gate connected to the control terminal.

[Action]

In the transfer gate circuit of the present invention, since the switch is constituted by a bipolar transistor having a conduction resistance much smaller than the conduction resistance of the MOS transistor, high-speed signal transmission is possible.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing one embodiment of the present invention.

In this embodiment, a bipolar transistor B1 in which an emitter and a collector are connected between an input terminal In and an output terminal Out, a source and a drain are connected between the input terminal In and a base of the bipolar transistor B1, and a gate is connected to a control terminal Cn A first MOS transistor M1, an inverter G1 having the control terminal Cn as an input, and a bipolar transistor B1.
A source and a drain are connected to GND between the base and the ground terminal, and a second gate is connected between the output and the gate of the inverter G1.
The configuration includes the MOS transistor M2.

Next, the operation of this embodiment will be described. This transfer gate circuit operates as a switch whose opening and closing between the input terminal In and the output terminal Out is controlled by a control signal applied to the control terminal Cn. That is, when the logical value of the control signal applied to the control terminal Cn is “1”, the first MOS transistor M1 is turned on, while the second MOS transistor M2 is turned on.
Becomes non-conductive. Therefore, the collector and base of the bipolar transistor B1 are connected, and the bipolar transistor B1 is connected.
B1 is equivalent to a diode from the input terminal In to the output terminal Out, and the signal applied to the input terminal In is guided to the output terminal Out.

On the other hand, if the logical value of the control signal is “0”, the first MOS
The transistor M1 is non-conductive, and the second MOS transistor M2 is conductive. Therefore, the base of the bipolar transistor B1 is grounded, and the bipolar transistor B1 is turned off. That is, the connection between the input terminal In and the output terminal Out is open.

As described above, since the switching operation is performed between the input and output terminals using the bipolar transistor B1 having a conduction resistance much smaller than the conduction resistance of the MOS transistor, the signal applied to the input terminal In is output to the output terminal Out. Can be propagated.

FIG. 2 is a circuit diagram showing another embodiment of the present invention. In this embodiment, a bipolar transistor B1 having an emitter and a collector connected between an input terminal In and an output terminal Out, a source and a drain connected between the input terminal In and the base of the bipolar transistor B1, and a gate connected to a control terminal Cn. The connected first MOS transistor M1, the inverter G1 having the control terminal Cn as an input, the source and the drain connected between the base and the ground terminal of the bipolar transistor B1, and the output and the gate of the inverter G1 were connected. A second MOS transistor M2, a third MOS transistor M3 having a source and a drain connected between the base and the output terminal Out of the bipolar transistor B1, and a gate connected to the control terminal Cn;
And a configuration having:

This transfer gate circuit is different from the circuit shown in FIG. 1 in that a third MOS transistor M3 is added. The circuit of FIG. 1 has a disadvantage that when a signal falling from "1" to "0" is applied to the input terminal In, the fall of the signal at the output terminal Out is delayed. In the transfer gate circuit shown in FIG.
MOS transistor M3 is provided.

That is, in a state where "1" is added to the control terminal Cn and the bipolar transistor B1 is made conductive as in FIG.
Even if a signal that falls from “1” to “0” is applied to the input terminal In,
Since the third MOS transistor M3 is conductive, the bipolar transistor B1 operates as a reverse transistor because the normal correct and the emitter are reversed, and the bipolar transistor B1 is conductive. Therefore, the signal at the output terminal Out immediately falls from “1” to “0”.

When “1” is applied to the control terminal Cn, the transfer gate connects the first and third M between the input terminal In and the output terminal Out.
Output terminal Ou because it is connected by OS transistors M1 and M3
This prevents the signal amplitude value of "1" appearing at t from dropping by 0.8V, which is the forward voltage between the base and the emitter.

[Effects of the Invention] As described above, the present invention adopts a configuration in which signal transmission is performed depending on whether or not the bipolar transistor is conductive, so that the conduction resistance of the bipolar transistor is MOS.
Since it is much smaller than the conduction resistance of the transistor, there is an effect that the signal can be propagated from the input to the output at high speed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, and FIG. 2 is a circuit diagram showing another embodiment of the present invention. B1 ... Bipolar transistor, M1, M2, M3 ... MOS transistor, G1 ... Inverter.

Claims (1)

(57) [Claims] 1. A bipolar transistor having an emitter and a collector connected between an input terminal and an output terminal, and a first transistor having a source / drain path connected between the input terminal and a base of the bipolar transistor and a gate connected to a control terminal. MO
An S transistor, an inverter having the control terminal as an input, a second MOS transistor having a source / drain path connected between a base and a ground terminal of the bipolar transistor, and having an output and a gate connected to the inverter, Between the base and output terminals of the
A third MOS transistor having a drain path connected to the control terminal and a gate connected to the control terminal.