JP2634595B2 - Semiconductor manufacturing equipment - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus, and more particularly, to a semiconductor manufacturing apparatus suitable for making the thickness of an insulating film and the depth of an impurity layer uniform.

[Conventional technology]

In a conventional semiconductor manufacturing apparatus, Japanese Patent Application Laid-Open No. 54-123879
As described in the above publication, it has been attempted to form a high-quality and uniform film by controlling the temperature inside the apparatus and controlling the composition and flow rate of the reactive gas introduced into the apparatus.

[Problems to be solved by the invention]

In the above prior art, since the temperature of the semiconductor wafer itself is not correctly measured, the thermal history of the wafer during the actual heat treatment may be different for each apparatus, or the processing procedure in each apparatus may be different. However, there is a problem in controlling the film quality and the film thickness uniformly.

An object of the present invention is to provide a semiconductor manufacturing apparatus capable of controlling the film quality and film thickness more uniformly and controlling the diffusion depth of impurities more accurately.

[Means for solving the problem]

The above objective is to measure the surface temperature of the wafer in the manufacturing apparatus over time, multiply this by the weight of the temperature coefficient of the reaction,
This is achieved by integrating the result of the conversion processing by the function over time and using the result as control information of the processing condition.

[Action]

According to the present invention, since the oxidation and annealing effects due to the heat treatment can be theoretically completely integrated, the controllability of the oxide film thickness and the control of the depth of impurity diffusion by the annealing can be remarkably improved.

〔Example〕

Hereinafter, the structure and operation of the first embodiment will be described with reference to FIG.

FIG. 1 shows an infrared thermometer 16, a gas analyzer, a function processing device 19, an integrating device 111, a judgment device 112, a halogen lamp power supply 1
3, an embodiment of the present invention to which a gas analyzer 17 and a gas flow controller 15 are added.

From the start of the heat treatment, the temperature measurement by the infrared thermometer 16 and the measurement of the gas composition by the gas analyzer 17 are performed with time, and sent to the function processor 19 in the controller 18. Here, when the control target is the Sio ₂ film thickness x ₀ , for example, the reached Sio ₂ film thickness x ₀ is calculated for each time using the following functional expression (1) (Physics and Technology by AS. Globe) Of Semiconductor Devices, John Wiley and Sun (Physics and Technology of Semi)
condnctor Devices, John Wiley and Sons Inc .: ASGrov
e)). Here, A (T) and B (T) are functions of temperature T, and τ is Sio ₂
Is a variable which is determined by the history of film thickness x _0.

In the case of the present embodiment, it is not necessary to operate the integrating device 111. Sio ₂ thickness x ₀ is determined by the desired determines whether reached a thickness of 112, or if it reaches the desired thickness stopping gas actuates the gas flow control device 15, or a halogen lamp The exact SiO ₂ thickness is obtained by turning off the power supply 13 or stopping the oxidation.

Further, the apparatus shown in FIG. 1, used as an annealing furnace, in the case of controlling the diffusion depth x _j of the impurities, over time to measure the wafer surface temperature T from the time of starting the heat treatment. The measured temperature T is taken into the function processing device 19 in the control device 18. During the temperature measurement period Δt seconds, the diffusion depth x is Δ
x _j deepen. This can be expressed by the following total differential equation (2).

Here, ΔT in the second term on the right side indicates a temperature that has changed during Δt seconds. Further, x _j can be expressed by the following equation.

Where D (T) is the diffusion coefficient of the impurity used for diffusion, C _SUB
Is the impurity concentration of the semiconductor wafer substrate, and Q is the amount of impurities introduced to the wafer surface before the start of diffusion.

If the change in temperature and time during annealing and the impurity species to be diffused are known, the amount of change Δx _j in the junction depth can be calculated by using the above equation (2). The calculation result is integrated by the integrating device 111, it is possible to obtain a junction depth x _j of t seconds after the annealing starts. The x _j is determined in the determination unit 112 whether or has decreased to a desired depth, controls the halogen lamp power. By using this semiconductor control device, it is possible to accurately control the depth of the diffusion layer.

FIG. 2 shows a second embodiment. In this example, the present invention is applied to a horizontal oxidation / annealing furnace. The reaction box shown in FIG. 1 is replaced with a quartz tube 114, and a halogen lamp and a halogen lamp power supply are replaced with a heater 116 and a heater power supply 115. Except that a wafer loader 117 is further added, it is basically the same as the first embodiment shown in FIG.

Although the lamp annealing furnace and the horizontal quartz tube type oxidation and annealing furnace are shown in the above embodiment, the present invention can be applied to other types of semiconductor control devices such as a vertical quartz tube type oxidation and annealing furnace. Of course, it does not depend on the shape or structure.

〔The invention's effect〕

According to the present invention, the thickness of the oxide film and the depth of the impurity diffusion layer can be controlled with high accuracy.

[Brief description of the drawings]

FIGS. 1 and 2 are schematic diagrams showing the system structure of the first and second embodiments of the present invention, respectively. 11 Semiconductor wafer, 12 Reaction chamber, 13 Halogen lamp power supply, 14 Halogen lamp, 15 Gas flow controller, 16 Infrared thermometer, 17 Gas analyzer, 18
... Control device, 19 ... Function processing device, 111 ... Integration device, 1
12 ... judging device, 113 ... temperature measurement window, 114 ... quartz tube, 115 ... heater power supply, 116 ... heater, 117 ... wafer loader.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Sadayuki Okuhira 1-280 Higashi-Koigabo, Kokubunji-shi, Hitachi, Ltd. Central Research Laboratory Co., Ltd. 72) Inventor Shoji Yoshihiro 1-280 Higashi Koigakubo, Kokubunji City, Hitachi, Ltd., Central Research Laboratory, Ltd. (72) Inventor Sukeyoshi Tsunekawa 1-280 Higashi Koigabo, Kokubunji City, Hitachi, Ltd. 1-280 Higashi Koigakubo, Kokubunji-shi Inside Hitachi Central Research Laboratory, Ltd.

Claims (1)

(57) [Claims] 1. A method according to claim 1, wherein a predetermined gas is introduced into the reaction tank, and the semiconductor wafer placed in the reaction tank is heated.
Means for directly measuring the surface temperature of the semiconductor wafer over time, means for multiplying each measured value obtained by the means with a weight, and integrating the surface temperature of the semiconductor wafer, Means for comparing the integrated value obtained by the means to a predetermined value, and means for stopping at least one of heating of the semiconductor wafer and introduction of the gas when the integrated value reaches the predetermined value. A semiconductor manufacturing apparatus, comprising: