JP2632110B2 - Video camera - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video camera provided with a camera shake correction circuit and a digital signal processing circuit.

[0002]

2. Description of the Related Art In recent years, there have been proposed various video cameras that perform camera shake correction and electronic zoom by digitizing the signal processing of the camera. For example, the configuration of this type of video camera is described in Nikkei Electronics 1992.2.3 (NO. .546)
P237-241.

On the other hand, AF (auto focus) control in a video camera is usually performed as follows. That is, after analog-to-digital conversion of an analog luminance signal, a high-pass component is extracted by a high-pass filter, and the high-frequency component is digitally integrated by an integrating circuit for each of a plurality of divided imaging areas.
The microcomputer performs predetermined arithmetic processing based on the integrated value, supplies the result to the focus motor as an AF control output, and controls the focus.

However, in the above-mentioned conventional video camera, since AF detection is performed based on a signal before camera shake correction, an accurate auto focus control cannot be performed because an integrated value in an integration circuit fluctuates due to camera shake. There were drawbacks.

[0005] The detection for the automatic iris control and the automatic white balance control has the same disadvantage.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and can effectively perform camera shake correction and perform accurate autofocus control, auto iris control, and auto white balance control. A video camera is provided.

[0007]

According to the present invention, there is provided a digital HPF for extracting a high-frequency component of a digital luminance signal after camera shake correction and before gamma correction in a digital signal processing circuit, and outputting the digital HPF output for a predetermined period. The video camera is characterized in that an integrating circuit for integrating the signals is provided, and the output of the integrating circuit is used for autofocus control.

The present invention also provides a digital LPF for extracting a low-frequency component of a digital luminance signal after camera shake correction and before gamma correction in a digital signal processing circuit.
A video camera is provided with an integrating circuit for integrating the PF output at a predetermined cycle, and using the output of the integrating circuit for auto iris control.

Further, the present invention is characterized in that an integrating circuit is provided in a digital signal processing circuit for integrating a digital color signal after camera shake correction at a predetermined cycle, and the output of the integrating circuit is used for automatic white balance control. Video camera. Further, the digital color signal is RG before γ correction.
A video camera characterized by being a B primary color signal or a color difference signal after γ correction.

[0010]

According to the digital video camera of the present invention, a digital HPF in a digital signal processing circuit extracts a high-frequency component of a digital luminance signal after camera shake correction and before gamma correction, and automatically integrates an output obtained by the integration circuit. Used for focus control.

According to the digital video camera of the present invention, the digital LPF in the digital signal processing circuit extracts the low-frequency component of the digital luminance signal after the camera shake correction and before the γ correction, and integrates the output of the digital luminance signal with the integration circuit to obtain an auto iris. Used for control.

In the digital video camera according to the present invention, the digital RGB primary color signals after the camera shake correction and before the gamma correction in the digital signal processing circuit or the digital color difference signals after the camera shake correction and after the gamma correction are integrated by the integration circuit. Use the output for auto white balance control.

[0013]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic block diagram of a video signal processing circuit of a video camera according to this embodiment. In the drawing, reference numeral 1 denotes a C in which a predetermined mosaic type color filter is provided on the imaging surface.
A CD (solid-state imaging device) 2 is an A / D converter that converts the CCD output into a 10-bit digital signal.

Reference numeral 3 denotes a camera shake correction IC, which is roughly composed of a noise reduction circuit 31, a motion vector detection circuit 32, and a memory control circuit 33. The noise reduction circuit 31 removes noise having no correlation in the time axis direction from the output of the A / D converter 2 and constitutes a well-known cyclic noise reducer together with a field memory F outside the IC. Reference numeral 34 denotes a compression circuit for compressing the output of the 10-bit noise reduction circuit 31 to 8 bits and supplying the compressed data to the 8-bit field memory F. 35 expands the 8-bit data read from the field memory F to 10 bits. And a decompression circuit for supplying the signal to the noise reduction circuit 31. The field memory F is originally used for electronic zoom and camera shake correction as described later.

On the other hand, a part of the output of the A / D converter 2 is inputted to the motion vector detecting circuit 32. The motion vector detection circuit 32 detects a motion vector for each of the four detection blocks by a well-known representative point matching method and supplies the motion vector to the first microcomputer 4. The first microcomputer 4 specifies one motion vector from the motion vectors for each detection block.

At the time of camera shake correction, the electronic zoom is performed at a predetermined zoom magnification (1.2 times), and the start position of reading from the field memory F is controlled in accordance with the motion vector, whereby the cutout position of the image is obtained. To compensate for camera shake.

Next, the memory control circuit 33 will be described.

The memory control circuit 33 controls writing in the field memory F based on a writing start address from the first microcomputer 4. At the time of reading, the read start address is controlled according to the motion vector and / or the zoom magnification (1 to 4 times), and a read pulse corresponding to the zoom magnification is generated to control redundant reading of the same data.

The memory control circuit 33 calculates an interpolation coefficient to be supplied to an interpolation circuit, which will be described later, according to the zoom magnification. That is, the memory control circuit 33 performs zoom control by controlling writing and reading of the field memory F and by controlling the interpolation circuit.

Further, at the time of zooming, the color order of the signal from the field memory F is different from that of the CCD output. Since the YC separation circuit described later does not operate as it is, the memory control circuit 33 creates a color order identification signal indicating the color order based on the read pulse and supplies the signal to the YC separation circuit.

Next, reference numeral 36 denotes a synchronizing signal generating circuit which generates horizontal and vertical synchronizing signals based on a clock and a start pulse, and supplies them to the motion vector detecting circuit 32 and the memory control circuit 33.

Reference numeral 5 denotes a digital signal processing IC for digitally processing the output of the camera shake correction IC 3.

Reference numeral 501 denotes an interpolation circuit to which the output of the noise reduction circuit 31 is supplied. The interpolation circuit 501 performs horizontal and vertical data interpolation according to the interpolation coefficient corresponding to the zoom magnification, and outputs two color signals and a luminance signal Y. Further, a horizontal and vertical aperture signal AP which is a contour correction signal is generated.

The two color signals are supplied to a Y / C separation circuit 502
To be separated into color signals Cr and Cb and a low-frequency luminance signal YL.
The signal is a B color signal. The RGB color signal is supplied to the gamma correction circuit 50.
4, the color difference matrix circuit 505 performs R-
It is converted into Y and BY color difference signals. Further, this color difference signal is subjected to signal processing in a color signal processing circuit 506, modulated to an NTSC color signal, and output.

On the other hand, the luminance signal Y of the interpolation circuit output
After the aperture signal AP is added by the aperture addition circuit 507, the γ correction is performed by the γ correction circuit 508. Further, the luminance signal is subjected to signal processing in a luminance signal processing circuit 509,
A synchronization signal based on the output of the synchronization signal generation circuit 36 is added by a synchronization addition circuit 510 and output.

The output of the color signal processing circuit 506 and the output of the synchronization adding circuit 510 are respectively supplied to the D / A converter 7,
At 8, they are converted into analog color signals and luminance signals.

Each block of the above-mentioned signal processing circuit is described in Japanese Patent Application No. 3-150 filed earlier by the present applicant.
No. 365, the details are omitted.

Next, AF (auto focus), AE
(Auto Iris) and AWB (Auto White Balance) will be described.

One of the luminance outputs from the interpolation circuit 501 before the addition of the aperture signal is supplied to an AF integration circuit 512 after a high frequency component of the luminance signal is extracted by an HPF 511. The AF integration circuit 512 digitally integrates the image pickup area into a plurality of integration areas at a field cycle. The integrated value is subjected to predetermined arithmetic processing by a second microcomputer 6 communicable with the first microcomputer 4 and supplied to a focus motor (not shown) as an AF control output.

The luminance output from the interpolation circuit 501 is further integrated by the AE integration circuit 514 after the low frequency component of the luminance signal is extracted by the LPF 513. And
This integrated value is subjected to predetermined arithmetic processing by the second microcomputer 6, and is supplied to an iris motor (not shown) as an AE control output.

Further, either one of the RGB signals from the RGB matrix circuit 503 or the color difference signals (RG, BG) from the color difference matrix circuit 505 is selected by the selector 515, and the high-frequency range of the color signal is selected by the HPF 516. After the components are extracted, they are similarly digitally integrated by the AWB integrating circuit 517. Then, this integrated value is subjected to predetermined arithmetic processing by the second microcomputer 6 and supplied to the RGB matrix circuit 503 as an AWB control output.
Control the coefficients of this circuit.

As described above, since the detection of AF, AE and AWB is performed using the output after the camera shake correction has been performed, the integration result can be accurately controlled without fluctuation due to camera shake.

Further, since the detection of AF and AE uses a luminance signal before γ correction and before addition of an aperture, that is, before non-linear processing, accurate detection can be performed.

It should be noted that the selector 515 can be selected from one of them according to the setting of the second microcomputer 6.

The RGB signals are selected so that the same color signal is obtained for each field before being selected by the selector 515, and the same color signal is integrated for one field period by a subsequent integration circuit. Have been able to.
Similarly, the color difference signal is selected so that the same signal can be obtained for each field.

[0037]

As described above, the video camera according to the present invention uses the digital signal based on the digital signal after the camera shake correction and before the gamma correction.
Since F and AE are detected, camera shake correction can be effectively performed, and accurate autofocus control and auto iris control can be performed. In addition, since AWB detection is performed based on the digital color signal after the camera shake correction, the camera shake correction can be performed effectively, and accurate auto white balance control can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram of a video signal processing circuit of a video camera according to an embodiment of the present invention.

[Explanation of symbols]

 3 Camera Shake Correction IC 5 Digital Signal Processing IC 511, 516 High Pass Filter 513 Low Pass Filter 512 AF Integration Circuit 514 AE Integration Circuit 517 AWB Integration Circuit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masao Takuma 2-18-18 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. (72) Inventor Toshinori Haruki 2-18-18 Keihanhondori, Moriguchi-shi, Osaka (72) Inventor Seiji Kawakami 2-18-18 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. (56) References JP-A-3-16470 (JP, A) JP-A-2 -63292 (JP, A) JP-A-1-291580 (JP, A)

Claims (4)

(57) [Claims] 1. An A / D conversion output of an imaging output is at least 1
A camera shake correction circuit including a memory for storing a field, a motion vector detection circuit for detecting a motion vector from the AD conversion output, and a memory control circuit for controlling reading of the memory based on the output of the motion vector detection circuit; A YC separation circuit that performs digital signal processing on the output of the camera shake correction circuit and separates and outputs a luminance signal and a chrominance signal; and a digital signal for the luminance signal and the chrominance signal.
And a digital signal processing circuit comprising a gamma correction circuit that performs gamma correction in a digital manner.
A video camera comprising: a digital HPF for extracting a high-frequency component of a digital luminance signal before correction; and an integrating circuit for integrating the output of the digital HPF at a predetermined period, and using the output of the integrating circuit for autofocus control. . 2. The method according to claim 1, wherein the AD conversion output of the imaging output is at least one.
A camera shake correction circuit including a memory for storing fields, a motion vector detection circuit for detecting a motion vector from the AD conversion output, and a memory control circuit for controlling reading of the memory based on the output of the motion vector detection circuit; YC separation circuit that digitally processes the output of the camera shake correction circuit and separates and outputs the luminance signal and the chrominance signal
Γ compensation for the luminance signal and the color signal, respectively.
In a video camera and a digital signal processing circuit comprising a γ correction circuit forms a positive, the digital signal processing circuit, and after camera shake compensation γ
Digital to extract low frequency components of digital luminance signal before correction
LPF and the output of this digital LPF at predetermined intervals
A video camera , comprising: an integrating circuit that performs an automatic iris control. 3. An A / D conversion output of an imaging output is at least one.
A camera shake correction circuit including a memory for storing a field, a motion vector detection circuit for detecting a motion vector from the AD conversion output, and a memory control circuit for controlling reading of the memory based on the output of the motion vector detection circuit; A YC separation circuit that digitally processes the output of the camera shake correction circuit and separates and outputs a luminance signal and a color signal; and a gamma correction circuit that performs gamma correction on the luminance signal and the color signal, respectively. And a digital signal processing circuit comprising: a digital signal processing circuit comprising: an integrating circuit for integrating the digital color signal after the camera shake correction in a predetermined cycle; A video camera. 4. The digital color signal is RG before γ correction.
4. The video camera according to claim 3, wherein the video camera is a B primary color signal or a color difference signal after gamma correction .