JP2626335B2 - Fuzzy arithmetic device and input / output access method in the device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inference apparatus for inferring an event using rules such as fuzzy rules, and to an input / output access method in processing such as reading of fuzzy rules.

[0002]

2. Description of the Related Art A conventional fuzzy inference apparatus has a memory
Using one fuzzy rule group prepared for, when a request to infer certain event has occurred, it reads the rules from said memory (set) to the inference unit required to perform the inference so It is composed. In such a fuzzy system, address information for accessing a memory or the like is determined irrespective of a fuzzy rule, for example, according to a programmer's convenience or various conditions of memory arrangement.

[0003]

However, it is time-consuming to simply select a necessary rule from an extremely large number of fuzzy rules simply by the preference and convenience of the programmer or by an appropriate method from the constraints of memory and the like. This makes it impossible to perform the processing efficiently.

SUMMARY OF THE INVENTION An object of the present invention is to provide an inference apparatus for executing a fuzzy rule fetch from a memory and an inference input / output at high speed, and an input / output access method in the apparatus.

[0005]

According to the present invention, a code representing a fuzzy rule used for fuzzy inference is accessed as address information to a memory or an input / output device. The antecedent of the fuzzy rule
Is a variable that should be read from outside,
Judgment is performed because it represents the inference result.
Variables in the antecedent part of Jiru should be read from outside
, Read through the external input interface
To the outside to read the variable value,
Variables in the antecedent part of the fuzzy rule show past inference results.
Fuzzy conclusion memory interface
Source address to read through the source
Is read.

[0006] In addition, to the fuzzy rule memory for storing a fuzzy rule, it is stored to correlate an address to the fuzzy variables in the subsequent matter part of each fuzzy rule, Ma
The microcomputer is free from fuzzy rule memory.
The code that represents the fuzzy variable in the consequent part of the fuzzy rule
It is characterized by accessing as address information.

In addition, in a fuzzy inference memory for storing a fuzzy inference result, each fuzzy inference conclusion result is stored with an address correlated with a fuzzy variable in a consequent part of each fuzzy rule. A code representing the fuzzy variable of the consequent part is accessed as address information, and a fuzzy inference result is read. In addition, fuzzy inference computers have
Access.

[0008]

A fuzzy conclusion memory is provided for storing a fuzzy inference result obtained by the fuzzy inference unit for each fuzzy variable in a fuzzy rule consequent, and accesses the fuzzy conclusion memory with address information correlated with the fuzzy variable. It is characterized by the following.

[0010] comprising means for providing the parameters of the membership function of the previous SL fuzzy inference computer, and means for switching the input to the fuzzy inference computer, and means for switching the inference output of the fuzzy inference computer, the The fuzzy inference computer determines whether the variables in the antecedent part of the fuzzy rule are variables to be read from the outside or represent past inference results, and the variables in the antecedent part of the fuzzy rule should be read from the outside When the variable is a variable, the address for reading is sent to the outside through the external input interface to read the variable value, and when the variable in the antecedent part of the fuzzy rule represents the past inference result, the fuzzy conclusion memory interface is used. Send the address to read through and read the variable value And wherein the door.

[0011]

[ Function ] Shows fuzzy rules used for fuzzy inference
The code that appears is used as address information in memory and I / O devices.
When accessing the resource, the variables in the antecedent part of the fuzzy rule
Is a variable to be read from outside, or
Judgment of fuzzy rules
When the variables in the antecedent are variables to be read from outside,
Ad for reading through external input interface
Address to read the variable value,
The variables in the antecedent part of the rule represent past inference results.
Through the fuzzy conclusion memory interface
The address for reading is sent, and the variable value is read.

When accessing the fuzzy rule memory, a code representing a fuzzy variable in the consequent part of the fuzzy rule is accessed as address information. That is, each fuzzy rule is stored in the fuzzy memory at a position where the address is correlated with the fuzzy variable of the subsequent part.

In a fuzzy conclusion memory for storing a fuzzy inference result, a fuzzy inference result is stored by correlating an address with a fuzzy variable. Therefore, when accessing this memory, a code representing a fuzzy variable is accessed as address information.

[0014]

Further, by providing a fuzzy conclusion memory for storing a fuzzy inference result obtained by the fuzzy inference unit for each fuzzy variable in a fuzzy rule consequent part,
The fuzzy conclusion memory is accessed with address information correlated to the fuzzy variable.

[0016] In addition, when accessing the memory and input-output device a code to represent the fuzzy rules to be used in the fuzzy inference as address information, if the variable of the antecedent part of the fuzzy rules is a variable to be read from the outside, Judgment is made as to whether it represents past inference results, and if the variable in the antecedent part of the fuzzy rule is a variable to be read from outside, the address for reading is sent to the outside through the external input interface and the variable value If the variable in the antecedent part of the fuzzy rule represents a past inference result, an address for reading through the fuzzy conclusion memory interface is sent to read out the variable value, and the fuzzy inference computer By switching input and output, you can respond to various events Unishi to have.

[0017]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG.
FIG. 1 is a system configuration diagram of an apparatus according to the present embodiment. In this system, a fuzzy computer, which will be described in detail later (hereinafter referred to as F
C) 2, 3, 4, and 5 are arranged and controlled.
For example, the second fuzzy computer 3 is connected to the first fuzzy computer 2 and has a multi-layer structure.

That is, FC2 has a plurality of sensors 6, 6,
.. In addition to the inference based on the output from the second FC3, the inference result of the second FC3, which can be said to be lower, can be treated as input and inferred.

Here, regarding the inference performed in the present system,
In order to facilitate later understanding, a brief description will be given based on the processing schematic diagram of FIG. It is assumed that the execution of the inference regarding a certain proposition from the top 1 is instructed to the top FCa. This command will require a differential output. In response to this command, the FCa activates the FCb to c when the information necessary for inferring this proposition is obtained in the lower FCb to c. In response to this activation, FCa to c:
Inference is performed based on the outputs of the separately arranged sensors 6 and 6, and the result is transmitted to FCa. The FCa receiving this result executes the inference and transmits the result to the top one. The final inference result obtained in this way is displayed on the display unit in the top 1 or output as a control signal to another system.

As described above, it is advantageous to analyze and infer a large and complex problem if the upper FC can handle the inference result obtained by the lower FC in the same manner as the sensor output.

Further, a portion enclosed by a dotted line in FIG. 2 will be additionally described. That is, the lower FCc executes an inference according to the sensor output, and outputs the result to the upper FCc.
The signal form is transmitted to a, and the signal form is equivalent to the signal form that the sensors 6 and 6 input to themselves. Therefore, from the viewpoint of the upper FCa, it is not possible to distinguish whether it is a direct output from the sensor 6 or an inference result, or there is no need to distinguish.

This means that the whole portion 7 surrounded by the dotted line forms a certain kind of sensor, that is, a fuzzy sensor.

Next, the relationship between the fuzzy computer and the upper (hereinafter referred to as MPU) 1 will be described with reference to FIG. The FC 2 typically shown in FIG. 3 is connected to the MPU 1 by the upper bus 8. Through this bus 8, MPU 1
Stores a fuzzy production rule in the fuzzy rule memory 9 in advance.

When executing a certain proposition, the MPU
1 transfers the information indicating the proposition to the rule controller 10 via the bus 8. As a result, the rule controller 10 selects a rule to be activated and sets it in the fuzzy rule register section 11 from the fuzzy rule memory 9.

The rule set in the fuzzy rule register section 11 is determined by the input control section 12 as to whether an external input should be fetched as a fuzzy variable or from a fuzzy conclusion memory section 13 described later. The fuzzy variable selected based on this judgment is applied to the fuzzy inference unit 14 together with the rule, and the inference is executed. The inferred result is stored in the fuzzy conclusion memory unit 13. This inference result is transferred to the MPU 1 via the conclusion memory controller 15 and the upper bus 8.

That is, the MPU 1 can freely access the fuzzy rule memory 9, the rule controller 10, and the conclusion memory controller 15, thereby executing and completing a desired inference.

Next, the specific configuration and operation of the fuzzy computer shown in FIG. 3 will be described.

Returning to FIG. 2, the inference operation in the present system will be described. MPU1 transfers the fact to FCa to make inference regarding Z1. That is, MP
U1 issues a request for a differential output Z1. This is based on the fuzzy production rule "if
x1 = A1 · y1 = B1 then z1 = C1 ”(that is,“ if x1 is A1 and y1 is B1, z1 is C1 ”).

In response to this, FCa searches for where the fuzzy variable x1 or y1 in the antecedent part of the rule can be obtained. The details of this search will be described later. In short, when it is obtained as a definite value from the sensor 6, it is the same as a conventional fuzzy computer, but when it is obtained as an inference result of another FC, x
All rules with 1 or y1 as a consequent are executed in a specific FC, and the overall inference result obtained from the result is used as a definite value, for example, FCb or FCc.
a.

In FIG. 2, a two-layer structure such as FCa and FCb or FCc has been described, but the present invention is not limited to this. That is, when the antecedent part of the rule executed by the FC located in a certain hierarchy includes a fuzzy variable that is not a sensor output, the FC that outputs the fuzzy variable (ie, the lower FC) is sequentially activated. There is a feature of this system in the point.

The fuzzy rule memory 9 has a plurality of i.
The f-then fuzzy production rules are stored. As shown in detail in FIG. 4, each rule is composed of an antecedent part 16 and a consequent part 17. The fuzzy production rules (hereinafter also referred to as fuzzy rules) are written in the fuzzy rule memory 9 by the MPU 1 in advance.

The MPU 1 has a rule controller 10
The data for determining the fuzzy rule to be activated is written in advance in FIG. 5, and details thereof are shown in FIG.

In FIG. 5, staddr (i) and endaddr (i) of the rule control memory 18 are used.
Is used to indicate at which address in the fuzzy rule memory 9 a rule having the same fuzzy variable in the consequent is located. The start address is staddr (i), and the end address is endaddr (i). Is shown. That is, "i" is a code representing the fuzzy variable of the consequent part.

FIG. 6 shows the relationship between the fuzzy rule memory 9 and the rule control memory 18 on the memory.

As described above, the MPU 1 writes the fuzzy rules and rule control data for all FCs, so that the present system is initialized to a state where inference can be performed.

Accordingly, a command to start inference of a predetermined item is issued from the MPU 1.
Is given to the memory controller 15. Conclusion The details of the memory controller 15 are shown in FIG. FIG. 8 shows details of the fuzzy conclusion memory unit 13 and FIG. 9 shows details of the fuzzy conclusion memory.

Now, the MPU 1 applies an address signal i to the conclusion memory controller 15 via the upper bus 8 in order to infer an event r (item). That is, MPU1
Sends the code “i” representing the fuzzy variable of the consequent part to the address
Access to the conclusion memory controller 15
To This address signal is set in the command register 21 (FIG. 7). In response to this, the conclusion memory access unit 22 gives the address signal ead and reads the corresponding fuzzy variable value edat from the conclusion memory 20 via the interface 223.

The fuzzy conclusion memory 20 is a memory for storing the inference result in detail as shown in FIG. 9. As the inference is completed in the fuzzy inference unit 14 in FIG. Is set to “1”, and “1” is set in the flag section 24 located at the highest position. Therefore, if "1" is not set in the flag section 24, it means that the corresponding fuzzy variable is not valid.

Therefore, when the most significant bit of the data edat read from the conclusion memory 20 is "1", this data is validated and set in the conclusion memory data register 25 (FIG. 7). That is, the data of the conclusion memory is used, but such an operation is naturally performed when the conclusion value of the past inference can be used as it is, such as when the input condition has not changed. Therefore, the flag unit 2
4 "i" needs to be reset periodically. What
Note that "i" represents the fuzzy variable of the consequent part as described above.
And the fuzzy conclusion memory 20 is clear from FIG.
So that the address is correlated to "i"
Store the inference result (for each “i ,,”).

If the most significant bit of the read data edat is "0", the rule activation request signal erul is sent to the rule control memory accessor 2 of the rule controller 10 together with the fuzzy variable address faddr.
6 (FIG. 5).

Accordingly, in the rule controller 10,
A rule group having a fuzzy variable address faddr in the consequent part (now i) is detected by reading the rule control memory 18. Since this is now i, the start address staddr (i) and the end address (en) of the i-th rule group sharing the consequent part
daddr (i)) is the buffer register 27,
Set to 28.

The buffer register 27 also has a counter function. The output of the register 27 is used as a signal (ruleddr) for read access to a corresponding rule in the fuzzy rule memory 9 (see FIGS. 3 and 6). Is applied to As a result, inference is performed. When the inference for one of the rule groups is completed, a count-up signal is output from the synchronization circuit 29, the counter buffer 27 is incremented, and its output (ru) is output.
laddr) starts the inference of the next rule.
When the execution of all the rules in the rule group is completed in this way, an output is output from the comparator 30 that compares the outputs of the counter buffer 27 and the final address buffer 28, and the step stops. Thus, the inference of all the rules of the rule group having a common consequent part is completed.

Next, how this repetitive inference is performed will be described.

The rule address signal ru1a described above is used.
ddr is applied to the fuzzy rule memory 9 (FIG. 3),
The corresponding rule is read out to the fuzzy rule register section 11.

FIG. 10 shows the details of the fuzzy rule register section 11.

It is now assumed that the rule read by the rule address signal ru1add is as shown in the following equation (1).

If x = A · y = B · z = C then r = D (1) In this equation (1), x, y, z, and r are fuzzy variables, which will be apparent later. Is in the form of an address signal.

The rules read from the fuzzy rule memory 9 and expressed by the formula (1) are latched and stored in the latch circuits 31 to 38 (FIG. 10) of the fuzzy rule register section 11 for each variable. Among them, the latch circuit 35
Member 38 has a membership function parameter by MPU1.
The parameters Ai, Bi, Ci, Di are set.

The address on the r latch circuit 31 is used as a write address of the fuzzy conclusion memory 20 (FIG. 8) via the write interface section 224.
The addresses on the latch circuits x, y, and z are time- sequentially converted by the fuzzy variable read control unit 39, and are used as read addresses rad together with a register code rcode for details of the input shown in FIG. It is sequentially provided to the control unit 12 (see FIG. 3).

The signal relating to the antecedent part of the rule given to the input control unit 12 in this manner is
Decoded at 0,41. That is, assuming that rad and rcode relating to the first fuzzy variable x are given, the register code rcode is decoded by the decoder 41 and the input latch 42 is selected. Further, the read address rad is decoded by the decoder, and it is determined whether the information is obtained from its own, that is, information obtained from the fuzzy conclusion memory 20, or is obtained from the outside, that is, information obtained from the sensor or the lower FC. Either the external input interface 45 or the fuzzy conclusion memory interface 46 is selected according to the determination result, and an address signal relating to the fuzzy variable x is output.

That is, the fuzzy conclusion memory interface 46 or the external input interface 45 is selected depending on whether the predetermined bit of rad is “0” or “1”. When the conclusion memory interface 46 is selected, the address signal fmad regarding the fuzzy variable x is output from the conclusion memory interface 46 and read from the fuzzy conclusion memory 20 via the input control unit interface 225 of FIG. The read data is supplied to the signal fdat via the input control unit interface 225.
Is input to the fuzzy conclusion memory interface 46.

On the other hand, when the external input interface 45 is selected, the external input interface 45 outputs a selection signal sensad for the sensor 6 or the lower FC. The selected sensor or FC returns a status signal or a fuzzy inference result to the external input interface 45 as a signal sdat.

Fuzzy conclusion memory interface 46
Or external input interface 4
The data returned to 5 is set in input latch 42 as dx via line 47. The same processing is performed for y and z, and fuzzy variable values dy and dz are set in the input latches 43 and 44.

Next, the fuzzy variable values dx, dy, dz
The inference is executed by using the membership function which is another signal. A mechanism for generating the membership function will be described.

Returning to FIG. 10, the labels A, B, C, and D of the membership functions of the fuzzy rule are latched and stored in the latch circuits 35, 36, 37, and 38, respectively, as described above. The labels A, B, C, and D thus latched are input to the waveform creation unit 50 as a part of the address. Then, a signal indicating a time-dependent membership function is output from the waveform creation unit 50, which will be described below.

The waveform creation unit 50 generates a fuzzy membership function as described above.
Normally, this membership function is represented by a continuous function having a fuzzy variable on the horizontal axis and a degree of membership on the vertical axis, as shown in FIG. On the other hand, in this fuzzy computer, when generating a membership function, a fuzzy variable x is discretely taken as shown in FIG. It is represented by This is hereinafter referred to as the membership function PWM (Pulse Width M).
Odulation expression. Here, the end points of the pulses are set at the same time, but the starting points may be set at the same time.

Based on the above understanding, a description will be given of the waveform creating unit 50 shown in detail in FIG.

The waveform creation unit 50 stores function waveforms of a plurality of types of membership functions and selects a corresponding function based on one of the input labels (A, B, C, D...). 51, 52, 53, 5
4 and a counter 55 for controlling the read timing of the selected function.

That is, in FIG. 13, "0" and "1" are assigned to each lattice, and a plurality of membership functions represented by PWM are stored in the waveform memories 51 to 54 in the label order. I have. Therefore, when a membership function is specified by a label and a count value obtained by counting clocks is applied from the counter 55, when
3 are accessed in the order of t0, t1, t2,... Shown in FIG. 3, and the membership function expressed by the pulse length as shown in FIG.
0, h1, h2,...

Thus, the fuzzy variable values dx, d
y, dz and membership functions (mA, mB, mC, m
The fuzzy inference is executed when D) is satisfied. This will be described with reference to the block diagram of the fuzzy inference unit 14 in FIG.

The fuzzy inference unit 14 processes the antecedent part of the fuzzy rule. That is, a plurality of lines h0,
(see FIG. 15), input membership functions (mA, mB, mC) represented by PWM are connected to multiplexers 61, 62, 63, respectively.

The function of the multiplexers 61, 62, 63 is to select one of the lines h0, h1, h2,... According to the size of the fuzzy variables dx, dy, dz, ey and ez. This is equivalent to a well-known / normal fuzzy computer that evaluates an input signal input from a sensor or the like by a membership function and outputs a belonging value. Just
Unlike a normal fuzzy computer, the degree of belonging is represented by the magnitude of an electric signal such as voltage or current, whereas the present fuzzy computer is characterized in that it is represented by the length of a pulse.

The belonging value e expressed by the pulse width as described above
x, ey and ez are subjected to a MIN operation in a min circuit 64. The actual state of the min circuit 64 is a simple AND circuit shown in FIG. That is, in this fuzzy computer, the membership degrees ex, ey, and ez are expressed in PWM, so that the pulse having the shortest pulse width (the membership degree) is easily selected by the AND circuit, the MIN operation is performed, and the output g is output. It is.

When the processing of the antecedent part is completed in this way, the process proceeds to the processing of the consequent part. The processing of the consequent part is performed by the truncation part 65.

That is, the truncation unit 65 is the same as that shown in FIG.
The AND circuit group is composed of AND circuit groups arranged in parallel as shown in FIG. 8, and one input terminal of each AND circuit is commonly connected to the output terminal of the min circuit 64, and the output g which is the shortest pulse width signal is applied. You.

The other input of the truncation unit 65 is
The membership function mD2 of the consequent part, this function mD,
As described above, the pulse width is expressed on a plurality of lines h0, h1, h2,. By applying such pulse signals (g and mD), the truncation unit 65 selects one of the two signals having a shorter pulse width and outputs the output mD ′. This output mD 'is represented by n lines corresponding to mD.
Such a process is equivalent to a process called “head truncation” in a normal fuzzy computer.

When the processing of the antecedent part and the processing of the consequent part are completed in this way, one processing is completed. Therefore, the fuzzy computer moves to a state in which the next rule is processed. In this way, rules are executed one after another, and finally inference is completed. Next, synthesis of execution results of each rule will be described.

As described above, when the execution of the first rule is completed, the execution result, mD ', becomes C-ma
The data is initially read into a shift register group 68 in a reset state via an x circuit 66 and a bus 67 composed of n lines. The shift register group 68 is composed of n sets of shift registers provided for each line, and reproducibly stores the above-described PWM pulse width signal.

As shown in FIG. 19 in detail, the C-max circuit 66 has n sets of 2-input OR circuits arranged in parallel with the number of lines. Therefore, after execution of the first rule, each pulse signal of the output mD 'is stored in the shift register group 68 as it is.

When the execution of the second rule is completed, the execution result of the first rule is reproduced and applied from the shift register group 68 in synchronization with the timing at which the output mD 'is applied to the C-max circuit 66. , OR circuit, a signal having a longer pulse width is selected for every n lines and stored in the shift register group 68 as in the previous case. Such an operation is equivalent to a so-called “MAX operation” in a known / normal fuzzy computer.

In this way, at the end of each rule execution, the result of combining the rules executed so far is stored in the shift register group 68 in the form of a PWM expression. After the execution of the final rule, the final inference result is stored in the shift register group 68 in a reproducible form in PWM expression.

Next, a description will be given of a so-called diff-a-fi process in which the inference result obtained as described above is converted into fixed information.

FIG. 20 shows details of the differential interface 69 for performing the differential operation. FIG. 21 is a flowchart showing the operation of the differential adhesive 69.

When the execution of all the rules is completed,
The execution result stored in the shift register group 68 (FIG. 16) is read via the bus 67 into n shift registers 700 to 70n-1 of the differential fire line for each line. As a result, in each of these shift registers 70, the execution result expressed in PWM is stored in a transcribed form. This storage state is schematically shown in FIG.

These shift registers 70 read data in the serial mode as described above, and output parallel signals as outputs. The execution results expressed in PWM by the parallel signals are shown in FIG. In other words, the height of the waveform 73 is output.

In this fuzzy computer, FIG.
The waveform 73 is subjected to differential adjustment by setting a point (or line) 74 that divides the area on the left and right into two equal parts as a definite value. Then, if this de-affirmation processing is outlined in advance, in FIG. 22, the waveform height is added (integrated) in the a direction from the left to sequentially obtain the left partial area of the waveform. Similarly, the right partial area of the waveform is determined from the right in the direction b. Then, the respective partial areas are compared to detect whether or not they match. If they do not match, the addition is performed for the smaller one, and the comparison is performed on the result of the addition. By repeating the addition (integration) and comparison in this manner, a differential output 74 is finally obtained.

First, the left and right counters 75 and 76 are preset to "0" and "n-1", respectively, and the leftmost shift register 700 and the rightmost shift register 70n-1 are designated (addressed). . At the same time, the accumulators 77 and 78 are reset. As a result, the leftmost shift register 700 is addressed via the read controller 71 and its data f (0) is output to the data bus 79. The output data is added to the contents of accumulator 77, and the result is stored in accumulator 77.

Next, the rightmost shift register 70n-1 is addressed via the read controller 72, and its data f (n-1) is output to the data bus 79. The output data is added to the contents of the accumulator 78, and the result is stored in the accumulator 78.

Then, the comparator 300 sets the accumulator 7
7 and the value r of the accumulator 78 are compared. The comparator 300 drives the accumulation controller 301 when 1 ≦ r, and drives the accumulation controller 302 when 1> r. When driven, the accumulation controllers 301 and 302 supply enable signals to the up counter 75 and the down counter 76, respectively.

Upon receiving the enable signal, the up counter 75 adds “1” to the stored value a and drives the read controller 71. The read controller 71 specifies a shift register corresponding to the value a of the up counter 75. The data of the designated shift register is added to the accumulator 77.

When receiving the enable signal, the down counter 76 subtracts “1” from the stored value b and drives the read controller 72. The read controller 72
The shift register corresponding to the value b of the down counter 76 is designated. The data of the designated shift register is added to the accumulator 78.

Similarly, one of the set of the accumulation controller 301, the counter 75, the read controller 71, and the accumulator 77, or the set of the accumulation controller 302, the counter 76, the read controller 72, and the accumulator 78 is the comparator 300. Selected and driven.

When the above operation is repeated, the comparator 303 receiving the outputs of the counters 75 and 76 becomes
When it is detected that the value of 5 has become equal to or greater than the value of the counter 76, the gate 305 is opened. When the gate 305 is opened, the data stored in the counter 76 is output as the fixed value dr. When the gate 305 is opened, the accumulated value of the accumulator 77 and the accumulated value of the accumulator 78 are approximately equal within an error range.

The definite value, that is, the conclusion value dr of the inference is calculated as shown in FIG.
Is stored in the fuzzy conclusion memory 20 via the write interface unit 224 of the above. The address at this time is
The data supplied from the MPU 1 and stored in the r latch circuit 31 is used. That is, fuzzy inference output
Corresponds to the data stored in the r latch circuit 31.
To the address of the fuzzy conclusion memory 20 (according to the data
(At an address to be switched).

The determined value stored in the fuzzy conclusion memory 20 is read out from the fuzzy conclusion memory 20 via the conclusion memory data register 25 to the conclusion data register 251 and used when the same differential output is requested thereafter. (Of course, such an operation is performed only in a short time after a certain input, for example, when there is no input change, see FIG. 23). Alternatively, when the value stored in the fuzzy conclusion memory 20 appears as a variable in the antecedent part of the subsequent inference, the value is used for inferring the antecedent part (FIG. 24).

Since inference input / output is accessed using a code representing a fuzzy rule as address information, the speed of input / output access during inference execution is increased. Also,
Externally accessible by the variable in the antecedent part of the fuzzy rule.
To capture information or to use past inference results
Judgment of whether to read as
Efficient inference can be performed efficiently.

Also, the fuzzy rules are grouped for each fuzzy variable in the consequent part and stored in the fuzzy rule memory, or the start address and end address of the grouped fuzzy rule group are stored in the fuzzy variables in the fuzzy rule consequent part. Each rule correlated address is stored in the rule control memory, and the rule control memory is accessed with the address information correlated with the fuzzy variable to obtain the real address of the fuzzy rule memory, thereby speeding up the rule retrieval. In addition, the fuzzy inference results
Correlate addresses with fuzzy variables in the consequent part of the rule
The fuzzy conclusion memory, the consequent
A code representing the fuzzy variable of the part as address information
Read the fuzzy inference result by accessing
This speeds up the retrieval of the inference result. Further, since the input and output to and from the fuzzy inference computer can be switched, it is possible to deal with various kinds of events, and the versatility can be improved.

[Brief description of the drawings]

FIG. 1 is a system configuration diagram for multi-stage fuzzy inference.

FIG. 2 is a schematic processing diagram illustrating an example of an inference process.

FIG. 3 is a block diagram of a fuzzy computer.

FIG. 4 is a memory map showing a fuzzy rule memory.

FIG. 5 is a block diagram of a rule controller.

FIG. 6 is a diagram showing a relationship between a fuzzy rule memory and a rule control memory on a memory.

FIG. 7 is a block diagram of a conclusion memory controller.

FIG. 8 is a block diagram of a fuzzy conclusion memory unit.

FIG. 9 is a memory map showing a structure of a fuzzy conclusion memory.

FIG. 10 is a block diagram of a fuzzy rule register unit.

FIG. 11 is a block diagram of an input control unit.

FIG. 12 is a diagram showing a membership function.

FIG. 13 is a diagram in which a membership function is decomposed for each line.

FIG. 14 is a block diagram of a waveform creation unit.

FIG. 15 is a waveform diagram of a membership function.

FIG. 16 is a block diagram of a fuzzy inference unit.

FIG. 17 is a configuration diagram of a MIN circuit.

FIG. 18 is a configuration diagram of a truncation unit.

FIG. 19 is a correspondence max circuit (C-MA).
FIG.

FIG. 20 is a block diagram of a differential fastener.

FIG. 21 is a flowchart showing the processing of a differential tire.

FIG. 22 is a schematic view showing an inference result.

FIG. 23 is a diagram showing an example in which the same inference as in the past is performed.

FIG. 24 is a diagram showing an example in the case where past results are used for inference of the antecedent part.

[Explanation of symbols]

 1-MPU, 2-5 fuzzy computer, 6-sensor, 9-fuzzy rule memory, 10-rule controller, 13-fuzzy conclusion memory unit, 14-fuzzy inference unit, 15-conclusion memory controller.

Claims (7)

(57) [Claims] 1. A out read a code representing the fuzzy rules used for the fuzzy inference, which represent the input variables of the antecedent part of the fuzzy rules of the code representing said fuzzy rules, read from the outside Discriminating whether it is related to a power variable or a variable representing a past inference result, and in this discriminating process, if it is related to a variable to be read from the outside, an address for reading through the external input interface is sent to the outside. When the variable value is read and the discrimination processing determines that the variable is related to a variable representing a past inference result, an address for reading through the fuzzy conclusion memory interface is sent out, and the past inference result is read from the fuzzy conclusion memory. An input / output access method in a fuzzy arithmetic device. 2. A fuzzy inference computer, comprising: a microcomputer for controlling the entire fuzzy operation; and a fuzzy inference computer including a fuzzy rule memory for storing fuzzy rules and performing fuzzy control. The fuzzy inference computer is used for fuzzy inference. The code representing the fuzzy rule is read out, and the code representing the antecedent part of the fuzzy rule in the code representing the fuzzy rule is related to a variable to be read from the outside or the past inference result. Means for determining whether the variable relates to a variable to be represented, and when the determining means determines that the variable relates to a variable to be read from the outside,
An address for reading through an external input interface is sent to the outside to read the variable value, and when the discriminating means judges that the variable relates to a past inference result, an address for reading through a fuzzy conclusion memory interface is sent. A fuzzy arithmetic device comprising means for reading a past inference result from a fuzzy conclusion memory. 3. The fuzzy rule memory according to claim 2, wherein said fuzzy rule memory stores each fuzzy rule by correlating an address to a fuzzy variable of a subsequent part, and said microcomputer stores a fuzzy rule of a subsequent part of the fuzzy rule. A fuzzy arithmetic device that generates a code representing a variable as address information. 4. A fuzzy conclusion memory for storing a fuzzy inference result, wherein each fuzzy inference result is stored by correlating an address to a fuzzy variable in a consequent part of each fuzzy rule. An input / output access method in a fuzzy arithmetic device, wherein a code representing a fuzzy variable of a consequent part is accessed as address information, and a fuzzy inference result is read. 5. The fuzzy computer according to claim 2, further comprising a fuzzy conclusion memory for storing a fuzzy inference result, wherein the fuzzy conclusion memory addresses each fuzzy conclusion result to a fuzzy variable in a consequent part of each fuzzy rule. The fuzzy inference computer generates the code representing the fuzzy variable of the consequent part as address information in the fuzzy conclusion memory. 6. A fuzzy conclusion memory for storing a fuzzy inference result obtained by a fuzzy inference unit for each fuzzy variable in a fuzzy rule consequent part, and accessing the fuzzy conclusion memory with address information correlated with the fuzzy variable. A fuzzy arithmetic device, characterized by: 7. A fuzzy inference computer for performing fuzzy inference.
Data and the membership function of the fuzzy inference computer.
Means for providing parameters, and the fuzzy inference computer
Means for switching the input to the data, and the fuzzy inference code.
Means for switching the inference output of the computer.
Fuzzy reasoning computer is used for fuzzy reasoning
The code representing the fuzzy rule is read out and the fuzzy rule is read.
Antecedent of fuzzy rule in code expressing jii rule
What represents the input variable of the part should be read from outside
Variables or variables that represent past inference results.
Means for determining whether or not the
If it is determined that the variable is
Address to read through the force interface
Section to read the variable value, and
When it is determined that the inference result is related to a variable that represents
Read through the fuzzy conclusion memory interface
Fuzzy past inference results by sending the address of the order to give
(B) Conclusion: There must be means for reading from the memory.
A fuzzy arithmetic device characterized by the following.