JP2625846B2 - In-phase combined space diversity receiver - Google Patents
In-phase combined space diversity receiverInfo
- Publication number
- JP2625846B2 JP2625846B2 JP63076269A JP7626988A JP2625846B2 JP 2625846 B2 JP2625846 B2 JP 2625846B2 JP 63076269 A JP63076269 A JP 63076269A JP 7626988 A JP7626988 A JP 7626988A JP 2625846 B2 JP2625846 B2 JP 2625846B2
- Authority
- JP
- Japan
- Prior art keywords
- phase
- comparator
- space diversity
- phase difference
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は、同相合成スペースダイバーシティ受信装置
に関し、特に、位相差検出をする場合に、雑音特性改善
のための不感帯を設定するにあたり、二つの受信入力が
逆相付近にあるときは不感帯を設定しない同相合成スペ
ースダイバーシティ受信装置に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-phase combined space diversity receiver, and particularly to setting a dead zone for improving noise characteristics when detecting a phase difference. The present invention relates to an in-phase combined space diversity receiver that does not set a dead zone when a received input is in the vicinity of an inverted phase.
[従来の技術] 一般に、同相合成スペースダイバーシティ受信装置
は、二つの受信入力の位相差を検出する位相比較器を備
え、その出力から二つの電圧比較器で位相の進みまたは
遅れを判定して受信入力信号の位相差を制御し、同相合
成している。[Prior Art] In general, an in-phase combined space diversity receiving apparatus includes a phase comparator for detecting a phase difference between two reception inputs, and receives a signal by determining a lead or lag of a phase by two voltage comparators based on the output. The in-phase synthesis is performed by controlling the phase difference between the input signals.
第3図は、従来の同相合成スペースダイバーシティ受
信装置のブロック図である。FIG. 3 is a block diagram of a conventional in-phase combined space diversity receiver.
同図において、1は無限移相器(EPS)、2は電力合
成器であり、第2の受信入力信号は無限移相器1によっ
て位相を制御され、電力合成器2において常に第1の受
信入力信号と同相で合成されている。そして、その合成
信号は、図示していない復調器(DEM)へ送られ、ベー
スバンド信号に復調される。In the figure, 1 is an infinite phase shifter (EPS), 2 is a power combiner, the phase of a second received input signal is controlled by the infinite phase shifter 1, and the power combiner 2 always receives the first received signal. They are combined in phase with the input signal. Then, the synthesized signal is sent to a demodulator (DEM) (not shown) and demodulated into a baseband signal.
また、二つの入力信号は、電力合成器2に入力される
と同時に、それぞれ、変調波の中心周波数付近の成分の
みを取り出す狭帯域のバンドパスフィルタ(BPF)3,4に
入力され、さらに、信号レベルを常に一定に保つ自動利
得制御(AGC)増幅器5,6に入力される。そして、自動利
得制御増幅器5の出力はそのままの状態で位相比較器7
に入力し、自動利得制御増幅器6の出力は位相を90゜を
変化させる90゜移相器8を通して位相比較器7に入力す
る。The two input signals are input to the power combiner 2 and, at the same time, are input to narrow-band bandpass filters (BPFs) 3 and 4 for extracting only components near the center frequency of the modulated wave, respectively. The signal is input to automatic gain control (AGC) amplifiers 5 and 6 that keep the signal level constant. Then, the output of the automatic gain control amplifier 5 is left as it is, and the phase comparator 7
The output of the automatic gain control amplifier 6 is input to the phase comparator 7 through the 90 ° phase shifter 8 which changes the phase by 90 °.
ここで、位相比較器7の位相特性は、第4図(a)の
ようになり、比較する二つの信号が同相の時にその出力
が0となる。Here, the phase characteristics of the phase comparator 7 are as shown in FIG. 4 (a), and the output becomes 0 when the two signals to be compared are in phase.
この位相比較器7の出力電圧V0は異なる固定したしき
い値電圧をもつ二つの電圧比較器9,10に入力され、一方
の入力位相の遅れに対する検出信号と、一方の入力位相
の進みに対する検出信号を得ている(第4図(b)およ
び(c))。The output voltage V 0 of the phase comparator 7 is input to two voltage comparators 9 and 10 having different fixed threshold voltages, and a detection signal for the delay of one input phase and a detection signal for the delay of one input phase A detection signal is obtained (FIGS. 4 (b) and (c)).
そして、この位相情報をもつ二つの制御信号にもとづ
き、EPS制御回路11が無限移相器1の移相量を制御し、
第2の受信入力信号の位相を変化させて同相合成を行な
う。Then, based on the two control signals having this phase information, the EPS control circuit 11 controls the amount of phase shift of the infinite phase shifter 1,
In-phase synthesis is performed by changing the phase of the second received input signal.
ところで、この位相比較器7の出力電圧V0が、V1>V0
>V2の時には、二つの電圧比較器9,10において位相の進
みと遅れを全く検出しない(第4図)。すなわち、位相
差を検出しない範囲が存在し、位相制御を行なわない不
感帯となっている。By the way, when the output voltage V 0 of the phase comparator 7 is V 1 > V 0
> Of the time V 2, is not detected at all phase lead and lag the at two voltage comparators 9 and 10 (Figure 4). That is, there is a range in which the phase difference is not detected, and there is a dead zone in which the phase control is not performed.
これは、常に無限移相器1によって受信入力信号の位
相制御を行なうとすると、その合成波に対して雑音の要
因となり、位相のゆらぎとして受信装置全体の誤り率特
性を劣化させる要因となるからである。This is because, if the phase control of the received input signal is always performed by the infinite phase shifter 1, the combined wave becomes a factor of noise and the fluctuation of the phase deteriorates the error rate characteristic of the entire receiving apparatus. It is.
このように、従来の同相合成スペースダイバーシティ
受信装置は、位相制御に不感帯を設定することによって
出力の安定を図っていた。As described above, the conventional in-phase combined space diversity receiving apparatus stabilizes the output by setting the dead zone in the phase control.
[解決すべき問題点] 上述した従来の同相合成スペースダイバーシティ受信
装置は、一つの位相比較器の出力電圧に対して、二つの
電圧比較器での不感帯を設定するだけであったため、二
つの受信入力信号が同相のときのみならず、逆相のとき
にも不感帯が生じてしまい、何らかのきっかけで受信入
力の位相関係が逆相付近の不感帯へ飛び込んでしまう
と、逆相合成状態のまま位相制御が停止してしまいとい
う問題点があった。[Problems to be Solved] The conventional in-phase combined space diversity receiving apparatus described above only sets the dead zone of two voltage comparators with respect to the output voltage of one phase comparator. A dead zone occurs not only when the input signal is in phase but also when the input signal is out of phase.If the phase relationship of the received input jumps into the dead zone near the opposite phase for some reason, the phase control is performed in the opposite phase synthesis state. Had to be stopped.
本発明は、上記問題点にかんがみてなされたもので、
二つの受信入力が同相付近にあるときは、雑音特性改善
のための不感帯を設定し、逆相付近にあるときは不感帯
を設定しないで位相制御を行なうことが可能な同相合成
スペースダイバーシティ受信装置の提供を目的とする。The present invention has been made in view of the above problems,
When the two reception inputs are near the in-phase, a dead zone for improving noise characteristics is set, and when the two reception inputs are near the opposite phase, the phase control can be performed without setting the dead band. For the purpose of providing.
[問題点の解決手段] 上記目的を達成するため、本発明の同相合成スペース
ダイバーシティ受信装置は、二つのアンテナから入力さ
れる受信信号の位相差を検出し、位相の進み/遅れを判
定する第1の位相差判定手段と、この第1の位相差判定
手段の出力にもとづいて上記受信信号のうち一方の位相
を変化させ、受信信号間の位相差を同相として合成する
合成手段と、上記受信信号間の位相差が同相付近か逆相
付近かを判定し、その結果にもとづいて上記第1の位相
差判定手段の不感帯を制御する第2の位相差判定手段と
を備えた構成としてある。[Means for Solving the Problems] In order to achieve the above object, the in-phase combined space diversity receiving apparatus of the present invention detects a phase difference between received signals input from two antennas and determines whether the phase is advanced or delayed. (1) a phase difference judging means, a synthesizing means for changing one phase of the received signals based on an output of the first phase difference judging means, and synthesizing a phase difference between the received signals as the same phase; It is configured to determine whether the phase difference between the signals is near the in-phase or near the opposite phase, and to provide a second phase difference determining means for controlling the dead zone of the first phase difference determining means based on the result.
ここで、具体的には、二つの受信入力信号の位相差が
同相付近か逆相付近かを判定するため、位相の遅れと進
みを判定する場合の位相差とは90゜位相差が異なる状態
で二つの受信入力信号の位相を比較し、その結果から二
つの受信入力信号の位相差(Δθ+90゜)が同相付近
(−90゜<Δθ<90゜)か逆相付近(90゜<Δθ<270
゜)かを判定している。そして、その判定にもとづいて
位相の遅れと進みを判定する電圧比較器のしきい値電圧
を制御している。Here, specifically, in order to determine whether the phase difference between the two received input signals is near the same phase or near the opposite phase, a state where the phase difference is 90 ° different from the phase difference when determining the delay and advance of the phase. And the phase of the two received input signals is compared. From the result, the phase difference (Δθ + 90 °) between the two received input signals is close to the same phase (−90 ° <Δθ <90 °) or close to the opposite phase (90 ° <Δθ < 270
゜) is determined. Then, the threshold voltage of the voltage comparator that determines the delay and advance of the phase based on the determination is controlled.
[実施例] 以下、図面にもとづいて本発明の実施例を説明する。Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
第1図は、本発明の一実施例に係る同相合成スペース
ダイバーシティ受信装置のブロック図である。。なお、
従来例と共通または対応する部分については同一の符号
で表す。FIG. 1 is a block diagram of an in-phase combined space diversity receiver according to one embodiment of the present invention. . In addition,
Portions common or corresponding to the conventional example are denoted by the same reference numerals.
同図において、12は位相比較器であり、位相比較器7
とは位相差が90゜異なる二信号を比較する。また、13は
位相比較器12の出力電圧を判定する電圧比較器であり、
電圧比較器13の出力によって電圧比較器9,10のしきい値
電圧を変えられるようにしている。In the figure, reference numeral 12 denotes a phase comparator, and the phase comparator 7
Compares two signals with a phase difference of 90 °. Reference numeral 13 denotes a voltage comparator that determines the output voltage of the phase comparator 12,
The threshold voltage of the voltage comparators 9, 10 can be changed by the output of the voltage comparator 13.
上記構成において、位相比較器12は、位相比較器7の
位相比較特性と90゜位相差がずれた位相比較特性(第2
図(a))をもち、電圧比較器13は、位相比較器12の出
力電圧が正か負かを判定する。そして、その出力(第2
図(d))で電圧比較器9および電圧比較器10のしきい
値電圧V1,V2を制御する。すなわち、二つの受信入力信
号間の位相差(Δθ+90゜)が、 90゜≦Δθ+90゜≦270゜ の範囲においてV1=V2=0とし、 −90゜≦Δθ≦90゜ の範囲において、V1=V2=一定電圧となるようにする。In the above configuration, the phase comparator 12 has a phase comparison characteristic (second
As shown in FIG. 3A, the voltage comparator 13 determines whether the output voltage of the phase comparator 12 is positive or negative. And its output (second
In FIG. 4D, the threshold voltages V 1 and V 2 of the voltage comparator 9 and the voltage comparator 10 are controlled. That is, the phase difference (Δθ + 90 °) between two received input signals is V 1 = V 2 = 0 when 90 ° ≦ Δθ + 90 ° ≦ 270 °, and V 1 = V 2 = 0 when −90 ° ≦ Δθ ≦ 90 °. 1 = V 2 = constant voltage.
このようにすることにより、逆相付近では不感帯が生
じなくなる。従って、従来の同相合成スペースダイバー
シティ受信装置のように、逆相付近で位相制御が停止し
てしまうこともなくなる。By doing so, a dead zone does not occur near the reverse phase. Therefore, unlike the conventional in-phase combined space diversity receiver, the phase control does not stop near the opposite phase.
このように本実施例は、二つのアンテナからくる受信
入力信号の位相差を制御して同相で合成するため、上記
二つの受信入力信号の位相を比較する第1の位相比較器
7と、この第1の位相比較器7の出力から受信入力信号
間の位相の遅れを検出する第1の電圧比較器9と、同じ
く位相の進みを検出する第2の電圧比較器10と、これら
第1および第2の電圧比較器9,10の出力として得られる
位相制御情報にもとづいて受信入力信号間の位相差を制
御する位相制御回路11,1と、その位相が制御された二つ
の信号を合成する電力合成器2とを備えた同相合成スペ
ースダイバーシティ受信装置において、上記第1の位相
比較器7とは二つの受信入力の位相差に対する位相比較
特性が略90゜異なる第2の位相比較器12と、この第2の
位相比較器12の出力から受信入力信号の位相関係が同相
付近か逆相付近かを検出する第3の電圧比較器13とを設
け、この第3の電圧比較器13の出力によって上記第1お
よび第2の電圧比較器9,10のしきい値電圧を変化させ、
位相制御の不感帯を制御している。As described above, in this embodiment, the first phase comparator 7 that compares the phases of the two received input signals is controlled by controlling the phase difference between the received input signals coming from the two antennas and combining them in phase. A first voltage comparator 9 for detecting a phase delay between received input signals from an output of the first phase comparator 7, a second voltage comparator 10 for detecting a phase advance, A phase control circuit for controlling a phase difference between received input signals based on phase control information obtained as outputs of the second voltage comparators, and the two signals whose phases are controlled are synthesized. In the in-phase combining space diversity receiving apparatus including the power combiner 2, the second phase comparator 12 differs from the first phase comparator 7 in phase comparison characteristics with respect to the phase difference between two reception inputs by approximately 90 °. Received from the output of the second phase comparator 12. And a third voltage comparator 13 for detecting whether the phase relationship of the input signal is near the in-phase or near the reverse phase. The output of the third voltage comparator 13 outputs the first and second voltage comparators 9. Change the threshold voltage of
The dead zone of the phase control is controlled.
[発明の効果] 以上説明したように本発明は、二つの受信入力信号の
位相関係が逆相付近である場合は、位相制御の不感帯を
なくしているため、同相合成時には位相制御を止める
が、逆相合成時には位相差が0゜になるような位相制御
を行なうことができ、無限移相器を制御することによる
劣化を最小限に押さえ、常に、二つの受信入力信号が同
相付近で合成することが可能な同相合成スペースダイバ
ーシティ受信装置を提供できるという効果がある。[Effects of the Invention] As described above, the present invention eliminates the dead zone of phase control when the phase relationship between two received input signals is near anti-phase, and stops phase control during in-phase synthesis. At the time of out-of-phase synthesis, it is possible to perform phase control such that the phase difference becomes 0 °, minimize degradation due to controlling the infinite phase shifter, and always combine two received input signals near the same phase. There is an effect that it is possible to provide an in-phase combining space diversity receiving apparatus capable of performing the above-mentioned steps.
第1図は本発明の一実施例に係る同相合成スペースダイ
バーシティ受信装置のブロック図、第2図(a)は第1
図の同相合成スペースダイバーシティ受信装置における
位相比較器の位相比較特性を示す図、第2図(b),
(c),(d)は同じく電圧比較器の出力特性を示す
図、第3図は従来の同相合成スペースダイバーシティ受
信装置のブロック図、第4図(a)は従来の同相合成ス
ペースダイバーシティ受信装置における位相比較器の位
相比較特性を示す図、第4図(b),(c)は同じく電
圧比較器の出力特性を示す図である。 1:無限移相器(EPS) 2:電力合成器 7,12:位相比較器 8:90゜移相器 9,10,13:電圧比較器 10:電圧比較器 11:EPS制御回路FIG. 1 is a block diagram of an in-phase combined space diversity receiver according to one embodiment of the present invention, and FIG.
FIG. 2B shows a phase comparison characteristic of a phase comparator in the in-phase combined space diversity receiver shown in FIG.
(C) and (d) are diagrams showing output characteristics of the voltage comparator, FIG. 3 is a block diagram of a conventional in-phase combined space diversity receiver, and FIG. 4 (a) is a conventional in-phase combined space diversity receiver. And FIG. 4B and FIG. 4C are diagrams showing the output characteristics of the voltage comparator. 1: Infinite phase shifter (EPS) 2: Power combiner 7, 12: Phase comparator 8: 90 ゜ phase shifter 9, 10, 13: Voltage comparator 10: Voltage comparator 11: EPS control circuit
Claims (1)
位相差を検出し、位相の進み/遅れを判定する第1の位
相差判定手段と、この第1の位相差判定手段の出力にも
とづいて上記受信信号のうち一方の位相を変化させ、受
信信号間の位相差を同相として合成する合成手段と、上
記受信信号間の位相差が同相付近か逆相付近かを判定
し、その結果にもとづいて上記第1の位相差判定手段の
不感帯を制御する第2の位相差判定手段とを具備するこ
とを特徴とする同相合成スペースダイバーシティ受信装
置。1. A first phase difference judging means for detecting a phase difference between received signals input from two antennas and judging a lead / lag of a phase, and based on an output of the first phase difference judging means. And changing the phase of one of the received signals, and synthesizing the phase difference between the received signals as in-phase, and determining whether the phase difference between the received signals is near the in-phase or near the opposite phase. An in-phase combined space diversity receiving apparatus, comprising: a second phase difference judging means for controlling a dead zone of the first phase difference judging means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63076269A JP2625846B2 (en) | 1988-03-31 | 1988-03-31 | In-phase combined space diversity receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63076269A JP2625846B2 (en) | 1988-03-31 | 1988-03-31 | In-phase combined space diversity receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01251926A JPH01251926A (en) | 1989-10-06 |
JP2625846B2 true JP2625846B2 (en) | 1997-07-02 |
Family
ID=13600516
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63076269A Expired - Lifetime JP2625846B2 (en) | 1988-03-31 | 1988-03-31 | In-phase combined space diversity receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2625846B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007169810A (en) * | 2005-12-20 | 2007-07-05 | Big John Corp | Jeans |
JP4849414B2 (en) * | 2007-05-30 | 2012-01-11 | 三菱電機株式会社 | Phase comparison circuit |
-
1988
- 1988-03-31 JP JP63076269A patent/JP2625846B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH01251926A (en) | 1989-10-06 |
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