JP2621624B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a fine pattern.

[Conventional technology]

Conventional methods for manufacturing a semiconductor device include patterning a photoresist film using a reduction projection exposure method, an exposure method using an electron beam, and recently, an exposure method using a laser or accelerating particles, and masking the photoresist film. As width 1
A fine pattern of about μm is formed.

[Problems to be solved by the invention]

In the above-described conventional method of manufacturing a semiconductor device, when exposing a pattern using light, it is almost impossible to form a pattern of 0.4 μm or less because the resolution is limited by the wavelength of the light. In addition, when using accelerated particles such as electron beams, the resolution is superior to that of light, but the cost of the apparatus and
The use of these methods in a mass production process has a problem in that the efficiency is low in consideration of the processing capacity.

An object of the present invention is to provide a method for manufacturing a semiconductor device capable of forming a fine pattern without using a method that is expensive and unsuitable for mass production.

[Means for solving the problem]

The method of manufacturing a semiconductor device according to the present invention includes a step of forming a first positive photoresist film on a layer to be etched provided on a semiconductor substrate, and a step of forming a first photoresist film by plasma after patterning the first photoresist film. Processing to solidify the surface of the photoresist film, and applying a positive type second photoresist film on the surface including the first photoresist film to flatten the surface and then etching the first photoresist film. Removing the upper layer of the second photoresist film until the surface of the first photoresist film is exposed; and immersing the second photoresist film in a base aqueous solution to shrink the second photoresist film,
Forming a gap between the second photoresist film and the second photoresist film; and forming a groove by anisotropically etching the layer to be etched exposed by the gap.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1A to 1F are sectional views of a semiconductor chip shown in the order of steps for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, a silicon oxide film 2 having a thickness of 0.5 μm is formed on a silicon substrate 1. Next, a positive photoresist film 3 having a thickness of 2 μm is coated on the silicon oxide film 2 and patterned, and is treated with plasma containing CF ₄ gas to peripheralize the surface of the photoresist film 3 (resist solvent). To form an insoluble layer with respect to

Next, as shown in FIG. 1 (b), a positive photoresist film 4 is applied to the surface including the photoresist film 3 to flatten the surface.

Next, as shown in FIG. 1C, the entire surface is etched back by, for example, plasma containing O ₂ gas, and the etching is stopped when the surface of the photoresist film 3 is just exposed.

Next, as shown in FIG. 1 (d), by immersing in a basic aqueous solution, for example, 10% ammonia water for 30 minutes,
The photoresist film 4 is shrunk, and the photoresist film 3 is shrunk.
Then, an opening 5 having a width of 0.3 μm is formed between the substrate and the photoresist film 4.

Next, as shown in FIG. 1E, the silicon oxide film 2 and the silicon substrate 1 are sequentially anisotropically etched by RIE (reactive ion etching) using the photoresist film 3 and the photoresist film 4 as a mask. Silicon substrate 1
Then, a groove 6 having a width of 0.3 μm and a depth of 2 μm is formed.

Next, as shown in FIG. 1 (f), after removing the photoresist film 3 and the photoresist film 4, the surface including the groove 4 is subjected to LPCVD by SOG (spin-on-glass) or SOG.
The PSG layer 7 is deposited by applying a (low pressure CVD) method, and is etched to bury the PSG layer 7 in the trench 6 to form an element isolation layer.

Note that a silicon oxide film or a silicon nitride film may be used instead of the PSG layer.

2 (a) to 2 (f) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a second embodiment of the present invention.

First, as shown in FIG. 2A, a silicon oxide film 2 is deposited on a silicon substrate 1 on which an element region has been formed, and selectively etched to form a contact hole 8. Next, an aluminum film 9 having a thickness of 1 μm is deposited on the surface including the contact holes 8 by sputtering, and a positive photoresist film 3 having a thickness of 2 μm is formed on the aluminum film 9.
Is formed and patterned. Next, the surface of the photoresist film 3 is solidified by processing with plasma containing CF ₄ gas.

Next, as shown in FIG. 2B, a positive photoresist film 4 is formed on the surface including the photoresist film 3.

Next, as shown in FIG. 1 (c), the photoresist film 4 is etched away by plasma containing, for example, O ₂ gas until the surface of the photoresist film 3 is just exposed.

Next, as shown in FIG. 1 (d), the photoresist film 4 is contracted by immersing it in a basic aqueous solution, for example, 10% ammonia water for 30 minutes, and the distance between the photoresist film 3 and the photoresist film 4 is reduced. Then, an opening 5 having a width of 0.3 μm is formed.

Next, as shown in FIG. 2 (e), the aluminum film 9 is anisotropically etched by the RIE method using the photoresist film 3 and the photoresist film 4 as a mask to form a groove 6 having a width of 0.3 μm, thereby forming a wiring. Form.

Next, as shown in FIG. 2 (f), after removing the photoresist film 3 and the photoresist film 4, an aluminum oxide film 10 for oxidizing the surface of the aluminum film 9 by anodic oxidation to insulate between the wirings is formed. Form. Here, if the aluminum oxide film 10 is porous, the volume expands about 1.3 times, so that the inside of the groove 6 is filled with the aluminum oxide film 10. Further, the groove 6 may be filled with a silica film using an SOG method instead of the anodic oxidation method, or a silicon nitride film or a silicon oxide film may be filled using a plasma CVD method.

〔The invention's effect〕

As described above, the present invention easily forms a fine pattern groove of 0.4 μm or less in a layer to be etched by utilizing the fact that the volume of a positive resist film shrinks when immersed in a basic aqueous solution. Accordingly, the degree of integration of the semiconductor device can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 (a) to (f) and FIGS. 2 (a) to (f) are semiconductors shown in the order of steps for explaining the first and second embodiments of the present invention. It is sectional drawing of a chip. 1 ... silicon substrate, 2 ... silicon oxide film, 3, 4 ...
Photoresist film, 5 ... opening, 6 ... groove, 7 ... PS
G layer, 8 contact hole, 9 aluminum film, 10
... Aluminum oxide film.

Claims (1)

(57) [Claims] A step of forming a first positive photoresist film on a layer to be etched provided on a semiconductor substrate;
Patterning the first photoresist film and treating it with plasma to solidify the surface of the photoresist film, and applying a positive type second photoresist film to the surface including the first photoresist film Removing the upper layer of the second photoresist film until the surface of the first photoresist film is exposed by etching after flattening the surface, and immersing the second photoresist film in a base-based aqueous solution. Providing a gap between the first and second photoresist films by shrinking the resist film; and forming a groove by anisotropically etching the layer to be etched exposed by the gap. A method for manufacturing a semiconductor device.