JP2621492B2 - Microprocessor simulator device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an apparatus for supporting development of a microprocessor application device.

<Conventional Technology> Conventionally, as a development support device for a microprocessor application device, there is an in-circuit emulator, a simulator using a minicomputer or a personal computer as a host, and the like. These devices normally execute the operation of the target microprocessor in the following two ways.

In an in-circuit emulator or the like, a real microprocessor (target microprocessor) is operated as it is.

In a simulator or the like using a minicomputer or a personal computer as a host, the movement of a target microprocessor is simulated by a program.

<Problem to be Solved by the Invention> However, in the above case, there is a problem that the development support device cannot be used until a real microprocessor is available.In the above case, target hardware other than the target microprocessor is simulated. Therefore, it is difficult to use the development support device effectively, and there is a problem in execution speed (a problem that the speed is more than 1000 times slower than the actual speed).

The object of the present invention has been made in view of the above points, and combines a dedicated simulator device for simulating the operation of a target microprocessor at high speed and a device for emulating a hardware interface of the target microprocessor. Accordingly, it is an object of the present invention to provide a microprocessor simulator device which can perform the same system operation as when a target microprocessor does not exist.

<Means for Solving the Problems> In order to achieve the above object, the present invention provides a definition memory (1) for storing a definition defining the operation of a target microprocessor, and a definition memory (1). The target microprocessor simulator (2) that simulates the logic of the target microprocessor by interpreting the definition field of the target microprocessor and can apply the same operation to the signal received from the outside as the target microprocessor, and captures the actual signal from the target The target microprocessor simulator (2) converts into a logic signal according to a signal specification defined in the definition memory (1).
And a signal conversion generator (3) capable of converting a logic signal from the target microprocessor simulator (2) and sending the signal to the target, and a signal transmitted from the target to the signal conversion generator. A matching target microprocessor socket interface (4), and a control unit (8) for downloading information, accessing internal information of each unit, and controlling each unit in order to exchange information with a host computer. I do.

<Operation> In the present invention, a definition body defining the operation of the target microprocessor is stored in the definition body memory, and an input / output signal to / from the target microprocessor simulator is signal-converted by the signal conversion generation unit to specify the logic specification of the definition body and the signal. Convert according to specifications.

In addition, input / output signals via the interface to the target are also signal-converted by the signal conversion generator in accordance with the specification of the definition body.

Then, by simulating the operation of the target microprocessor in the target microprocessor simulator, it is possible to check the operation of the microprocessor applied device even in the absence of the target microprocessor.

<Example> Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a configuration diagram showing one embodiment of a microprocessor simulator device according to the present invention. In the figure, reference numeral 1 denotes a definition memory for storing a definition that defines the operation of a target microprocessor. Reference numeral 2 denotes a target microprocessor simulator, which is a logic device constituted by, for example, a digital signal processor or a computer. To simulate the logic of the target microprocessor. In short, the same operation as the target microprocessor can be applied to the signal received from the outside.

Reference numeral 3 denotes a signal conversion generation unit which takes in an actual signal from the target, converts it into a logical signal in accordance with the signal specifications defined in the memory 1, and converts it into a target microprocessor simulator 2.
And at the same time, converts the logic signal from the target microprocessor simulator 2 and sends it to the target.

Reference numeral 4 denotes a target microprocessor socket interface for ordering signals input to and output from the target microprocessor socket 5.

Reference numeral 6 denotes a cache memory for caching the contents of the target memory. Reference numeral 7 denotes an I / O simulator for simulating an input / output (hereinafter referred to as I / O) device which is not mounted on the target. Actions can be taken.

A control unit 8 downloads information, accesses internal information of each unit, and controls each unit in order to exchange information with a host computer (not shown).

In such a configuration, the logic specification and the signal specification of the target microprocessor are defined in the definition memory 1 via the control unit 8 by the host computer, and the I / O simulation specification is defined. The logic specification is used in the target microprocessor simulator 2, and the signal specification is used in the signal conversion generator 3. Although the I / O simulation specifications are used in the I / O simulator 7, the I / O simulator 7 is not always necessary, and may be removed when the I / O simulation is not performed.

The target microprocessor simulator 2 performs the same operation as that of the target microprocessor on the signal received from the signal conversion generator 3 according to the specification definition of the definition memory 1. In this case, the cache 6 is used to speed up target memory access.

The signal supplied from the signal conversion generator 3 to the target microprocessor simulator 2 is obtained by logically converting an analog input signal via the target microprocessor socket 5 ordered by the interface 4 via the target microprocessor socket 5 according to a signal specification defined in the definition memory 1. It is converted into a signal.

In addition, the target microprocessor simulator 2
When transmitting a signal to the target, the signal conversion generation unit 3 converts the transmission signal according to the signal specification definition of the definition memory 1, further converts the signal to an analog signal at the interface 4, and outputs the analog signal to the target via the socket 5.

When inputting / outputting a signal to / from the I / O, the signal is converted via the signal conversion generator 3 (although the signal conversion is performed here).
Input / output to / from the I / O simulator 7. The I / O simulator 7 performs pseudo I / O operations according to the I / O simulation specification definition of the definition memory.

With such an operation, an equivalent operation can be performed instead of the target microprocessor.

The definition memory 1 and the target microprocessor simulator 2 may be physically located on the host computer.

<Effects of the Invention> As described in detail above, according to the present invention, it is not possible to check the operation of a system including a microprocessor until a target microprocessor is conventionally obtained. Although performance problems remain, it is now possible to check operation without a target microprocessor.

In addition, with the advent of ASICs and custom chips, the operation check in the absence of a microprocessor has become more and more important. Therefore, the microprocessor simulator of the present invention is practically used and its effect is extremely large.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing one embodiment of a microprocessor simulator device according to the present invention. 1 ... definition memory, 2 ... target microprocessor simulator, 3 ... signal conversion generator, 4 ... target microprocessor socket interface,
5 ... target microprocessor socket, 6 ...
Cache memory, 7: I / O simulator, 8: Control unit.

Claims (1)

(57) [Claims] A definition memory for storing a definition defining operation of the target microprocessor; interpreting the definition of the definition memory to simulate logic of the target microprocessor; A target microprocessor simulator (2) capable of performing the same operation as a target microprocessor on a signal received from the outside; a real signal from a target is fetched into a logical signal according to a signal specification defined in the definition memory (1) Convert the target microprocessor simulator (2)
And a signal conversion generator (3) capable of converting a logic signal from the target microprocessor simulator (2) and sending the signal to the target, and a signal transmitted from the target to the signal conversion generator. A matching target microprocessor socket interface (4), and a control unit (8) for downloading information, accessing internal information of each unit, and controlling each unit in order to exchange information with a host computer. Microprocessor simulator device.